CN112988624B - 用于保护影子栈的处理器、方法、系统和指令 - Google Patents

用于保护影子栈的处理器、方法、系统和指令 Download PDF

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CN112988624B
CN112988624B CN202110256487.XA CN202110256487A CN112988624B CN 112988624 B CN112988624 B CN 112988624B CN 202110256487 A CN202110256487 A CN 202110256487A CN 112988624 B CN112988624 B CN 112988624B
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ssp
shadow stack
instruction
processor
shadow
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CN112988624A (zh
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V·尚伯格
J·W·布兰德特
R·L·萨希塔
B·E·亨特利
B·V·帕特尔
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Intel Corp
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Intel Corp
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    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Security & Cryptography (AREA)
  • Human Computer Interaction (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Executing Machine-Instructions (AREA)
  • Storage Device Security (AREA)
  • Advance Control (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Peptides Or Proteins (AREA)
CN202110256487.XA 2015-06-26 2016-05-26 用于保护影子栈的处理器、方法、系统和指令 Active CN112988624B (zh)

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US14/752,221 US20160381050A1 (en) 2015-06-26 2015-06-26 Processors, methods, systems, and instructions to protect shadow stacks
US14/752,221 2015-06-26
CN201680029980.5A CN107667372A (zh) 2015-06-26 2016-05-26 用于保护影子栈的处理器、方法、系统和指令
PCT/US2016/034364 WO2016209533A1 (fr) 2015-06-26 2016-05-26 Processeurs, procédés, systèmes et instructions pour protéger des piles fantômes
CN202110256487.XA CN112988624B (zh) 2015-06-26 2016-05-26 用于保护影子栈的处理器、方法、系统和指令

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US (3) US20160381050A1 (fr)
EP (4) EP3314507B1 (fr)
CN (3) CN117873922A (fr)
TW (4) TWI712953B (fr)
WO (1) WO2016209533A1 (fr)

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