CN1297802C - All silicon integrated flow sensor and method for manufacturing the same - Google Patents

Abstract

An all-silicon integrated flow sensor and its manufacturing method are proposed. Its device consists of a silicon single crystal substrate, in which a porous single silicon well is embedded, and two sets of thermocouple stacks are arranged in the well, which is composed of several n-type doped single crystal silicon strips and p-doped polycrystalline silicon strips. , and p-type doped polysilicon heating element, p-type doped polysilicon temperature measuring element, and amorphous silicon carbide passivation layer. The porous monocrystalline silicon well provides an insulating base for the heating element to establish a large temperature gradient with a small electrical power consumption. High-sensitivity thermocouple stacks are used to detect changes in temperature gradients caused by changes in the average fluid velocity. The main components of the device are all made of silicon, so they can be manufactured with simple integrated circuit technology, which is suitable for large-scale production and is conducive to reducing costs.

Description

An all-silicon integrated flow sensor and its manufacturing method

technical field

The invention relates to an integrated flow sensor, in particular to an integrated flow sensor with a silicon thermocouple stack as a temperature detection element, a porous single crystal silicon well as a thermal isolation base, and silicon as a main material.

Background technique

The application of flow sensor is very extensive. Both natural gas and water for industrial use require flow sensors to measure the supply and bill accordingly. In the automobile industry, the flow sensor is also a key sensing element. The control and emission of the engine, the flow and consumption of fuel cannot be separated from it. In addition, environmental control, biological instruments, air conditioning systems, petrochemicals, etc. are also places where flow sensors are used.

The advantages of integrated flow sensors developed on the basis of integrated circuit technology are obvious. These advantages are mainly suitable for large-scale production, thus low cost, easy to combine with signal processing circuits, and thus excellent performance.

The working principle of the integrated flow sensor is not much different from that of the traditional flow sensor. It also takes away part of the heat emitted by the sensor heating element through the fluid, and generates a temperature gradient around it, and the temperature difference in the local area is measured by the sensor temperature measuring element. , the average speed of fluid flow can be calculated.

The design of the integrated flow sensor is generally based on two considerations. One is to try to reduce the heat conduction loss of the heating element to highlight the heat transfer effect of the fluid; Measure the change in temperature.

The design guided by the former considerations is to use micro-manufacturing technology to form a hollow cavity in the silicon wafer, and build a dielectric film bridge above it. The disadvantage of this design is that the structural strength is poor, and it is easily damaged under the impact of solid particles doped in the fluid.

The design guided by the latter consideration is to use an integrated thermocouple stack as a temperature measuring element, such as aluminum/polysilicon thermocouple stacks are used more often. However, if the dielectric film bridge is used in combination, the problem of poor mechanical strength has not been solved. If it is directly made on a silicon wafer covered with a general silicon oxide layer, the advantages of the thermocouple stack are difficult to show due to its large thermal conductivity.

The purpose of the present invention, generally speaking, is to propose a comprehensive solution to the problems existing in the above-mentioned integrated flow sensor. Specifically, it is necessary to achieve the following goals: first, use thermoelectric materials with high Seebeck coefficients as much as possible to form a thermocouple stack with higher thermoelectric conversion efficiency, so that it can be measured under the condition of lower heating power consumption. The small temperature gradient changes caused by the fluid flow; the second is to use a thicker low thermal conductivity material layer as a thermal insulation support base to replace the fragile thin film microbridge support structure, so that the sensor can withstand The impact of unfiltered fluid; the third is to eliminate the processing steps of micro-manufacturing and manufacture sensors with relatively simple integrated circuit technology, thereby simplifying the manufacturing process, eliminating the need for special equipment, and greatly reducing production costs.

Extensive measurements have been made of thermoelectric materials paired with platinum to form thermocouples with the cold junction at 0°C and the hot junction at 100°C. The measurement results show that the Seebeck coefficient of n-type silicon relative to platinum can reach up to 450 microvolts (voltage)/degree (temperature), which is only lower than that of n-type germanium, whose Seebeck coefficient can reach up to 548 microvolts Voltage/degree Celsius, p-type silicon has a Seebeck coefficient of up to 450 microvolts/degree Celsius, the highest among all known p-type thermoelectric materials.

However, silicon material is also an excellent thermal conductor, which limits the possibility of forming silicon thermocouple stacks directly in the silicon body, because it is difficult to reduce the loss caused by the heat flow between the hot and cold junctions of silicon thermocouples transmitted through the silicon body. This loss prevents the establishment of a large enough temperature difference between the two junctions, making it difficult to obtain a large enough electrical signal.

Contents of the invention

In order to get rid of this predicament, the present invention uses anodic oxidation technology to selectively form a porous single crystal silicon well in the silicon single crystal substrate, thereby forming a porous single crystal silicon well surrounded by extremely low thermal conductivity from the silicon substrate. monocrystalline silicon strips. Using this thermally isolated single crystal silicon strip as the pairing material of the sensor thermocouple stack can make full use of the advantages of its high Seebeck coefficient, and eliminate the disadvantages of its excellent conductor, so that silicon thermocouples with excellent performance can be obtained heap.

Porous single crystal silicon is a single crystal silicon material containing a large number of micropores formed by anodic oxidation of silicon single crystal materials. Porous single crystal silicon is easily converted into oxidized porous silicon by high-temperature thermal oxidation, so some people use oxidized porous silicon to make heat-insulating support seats for flow sensors. However, this high-temperature thermally oxidized porous silicon has a large internal stress. As the thickness of the oxidized porous silicon layer increases, its strain also increases continuously, and finally the surface will be bent, so that it will eventually break and be damaged. Therefore, the thickness of the oxidized porous silicon layer that can be used practically is very limited, that is, the improvement of its thermal insulation effect is not very obvious.

Measurements have shown that the thermal conductivity of unoxidized porous single crystal silicon is usually 2 to 3 orders of magnitude lower than that of single crystal silicon, that is, the thermal conductivity of single crystal silicon is 156 watts per meter per degree, while that of unoxidized porous single crystal The thermal conductivity of silicon is 0.3 to 2.7 watts per meter per degree, and its lowest value is already smaller than the thermal conductivity of silicon oxide, which is commonly used as a thermal insulation material, at 1.1 watts per meter per degree. Measurements also show that the internal stress of newly formed porous single crystal silicon is generally negative 10 million Pa, which is 2 orders of magnitude lower than that of thermal silicon oxide. Heat treatment will change the internal stress of porous single crystal silicon, and the internal stress will become positive 20 million MPa after oxidation treatment at 300 degrees Celsius. If it is treated in nitrogen and the temperature is controlled within 450 degrees Celsius, its internal stress may be reduced to zero. Since the heat insulation effect increases with the increase of thickness, the present invention adopts the treated thick porous single crystal silicon layer to make the thermal isolation support seat of the sensor heating element, and the thickness range can be from tens of microns to hundreds of microns.

Although micro-manufacturing technology has greater compatibility with integrated circuit technology, it still needs to add some special manufacturing equipment and establish some special processing techniques. As mentioned above, the temperature measuring element of the flow sensor of the present invention is a stack of silicon thermocouples, and the heat insulating base is a porous monocrystalline silicon well, which means that the main device elements of the sensor are all processed by silicon, and there is no need to implement additional Microfabrication steps. Most of the integrated circuit manufacturing process also revolves around the processing of silicon wafers, so mature integrated circuit production lines can be used to produce sensors to minimize the production cost of sensors.

Description of drawings

The accompanying drawings of the all-silicon flow sensor of the present invention are briefly described below.

Fig. 1 is a perspective view of the front structure of the all-silicon flow sensor of the present invention.

Fig. 2 shows a cross-sectional view cut along line AA on the front side of the all-silicon flow sensor shown in Fig. 1 .

Fig. 3 shows a partial cross-sectional view cut along line BB on the front side of the all-silicon flow sensor shown in Fig. 1 .

Fig. 4 is a block diagram of the measurement circuit of the all-silicon flow sensor of the present invention.

Fig. 5 is a cross-sectional view of the all-silicon flow sensor of the present invention when n-type doped single crystal silicon strips are formed.

Fig. 6 is a cross-sectional view of the all-silicon flow sensor of the present invention when a porous monocrystalline silicon well is further formed.

7 is a cross-sectional view of the all-silicon flow sensor of the present invention when n-type doped polysilicon strips and other device elements are further formed.

Fig. 8 is a cross-sectional view of the all-silicon flow sensor of the present invention when an amorphous silicon carbide passivation layer is finally formed.

Detailed ways

The complete structure of the all-silicon integrated flow sensor of the present invention is shown in FIG. 1 , FIG. 2 and FIG. 3 . Figure 1 shows the front structure of the sensor. It can be seen that the composition of the sensor includes a single crystal silicon substrate 101, an upstream thermocouple stack 102A and its heat sink 105A, a downstream thermocouple stack 102B and its heat sink 105B, a heating element 103, an upstream temperature measuring element 104, and several Pressure welding block 106 . The arrows in the figure indicate the direction of fluid flow.

FIG. 2 shows a cross-section cut along line AA of the surface of the sensor shown in FIG. 1 . This figure shows that a multi-empty silicon well 108 is embedded in the single crystal silicon substrate 101 of the sensor, and single crystal silicon strips 109A and 109B forming a thermocouple stack are embedded in the well, and polysilicon strips forming a thermocouple stack are arranged on the surface of the well 111A and 111B, the lower surfaces of the opposite ends of the two polycrystalline silicon strips are in direct contact with the upper surface of the monocrystalline silicon strips to form central junctions or thermal junctions 110A and 110B, and most of the polycrystalline silicon strips and the lower monocrystalline silicon strips are covered by a layer of silicon oxide 112 isolation, a heating element 103 isolated by a silicon oxide layer 112 is arranged between two polysilicon strips, and an upstream temperature measuring element 104 isolated by a silicon oxide layer 112 is arranged outside the upstream heat sink 105A, and all device elements are covered with passivation Layer 113.

FIG. 3 shows a partial cross section cut along line BB of the surface of the sensor shown in FIG. 1 . What this figure shows is the structure of the side ends of the thermocouple stack downstream of the sensor, that is, the side ends of the monocrystalline silicon strip 109B and the polycrystalline silicon strip 114B are widened toward the opposite direction, so that they form a direct contact junction or cold junction 114B, adjacent to each other. The monocrystalline silicon strips 109B are isolated by porous monocrystalline silicon wells 108 , the adjacent polycrystalline silicon strips 109B are isolated by a silicon oxide layer 112 , and the top of the polycrystalline silicon strips 109B is covered by a passivation layer 113 . The configuration of the side ends of the upstream thermocouple stack is the same, that is, there is also a direct contact junction or cold junction 114A formed between the monocrystalline silicon strip 109A and the polycrystalline silicon strip 114A, but it is not shown in the figure.

There are many materials that can be used to make the heating element, but the priority is doped polysilicon. The upstream temperature sensing element can also be formed from a variety of materials, but the most convenient material is polysilicon. Amorphous silicon carbide should be preferred for the passivation film, because it has a strong ability to resist acid and alkali corrosion, allowing the sensor to withstand the test of various harsh environments. Silicon nitride can also be used as a substitute, because its manufacturing process is more popular and it is easier to implement.

When the sensor is in operation, it must be placed in the pipeline through which the fluid passes, so that its front is parallel to the forward direction of the fluid, and the upstream thermocouple stack is upstream of the fluid, and the downstream thermocouple stack is downstream of the fluid. The flow line of the fluid is along the Along the length direction of the thermocouples in the thermocouple stack, vertically pass through the upstream temperature measuring element and the heating element between the two thermocouple stacks. The heating element of the sensor is energized and heated, and the heating power is kept stable, so that the area near both sides of the heating element is heated to a certain value. If no fluid flows through, the temperature field above the sensor surface should decrease from the center of the heating element to both sides, but it must strictly follow the axisymmetric distribution. At this time, the temperature difference measured by the upstream and downstream thermocouple stacks should be the same.

The effect of fluid flow through is to shift the axis of symmetry of the temperature distribution in the downstream direction. The fluid will take away part of the heat energy in the area near the heating element, and transfer part of the heat energy to the hot junction and cold junction of the downstream thermocouple stack, so the temperature difference measured by the upstream and downstream thermocouple stacks will change, and the temperature difference measured by the upstream thermocouple stack will change. The temperature difference becomes smaller, and the temperature difference measured by the downstream thermocouple stack becomes larger. The value of this temperature difference change is related to the average flow velocity of the fluid, so the average flow velocity of the fluid can be deduced from this measurement.

The electrical signal measured by the flow sensor can be processed by a first-stage Sigma-Delta analog-to-digital converter. One-stage Sigma-Delta analog-to-digital converters have been widely used in sensor measurement circuits because of the advantages of simple circuit structure, cheap components, low noise level, and low power consumption.

Figure 4 is a block diagram of such a measurement circuit implementation. The circuit mainly includes a thermocouple stack 201 of the flow sensor, a preamplifier 202, a comparator (Comparator) or a quantizer (Quantizer) 204, a bidirectional analog switch (Transfergate) 205, a low-frequency digital filter 206, and an inverter ( Inverter) 207, a non-AND gate (NAND) 208, and a charge pump or unit digital-to-analog converter (D/A) 209, etc.

The flow sensor's thermocouple stack converts changes in flow rate into a voltage output. The preamplifier amplifies this voltage signal and feeds it to the comparator. The comparator consists of two inverters connected in series to compare the amplified thermocouple stack signal with the feedback signal from the converter. The output of the comparator drives the charge pump after passing through the NOT-AND gate. A bidirectional analog switch delays the output pulse of the comparator and allows the output pulse to be stored by a subsequent capacitor.

Circuit operation is synchronized by two phase non-overlapping clock signals _Φ1 and _Φ2 . In action I ( _Φ1 is low), transistor _P6 is turned off. In action II (Φ ₂ is in low position), the bidirectional analog switch is turned on, and the output of the comparator is sent to the NOT AND gate. At the same time, transistor _P5 is turned on, and capacitor _Cp is charged to the supply voltage value. In action III (Φ ₂ goes high), the output of the comparator is stored on the storage capacitor C _s , and at the same time the transistor P ₅ is turned off. During action IV ( _Φ1 rises), if the feedback voltage V _cint on the capacitor C _int is lower than the amplified thermocouple stack voltage V _th , the bias voltage V _b will be added to the gate of the transistor P ₆ . At this time, C _p is discharged through the transistor P ₆ , pumping a certain amount of charge to the capacitor C _int , and this process is repeated until the voltage V _cint is greater than the voltage V _th . The average value of the output clock pulses filtered by the low-frequency digital filter directly tracks the output voltage value of the thermocouple stack, thereby converting the analog signal of the thermocouple stack into a digital signal that can be processed by the microprocessor.

The manufacturing process of the all-silicon flow sensor of the present invention is shown in Fig. 4 to Fig. 7, these figures represent the cross section of the chip, and the lateral range of the chip just includes the lateral span of a sensor.

Referring to Fig. 1, the substrate material used to manufacture the sensor is a p-type doped single crystal silicon substrate 301, its crystal orientation is not particularly required, and its resistivity can range from low resistance to medium resistance, but preferably not more than 10 ohm-cm. The process begins with forming a silicon oxide layer 302 with a thickness of 1 micron on the upper surface of the silicon substrate 301 through thermal oxidation, and then proceeds to photolithography and etching to form a diffusion window masking pattern. The diffusion window is in the shape of a narrow strip with a width of 1-2 microns and a length of 50-200 microns. There are two groups, each group contains 12-48 strips, arranged in parallel at equal intervals, with a distance of 2-3 microns. The two groups are arranged side by side with a separation of 40-60 microns in the middle. Use the patterned silicon oxide layer as a mask to perform n-type doped thermal diffusion to form an n-type doped single crystal with a sheet resistance of 3-20 ohms/square and a thickness of 0.5-3 microns in the silicon substrate 301 Silicon diffusion bars 303A and 303B.

Referring to FIG. 5, the silicon oxide layer 302 on the surface of the silicon substrate 301 is etched and removed by dilute hydrofluoric acid solution, and then a silicon nitride layer 304 with a thickness of 2000-4000 angstroms is formed on the surface of the silicon substrate by low-pressure chemical vapor deposition. The silicon nitride layer 304 is photolithographically etched, so that the silicon nitride layer 304 becomes a mask pattern including rectangular openings. The rectangular opening must include two sets of n-type doped single crystal silicon diffusion strip arrays 303A and 303B, the arrays are arranged along the long side direction, and the outer ends of the arrays can be flush with the long side edges, or slightly forward Beyond 20-30 microns, the head and tail of the arrangement are kept 50-200 microns apart from the short edge.

Anodization is then carried out in a concentrated hydrofluoric acid solution, so that the p-type single crystal silicon region in the rectangular opening of the silicon oxide masking layer undergoes an anodic oxidation reaction to transform it into a porous single crystal silicon well 305 . The hydrofluoric acid solution used for anodizing contains a part of 49% hydrofluoric acid and a part of absolute ethanol, and the anodizing current density is controlled at 60-80 mA/cm2. The growth rate of the porous single crystal silicon obtained under this condition is 3-4 μm/min, and the porosity is 60-80%.

Because the anodic oxidation reaction is selective to the doping type and doping concentration of single crystal silicon, and this selectivity can be further highlighted by limiting the value of the applied voltage. Therefore, it is possible to keep the n-type doped single crystal silicon diffusion strips 303A and 303B from undergoing anodic oxidation reaction and not transform into porous single crystal silicon during the process of generating p-type porous single crystal silicon. Therefore, as shown in FIG. 5 , the monocrystalline silicon diffusion strips 303A and 303B are trapped in the porous monocrystalline silicon well 305 , and its bottom and periphery are surrounded by porous monocrystalline silicon to separate it from the silicon substrate.

The formed porous single crystal silicon well requires a depth of 40-80 microns, and a width of about 20-40 microns laterally extending to the surrounding. The whole well body looks like an inverted tapered platform. It should be noted that due to the lateral growth of porous single crystal silicon, the outer ends of the arrangement of n-type doped single crystal silicon diffusion bars are already in the porous single crystal silicon well, and keep a certain distance from the edge of the well. That is, the side surfaces of the n-type doped monocrystalline silicon diffusion strips are also surrounded by porous monocrystalline silicon. The surface of the resulting porous single crystal silicon well should be bright and smooth with the naked eye, just like the surface of a silicon substrate that has not been anodized.

After anodic oxidation, the thickness of the silicon nitride masking film on the silicon substrate 301 will become thinner, but a certain thickness remains. Corrosion must be continued in dilute hydrofluoric acid solution to completely remove it. Then blow dry the anodized silicon wafer with nitrogen gas at room temperature, and then carry out low-temperature thermal oxidation treatment. The oxidation temperature is 300 degrees Celsius, the oxidation atmosphere is dry oxygen, and the oxidation time is 1 hour. After this treatment, a silicon oxide layer with a thickness of about 20 angstroms will grow on the surface of the inner pores of the porous single crystal silicon, and thus the surface of the porous single crystal silicon well 305 will be 2000-5000 angstroms higher than the original plane.

Referring to FIG. 6 , on the surface of the silicon substrate 301 , including the surface of the porous single crystal silicon well 305 and the surface of the doped single crystal silicon strips 303A and 303B, a silicon oxide layer 306 with a thickness of about 5000 angstroms is deposited by low temperature chemical vapor phase. Then a p-type doped polysilicon layer is formed by low temperature chemical vapor deposition technology. The thickness of the polysilicon layer is 0.5-2 microns, and the square resistance of the doped surface is 5-20 ohms/square. The polysilicon layer is then processed by photolithography to form a pattern composed of polysilicon strips. The pattern includes p-type doped polycrystalline silicon strips 307A and 307B forming thermocouple stacks with n-type doped monocrystalline silicon strips, heat sinks 309A and 309B for two sets of thermocouples, heating element 310 and temperature measuring element 311 . It can be seen from the figure that the polysilicon strip covers the monocrystalline silicon strip below it, and the lower surface of the two end regions directly contacts the corresponding upper surface of the monocrystalline silicon strip below to form the hot junction and cold junction of the thermocouple stack. Only the hot junctions 308A and 308B close to the heating element can be seen in the figure, while the cold junctions close to the heat sink are not shown because they are not in the cross-section.

Referring to FIG. 7 , metallization is performed first, that is, metal wiring and bonding pads are formed, so as to provide channels for connecting external circuits to device elements formed on the silicon substrate, including thermocouple stacks, heating elements and temperature measuring elements. To this end, a metal film, such as an aluminum film, with a thickness of about 1 micron must be formed by electron beam evaporation or ion beam sputtering. Then photolithography and etching are carried out to form the required aluminum strips and aluminum squares. Then a lift-off process is performed, that is, a photoresist pattern is formed first, so that the photoresist only covers the pad area, and other device element areas must be exposed. Then an amorphous silicon carbide layer with a thickness of 2000-5000 angstroms is formed by ion beam enhanced vapor deposition technology. The photoresist is removed in a solution of the photoresist, thereby removing the amorphous silicon carbide layer on the pad area, and other areas without photoresist are covered with the amorphous silicon carbide layer. So far, the entire chip manufacturing process of the all-silicon flow sensor of the present invention has been completed.

The above description is limited to explaining the basic structure and implementation of the all-silicon flow sensor of the present invention. Under the guidance of this description, those skilled in the art can easily make partial supplements, modifications and adjustments, but all of them are within the scope covered by the claims of the present invention.

Claims (11)

1. An all-silicon integrated flow sensor, characterized in that the sensor consists of: A p-type monocrystalline silicon substrate; A rectangular porous single crystal silicon well, the well body is embedded in the single crystal silicon substrate, and the well surface is flat with the surface of the single crystal silicon substrate; Two sets of thermocouple stacks, with silicon strips of different doping types as their thermocouple pair materials, are all located in the upper area of the rectangular porous single crystal silicon well, and are arranged relatively parallel along the long side direction of the well, and the central junction column occupies the well area The central part of the well region, whose edge junction columns occupy the edge part of the well region; A heating element, located in the upper area of the rectangular porous single crystal silicon well, is arranged between the central junction columns of the two sets of thermocouple stacks along the longitudinal direction; Two heat sinks respectively cover the edge junctions of a group of thermocouples and extend to the surface of the single crystal silicon substrate outside the rectangular porous single crystal silicon well area; A temperature measuring element, located on the surface of the silicon single crystal substrate, and close to the heat sink of a group of thermocouple stacks; A number of internal wiring and solder pads provide channels for the thermocouple stack, heating element and temperature measuring element to connect to external circuits; and A passivating film that covers all thermocouple stacks, heating elements, heat sinks, and temperature sensing elements, isolating them from the fluid flowing through them. 2. The all-silicon integrated flow sensor according to claim 1, characterized in that said thermocouple stack is paired by n-type doped monocrystalline silicon strips and p-type doped polysilicon strips. 3. The all-silicon integrated flow sensor according to claim 1, characterized in that said heating element is a resistor formed by n-type doped single crystal silicon strips. 4. The all-silicon integrated flow sensor according to claim 1, characterized in that said heating element is a resistor formed of p-type doped polysilicon strips. 5. The all-silicon integrated flow sensor according to claim 1, characterized in that said temperature measuring element is a resistor formed of p-type doped polysilicon strips. 6. The all-silicon integrated flow sensor according to claim 1, characterized in that said passivation layer is an amorphous silicon carbide layer. 7. A method of manufacturing the integrated flow sensor as claimed in claim 1, the manufacturing steps comprising: Prepare a p-type monocrystalline silicon substrate; Two groups of n-type doped single crystal silicon strips are arranged in the single crystal silicon substrate through thermal diffusion; Perform anodic oxidation in a hydrofluoric acid solution to form a rectangular porous single crystal silicon well in the single crystal silicon substrate. The well area includes two sets of n-type doped single crystal silicon strips that do not form porous single crystal silicon. The bottom and sides of the monocrystalline silicon strip are surrounded by porous monocrystalline silicon, thereby separating it from the monocrystalline silicon substrate and from each other; Depositing a silicon oxide layer and performing photolithographic processing on it so that it covers the entire surface of the single crystal silicon substrate, the surface of the porous single crystal silicon well, and all upper surfaces of each single crystal silicon strip except two ends; Deposit a p-type doped polysilicon layer, and perform photolithography processing on it to form at least two sets of p-type doped polysilicon strips, each p-type doped polysilicon strip covers an n-type doped single layer below it crystalline silicon strips, and at both ends of each p-type doped polysilicon strip, respectively form a p-type doped polysilicon and n-type doped single crystal silicon junction in direct contact with each other; forming a heating resistance strip, which is arranged in the longitudinal direction between two sets of p-type doped polysilicon strips; Two heat sinks are formed, so that each heat sink is connected to the side ends of a group of p-type doped polysilicon strips, and extends to the single crystal silicon substrate area outside the porous single crystal silicon well area; forming a temperature measuring resistance strip so that it is close to a heat sink in the area of the single crystal silicon substrate; Forming a number of internal wiring and bonding pads through metallization to provide channels for connecting the thermocouple stack, heating element, and temperature measuring element to external circuits; and Deposit a passivation layer so that it covers all thermocouple stacks, heating elements, heat sinks, and temperature measuring elements. 8. The method of manufacturing an integrated flow sensor according to claim 7, characterized in that said heating element is a resistor formed of n-type doped single crystal silicon strips. 9. The method for manufacturing an integrated flow sensor according to claim 7, characterized in that said heating element is a resistor formed of p-type doped polycrystalline strips. 10. The method of manufacturing an integrated flow sensor according to claim 7, characterized in that said temperature measuring element is a resistor formed of p-type doped polysilicon strips. 11. The method of manufacturing an integrated flow sensor according to claim 7, characterized in that said passivation layer is an amorphous silicon carbide layer.

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