EP1490746A4 - Clock signal generating circuit - Google Patents

Clock signal generating circuit

Info

Publication number: EP1490746A4
Authority: EP; European Patent Office
Prior art keywords: clock signal; signal generating; generating circuit; circuit; clock
Prior art date: 2002-04-04
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Withdrawn

Application number

EP03718218A

Other languages

German (de)

French (fr)

Other versions

EP1490746A1 (en

Inventor

Conrad H Ziesler

Marios C Papaefthymiou

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

University of Michigan System

University of Michigan Ann Arbor

Original Assignee

University of Michigan System

University of Michigan Ann Arbor

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2002-04-04

Filing date

2003-04-04

Publication date

2009-09-09

2003-04-04 Application filed by University of Michigan System, University of Michigan Ann Arbor filed Critical University of Michigan System

2004-12-29 Publication of EP1490746A1 publication Critical patent/EP1490746A1/en

2009-09-09 Publication of EP1490746A4 publication Critical patent/EP1490746A4/en

Status Withdrawn legal-status Critical Current

Links

Classifications

- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/06—Clock generators producing several clock signals
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
- H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Pulse Circuits (AREA)
Manipulation Of Pulses (AREA)

EP03718218A 2002-04-04 2003-04-04 Clock signal generating circuit Withdrawn EP1490746A4 (en)

Applications Claiming Priority (5)

Application Number	Priority Date	Filing Date	Title
US37011702P	2002-04-04	2002-04-04
US370117P		2002-04-04
US10/406,126 US6742132B2 (en)	2002-04-04	2003-04-03	Method and apparatus for generating a clock signal having a driven oscillator circuit formed with energy storage characteristics of a memory storage device
US406126		2003-04-03
PCT/US2003/010465 WO2003088020A1 (en)	2002-04-04	2003-04-04	Clock signal generating circuit

Publications (2)

Publication Number	Publication Date
EP1490746A1 EP1490746A1 (en)	2004-12-29
EP1490746A4 true EP1490746A4 (en)	2009-09-09

Family

ID=28678314

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
EP03718218A Withdrawn EP1490746A4 (en)	2002-04-04	2003-04-04	Clock signal generating circuit

Country Status (6)

Country	Link
US (1)	US6742132B2 (en)
EP (1)	EP1490746A4 (en)
JP (1)	JP2005521978A (en)
KR (1)	KR100965642B1 (en)
AU (1)	AU2003221819A1 (en)
WO (1)	WO2003088020A1 (en)

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JP2006228522A (en) *	2005-02-16	2006-08-31	Denso Corp	Spark plug for internal combustion engine
US7622977B2 (en) *	2005-10-27	2009-11-24	The Regents Of The University Of Michigan	Ramped clock digital storage control
US7973565B2 (en) *	2007-05-23	2011-07-05	Cyclos Semiconductor, Inc.	Resonant clock and interconnect architecture for digital devices with multiple clock networks
US8502569B2 (en) *	2009-10-12	2013-08-06	Cyclos Semiconductor, Inc.	Architecture for operating resonant clock network in conventional mode
US9612614B2 (en)	2015-07-31	2017-04-04	International Business Machines Corporation	Pulse-drive resonant clock with on-the-fly mode change
US9634654B2 (en)	2015-08-07	2017-04-25	International Business Machines Corporation	Sequenced pulse-width adjustment in a resonant clocking circuit
US9568548B1 (en)	2015-10-14	2017-02-14	International Business Machines Corporation	Measurement of signal delays in microprocessor integrated circuits with sub-picosecond accuracy using frequency stepping
US10116294B1 (en) *	2017-04-26	2018-10-30	Texas Instruments Incorporated	High-resolution FET VDS zero-volt-crossing timing detection scheme in a wireless power transfer system
US12347522B2 (en) *	2022-04-27	2025-07-01	Synopsys, Inc.	On-chip automation of clock-to-Q access time measurement of a memory device

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JPS55143841A (en) *	1979-04-26	1980-11-10	Seiko Epson Corp	Oscillating circuit
JPS63246865A (en) *	1987-04-02	1988-10-13	Oki Electric Ind Co Ltd	Cmos semiconductor device and manufacture thereof
US5155451A (en)	1992-02-18	1992-10-13	Motorola, Inc.	Circuit and method for dynamically generating a clock signal
KR960016605B1 (en)	1992-11-20	1996-12-16	마쯔시다 덴꼬 가부시끼가이샤	Power supply
JPH06243684A (en) *	1993-02-17	1994-09-02	Tane Chiba	Storage circuit
US5559463A (en) *	1994-04-18	1996-09-24	Lucent Technologies Inc.	Low power clock circuit
US5473526A (en)	1994-04-22	1995-12-05	University Of Southern California	System and method for power-efficient charging and discharging of a capacitive load from a single source
US5517145A (en)	1994-10-31	1996-05-14	International Business Machines Corporation	CMOS toggle flip-flop using adiabatic switching
US5506520A (en)	1995-01-11	1996-04-09	International Business Machines Corporation	Energy conserving clock pulse generating circuits
US5508639A (en)	1995-01-13	1996-04-16	Texas Instruments Incorporated	CMOS clock drivers with inductive coupling
US5526319A (en)	1995-01-31	1996-06-11	International Business Machines Corporation	Memory with adiabatically switched bit lines
JP3493646B2 (en) *	1995-03-22	2004-02-03	横河電機株式会社	Feedback differential amplifier circuit
US5559478A (en)	1995-07-17	1996-09-24	University Of Southern California	Highly efficient, complementary, resonant pulse generation
JP3233557B2 (en)	1995-07-21	2001-11-26	シャープ株式会社	Method and apparatus for measuring threshold characteristics of semiconductor integrated circuit
JPH1075119A (en) *	1996-08-29	1998-03-17	Mitsumi Electric Co Ltd	Oscillator
US5838203A (en)	1996-12-06	1998-11-17	Intel Corporation	Method and apparatus for generating waveforms using adiabatic circuitry
US6242951B1 (en)	1997-09-05	2001-06-05	Shunji Nakata	Adiabatic charging logic circuit
KR100277903B1 (en)	1998-10-19	2001-01-15	김영환	Micro processor having variable clock operation
US6438422B1 (en)	1998-10-28	2002-08-20	Medtronic, Inc.	Power dissipation reduction in medical devices using adiabatic logic
US6538346B2 (en)	1998-11-25	2003-03-25	Stmicroelectronics S.R.L.	System for driving a reactive load
US6144610A (en) *	1999-04-20	2000-11-07	Winbond Electronics Corporation	Distributed circuits to turn off word lines in a memory array
US6448816B1 (en)	2000-07-11	2002-09-10	Piconetics, Inc.	Resonant logic and the implementation of low power digital integrated circuits
KR100403810B1 (en)	2001-03-09	2003-10-30	삼성전자주식회사	Hybrid power supply circuit and method for charging/discharging a logic circuit using the same

2003
- 2003-04-03 US US10/406,126 patent/US6742132B2/en not_active Expired - Lifetime
- 2003-04-04 WO PCT/US2003/010465 patent/WO2003088020A1/en not_active Ceased
- 2003-04-04 AU AU2003221819A patent/AU2003221819A1/en not_active Abandoned
- 2003-04-04 JP JP2003584896A patent/JP2005521978A/en active Pending
- 2003-04-04 KR KR1020047015766A patent/KR100965642B1/en not_active Expired - Fee Related
- 2003-04-04 EP EP03718218A patent/EP1490746A4/en not_active Withdrawn

Non-Patent Citations (5)

* Cited by examiner, † Cited by third party
Title
MAKSIMOVIC D ET AL: "Integrated power clock generators for low energy logic", POWER ELECTRONICS SPECIALISTS CONFERENCE, 1995. PESC '95 RECORD., 26TH ANNUAL IEEE ATLANTA, GA, USA 18-22 JUNE 1995, NEW YORK, NY, USA,IEEE, US, vol. 1, 18 June 1995 (1995-06-18), pages 61 - 67, XP010150539, ISBN: 978-0-7803-2730-6 *
MOON Y ET AL: "AN EFFICIENT CHARGE RECOVERY LOGIC CIRCUIT", IEICE TRANSACTIONS ON ELECTRONICS, ELECTRONICS SOCIETY, TOKYO, JP, vol. E79-C, no. 7, 1 July 1996 (1996-07-01), pages 925 - 933, XP000632346, ISSN: 0916-8524 *
NG K W ET AL: "ECRL-based low power flip-flop design", MICROELECTRONICS JOURNAL, MACKINTOSH PUBLICATIONS LTD. LUTON, GB, vol. 31, no. 5, 1 May 2000 (2000-05-01), pages 365 - 370, XP004193981, ISSN: 0026-2692 *
See also references of WO03088020A1 *
ZIESLER C H ET AL: "Energy recovering ASIC design", VLSI, 2003. PROCEEDINGS. IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON 20-21 FEB. 2003, PISCATAWAY, NJ, USA,IEEE, 20 February 2003 (2003-02-20), pages 133 - 138, XP010629445, ISBN: 978-0-7695-1904-3 *

Also Published As

Publication number	Publication date
US6742132B2 (en)	2004-05-25
AU2003221819A1 (en)	2003-10-27
JP2005521978A (en)	2005-07-21
WO2003088020A1 (en)	2003-10-23
US20030191977A1 (en)	2003-10-09
EP1490746A1 (en)	2004-12-29
KR20050011738A (en)	2005-01-29
KR100965642B1 (en)	2010-06-23

Legal Events

Date	Code	Title	Description
2004-11-12	PUAI	Public reference made under article 153(3) epc to a published international application that has entered the european phase	Free format text: ORIGINAL CODE: 0009012
2004-12-29	17P	Request for examination filed	Effective date: 20041004
2004-12-29	AK	Designated contracting states	Kind code of ref document: A1 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LI LU MC NL PT RO SE SI SK TR
2004-12-29	AX	Request for extension of the european patent	Extension state: AL LT LV MK
2009-09-09	A4	Supplementary search report drawn up and despatched	Effective date: 20090810
2009-09-09	RIC1	Information provided on ipc code assigned before grant	Ipc: H03K 3/02 20060101ALI20090804BHEP Ipc: H02M 7/5383 20070101ALI20090804BHEP Ipc: H03K 3/356 20060101ALI20090804BHEP Ipc: G06F 1/26 20060101ALI20090804BHEP Ipc: G06F 1/04 20060101AFI20031029BHEP
2009-11-18	17Q	First examination report despatched	Effective date: 20091016
2011-05-13	STAA	Information on the status of an ep patent application or granted ep patent	Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN
2011-06-15	18D	Application deemed to be withdrawn	Effective date: 20101223

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