EP2715732A4 - APPARATUS COMPRISING MEMORY SYSTEM CONTROLLERS AND ASSOCIATED METHODS - Google Patents

APPARATUS COMPRISING MEMORY SYSTEM CONTROLLERS AND ASSOCIATED METHODS

Info

Publication number
EP2715732A4
EP2715732A4 EP12793596.3A EP12793596A EP2715732A4 EP 2715732 A4 EP2715732 A4 EP 2715732A4 EP 12793596 A EP12793596 A EP 12793596A EP 2715732 A4 EP2715732 A4 EP 2715732A4
Authority
EP
European Patent Office
Prior art keywords
memory system
associated methods
system controllers
controllers
methods
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP12793596.3A
Other languages
German (de)
French (fr)
Other versions
EP2715732B1 (en
EP2715732A2 (en
Inventor
Douglas A Larson
Jeffrey R Brown
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Technology Inc
Original Assignee
Micron Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Micron Technology Inc filed Critical Micron Technology Inc
Publication of EP2715732A2 publication Critical patent/EP2715732A2/en
Publication of EP2715732A4 publication Critical patent/EP2715732A4/en
Application granted granted Critical
Publication of EP2715732B1 publication Critical patent/EP2715732B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G06F3/0613—Improving I/O performance in relation to throughput
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
EP12793596.3A 2011-05-31 2012-05-24 Apparatus including memory system controllers and related methods Active EP2715732B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/149,461 US8543758B2 (en) 2011-05-31 2011-05-31 Apparatus including memory channel control circuit and related methods for relaying commands to logical units
PCT/US2012/039364 WO2012166522A2 (en) 2011-05-31 2012-05-24 Apparatus including memory system controllers and related methods

Publications (3)

Publication Number Publication Date
EP2715732A2 EP2715732A2 (en) 2014-04-09
EP2715732A4 true EP2715732A4 (en) 2015-02-18
EP2715732B1 EP2715732B1 (en) 2018-11-21

Family

ID=47260199

Family Applications (1)

Application Number Title Priority Date Filing Date
EP12793596.3A Active EP2715732B1 (en) 2011-05-31 2012-05-24 Apparatus including memory system controllers and related methods

Country Status (7)

Country Link
US (2) US8543758B2 (en)
EP (1) EP2715732B1 (en)
JP (2) JP2014515533A (en)
KR (1) KR101560469B1 (en)
CN (1) CN103650054B (en)
TW (1) TWI477965B (en)
WO (1) WO2012166522A2 (en)

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KR102164617B1 (en) 2014-03-24 2020-10-12 삼성전자주식회사 Method for operating a data storage device and method for operating a system including the same
US9582211B2 (en) * 2014-04-29 2017-02-28 Sandisk Technologies Llc Throttling command execution in non-volatile memory systems based on power usage
KR102211709B1 (en) 2014-05-19 2021-02-02 삼성전자주식회사 Non-volatile Memory System and Host Device improving a signal characteristic and Operating Method of thereof
CN104156432A (en) * 2014-08-08 2014-11-19 四川九成信息技术有限公司 File access method
US9679658B2 (en) 2015-06-26 2017-06-13 Intel Corporation Method and apparatus for reducing read latency for a block erasable non-volatile memory
US10719237B2 (en) * 2016-01-11 2020-07-21 Micron Technology, Inc. Apparatuses and methods for concurrently accessing multiple partitions of a non-volatile memory
DE102017112446B4 (en) * 2016-08-26 2025-09-18 SanDisk Technologies, Inc. Electrically buffered NV-DIMM and method of use therewith
JP2018073038A (en) 2016-10-27 2018-05-10 東芝メモリ株式会社 Memory system
CN117669631A (en) * 2017-06-05 2024-03-08 铠侠股份有限公司 Memory cards and host devices
TWI640920B (en) * 2017-06-30 2018-11-11 慧榮科技股份有限公司 Data storage device and method for operating non-volatile memory and method for executing operational instructions
CN110908591B (en) * 2018-09-17 2023-05-30 群联电子股份有限公司 Memory management method, memory storage device and memory control circuit unit
US20200272564A1 (en) 2019-02-22 2020-08-27 Micron Technology, Inc. Memory device interface and method
US11036633B2 (en) * 2019-08-22 2021-06-15 Micron Technology, Inc. Hierarchical memory apparatus
WO2021069942A1 (en) 2019-10-09 2021-04-15 Micron Technology, Inc. Memory device equipped with data protection scheme
EP4081954A4 (en) 2019-12-27 2023-04-05 Micron Technology, Inc. NEUROMORPHIC MEMORY DEVICE AND METHOD
KR20220116258A (en) 2019-12-30 2022-08-22 마이크론 테크놀로지, 인크. Memory device interfaces and methods
CN114902332A (en) 2019-12-31 2022-08-12 美光科技公司 Memory module multiport buffering technique
US11150841B2 (en) * 2020-02-10 2021-10-19 Western Digital Technologies, Inc. NAND dropped command detection and recovery
US11294832B2 (en) * 2020-03-20 2022-04-05 Western Digital Technologies, Inc. Systems and methods for queuing device management configuration requests
TWI761992B (en) 2020-10-16 2022-04-21 創鑫智慧股份有限公司 Data computing device and operation method thereof
KR20220167077A (en) * 2021-06-11 2022-12-20 에스케이하이닉스 주식회사 Storage device and operating method thereof
US12293077B2 (en) 2022-07-06 2025-05-06 Samsung Electronics Co., Ltd. Systems, methods, and devices for using a reclaim unit based on a reference update in a storage device
US12079517B2 (en) * 2022-07-21 2024-09-03 Micron Technology, Inc. Buffer allocation for reducing block transit penalty
CN119512846A (en) * 2025-01-20 2025-02-25 成都佰维存储科技有限公司 Wear leveling function testing method, device, readable storage medium and electronic device

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WO2009064793A1 (en) * 2007-11-15 2009-05-22 Micron Technology, Inc. System, apparatus, and method for modifying the order of memory accesses
WO2010080142A2 (en) * 2009-01-09 2010-07-15 Micron Technology, Inc. Modifying commands

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US20090125671A1 (en) * 2006-12-06 2009-05-14 David Flynn Apparatus, system, and method for storage space recovery after reaching a read count limit
WO2009064793A1 (en) * 2007-11-15 2009-05-22 Micron Technology, Inc. System, apparatus, and method for modifying the order of memory accesses
WO2010080142A2 (en) * 2009-01-09 2010-07-15 Micron Technology, Inc. Modifying commands

Also Published As

Publication number Publication date
US8543758B2 (en) 2013-09-24
JP6163532B2 (en) 2017-07-12
JP2014515533A (en) 2014-06-30
US9430373B2 (en) 2016-08-30
US20140025876A1 (en) 2014-01-23
TW201310233A (en) 2013-03-01
CN103650054B (en) 2017-02-15
CN103650054A (en) 2014-03-19
EP2715732B1 (en) 2018-11-21
JP2016053983A (en) 2016-04-14
US20120311230A1 (en) 2012-12-06
KR101560469B1 (en) 2015-10-14
WO2012166522A3 (en) 2013-03-21
WO2012166522A2 (en) 2012-12-06
KR20140013098A (en) 2014-02-04
EP2715732A2 (en) 2014-04-09
TWI477965B (en) 2015-03-21

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