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  • H10W72/01231—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition
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  • H10W72/01235—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
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  • H10W72/01261—Chemical or physical modification, e.g. by sintering or anodisation
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  • H10W72/072—Connecting or disconnecting of bump connectors
  • H10W72/07231—Techniques
  • H10W72/07232—Compression bonding, e.g. thermocompression bonding
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  • H10W72/072—Connecting or disconnecting of bump connectors
  • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
  • H10W72/07253—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in shapes
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  • H10W72/071—Connecting or disconnecting
  • H10W72/072—Connecting or disconnecting of bump connectors
  • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
  • H10W72/07255—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in materials
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  • H10W72/221—Structures or relative sizes
  • H10W72/222—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
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  • H10W72/231—Shapes
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  • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
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  • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
  • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Definitions

• Assembly comprising mixed interconnect means having interconnect intermediate elements and metal sintered joints and method of manufacture
• the field of the invention is that of the 3D semiconductor assembly comprising electrical interconnections.
• 3D assembly solutions are of great interest for various applications in microelectronics and power electronics.
• the connectivity between the chip and the circuit can be achieved by various techniques and in particular by wired wiring commonly referred to as “wire bonding", by ribbons or by the type of report technology "Flip Chip”.
• Microcable wiring is the oldest and most common technology in the microelectronics industry for interconnecting a "chip” circuit with its environment (housing, circuit board, hybrid circuit). .), it may be "Wedge bonding” or "Bail bonding”:
• a wire usually aluminum is brought by the tool (called stylus or needle), then applied to the weld pad.
• the connection between the wire and the zone to be connected is effected by combining pressure and ultrasonic vibration. This is a “cold” weld. It is the ultrasonic energy that causes a softening of the wire similar to the effect obtained by a rise in temperature.
• the wire is then guided by the tool on the second stud and a weld is performed;
• a gold wire passes through a heated capillary (100 to 200 ° C.).
• the ball formed at the outlet of the capillary (by the discharge of a capacitor or by a flame of hydrogen) is soldered to an output terminal of the circuit.
• the capillary is then moved to perform the second weld.
• the wire is torn off by the capillary, a new ball is reformed and a new connection can be made.
• connection pads commonly called by the man of the 'pad' art located on the circuit or on the electronic component then to align the component and the circuit to match each circuit pad to the semiconductor pad.
• the circuit and the substrate are brought into contact and a brazing process is performed to ensure electrical and mechanical contact between the semiconductor and the substrate.
• This technique is not practical for all applications and may have several disadvantages such as the need for specific metal layers on the pads to be connected involving additional processes and therefore high costs, the need for a temperature at least equal to that fusion of the solder, and the difficulty of making up a difference of several m or several tens of meters in height that may be present on certain components.
• the brazing process induces a risk of non-negligible short circuit when the distances between electrodes are low following the flow of the solder during its fusion.
• Nanoparticle paste for interconnect and method of use. It consists of replacing the connection commonly referred to as “soldering bump” of the soldering "bump” technique by a nanoparticle paste (Ag, Au or Cu) to be sintered.
• This technology also has disadvantages such as the need for a suitable metallization of the pads (Au or Ag but not compatible with the AI very often used as finishing chips).
• a second disadvantage of this technique is the low joint height (generally 10 microns) which can limit the thermomechanical reliability of the joints as well as the choice of underfills (encapsulating materials) which must fill the gaps (most often by capillarity).
• a metal ball is attached to the stud by using thermosonic or thermo-compression techniques.
• the wire is cut just after the ball forming the form of "stud bump” still called intermediate interconnect element.
• the "stud bumps” formed on the connection pad of the semiconductor or on that of the circuit are attached to the other connection pad by thermo-compression.
• a disadvantage of this technique is the possibility of adhesion problems between the metallization and the "stud bump" during the thermo-compression due to the absence or the small thickness of the metal layer required.
• the present invention aims to solve one or more of the disadvantages of the various techniques mentioned above. It consists in producing mixed electrical and mechanical interconnections comprising so-called intermediate interconnection elements that may correspond, for example, to "stud bumps" combined with sintered joints obtained for example from paste or film of microparticles or metal nanoparticles. More specifically, the present invention relates to an assembly comprising:
• At least one first element comprising at least one first electrical connection pad
• At least one second element comprising at least a second electrical connection pad or a surface metallization; electrical and mechanical interconnection means;
• the melting temperature of said first interconnecting metal intermediate element being greater than the sintering temperature of said microparticles or said metal nanoparticles.
• One of the advantages of the present invention lies in the fact that the intermediate interconnection elements are previously defined, and have a temperature resistance which is not impaired by the sintering of the microparticles or metal nanoparticles, making it possible to carry out interconnections of heterogeneous stacked elements that provide the desired features.
• the assembly further comprises at least a second intermediate metallic interconnection element, on the surface of at least a second electrical connection pad.
• At least one of the elements comprises a semiconductor component.
• At least one of the elements comprises an electronic circuit.
• the configuration of the assembly of the present invention is particularly well suited to compensate for heights (also called thicknesses) for example in the context of chip (s) reported (s) to a connection circuit in said assembly.
• At least one component on the surface of said second element at least one first stack comprising at least one alternation of several intermediate metal interconnection elements and sintered joints;
• At least one second stack in contact with said component comprising at least one metallic intermediate interconnection element and at least one sintered joint;
• the number of metal intermediate elements in said second stack being smaller than the number of interconnecting metal intermediate elements in said first stack.
• the number of interconnecting metal intermediate elements in contact with a connection pad varies along the thickness of the electrical and mechanical interconnection means.
• the size of the interconnecting metal intermediate elements varies along the thickness of the electrical and mechanical interconnection means.
• the assembly of the present invention can thus also comprise several components that can have different heights and whose height variations can be compensated by numbers of interconnect metal intermediate elements and different numbers of joints.
• At least one of the elements is a ceramic substrate that may be Al 2 0 3 or Si 3 N 4 or AlN and may comprise at least one metal layer on one of its faces .
• the at least first connection pad and / or the at least second connection pad is (are) silver or gold or copper.
• the at least second connection pad is made of aluminum, the at least first connection pad being made of silver or gold or copper. Indeed, this allows the realization of the necessary sintering operation that can not be performed on an aluminum connection pad.
• an assembly comprising at least a first interconnecting metal intermediate element and at least a second interconnecting metal intermediate element, thus isolating at least one first connection pad of at least one sintered seal and at least one a second connection pad of said sintered joint, it is possible to have aluminum connection pads at at least one of the two elements.
• the assembly may thus comprise at least one second aluminum connection pad, and / or at least one first aluminum connection pad.
• the interconnecting metal intermediate element is a pressed metal ball.
• the sintered seal is made of silver or gold or copper or metal alloy comprising two of the aforementioned metals.
• the sintered seal has a thickness of the order of a few microns, which can be between 1 micron and several tens of microns.
• the metal intermediate interconnect element has a thickness of the order of several tens of microns, which can be between 10 microns and 100 microns.
• the assembly comprising a plurality of interconnecting metal intermediate elements, at least a part of the interconnections comprising said joints and said interconnecting metal intermediate elements have different heights of joints and / or elements of interconnection. interconnection.
• the invention also relates to a method for manufacturing an assembly comprising:
• At least one first element comprising at least one first electrical connection pad
• At least one second element comprising at least a second electrical connection pad
• electrical and mechanical interconnection means comprising at least a first intermediate element interconnection metal, said method comprising the following steps:
• the melting temperature of said first intermediate metal interconnect element being greater than the sintering temperature of said microparticles or metal nanoparticles.
• the method further comprises producing at least a second intermediate metallic interconnection element on at least one second connection pad.
• the method comprises the production of at least one metallic intermediate interconnection element on the surface of at least one sintered joint previously made.
• connection stacks may comprise alternating sintered seals and metal intermediate elements, the number of which varies to compensate for the thickness of the component in the assembly, with respect to the interconnections consisting of sintered joints and intermediate elements. metal.
• the number of interconnecting metal elements in contact with a sintered joint varies along the thickness of said electrical and mechanical interconnection means.
• the size of the interconnecting metal intermediate elements in contact with a sintered joint varies along the thickness of said electrical and mechanical interconnection means.
• the sintering operation is carried out at a low pressure of less than or equal to 100 g / cm 2 .
• the method further comprises the application of a first pressure on at least said first intermediate metallic interconnection element, before the sintering operation.
• the metallic intermediate interconnect element is formed on the surface of at least one electrical connection pad, from a wire forming a metal ball made integral with said electrical connection pad by a thermosonic technique or by thermocompression.
• the intermediate element is a metal abutment
• said metallic abutment (which may be made of copper) may be produced according to conventional microelectronics methods using resin photolithography and electro-deposition of copper for to form metal pillars on substrates.
• the cutting of the substrate to have single pieces (chips) can be done generally after obtaining the pillars.
• the sintering operation is carried out at a second pressure lower than said first pressure.
• the method comprises the following steps:
• the method comprises heating and pressing of said first metallic intermediate element interconnection device contacted with a dry film of microparticles or metal nanoparticles which may be on the surface of a flexible support, leading to the penetration of a portion of said first intermediate element in said metal dry film, to the breaking of said film and forming at least one metal dry film element of microparticles or nanoparticles on the surface of at least said intermediate interconnection element.
• the invention also relates to an assembly obtained according to the manufacturing method of the invention.
• FIGS. 1a to 1f illustrate the main steps of a first example of a method of manufacturing an assembly according to the invention
• FIGS. 2a to 2f illustrate the main steps of a second exemplary method of manufacturing a second assembly variant according to the invention, comprising second intermediate interconnection elements;
• FIGS. 3a to 3f illustrate the main steps of a third example of a method of manufacturing an assembly according to the invention using a dry film of metal nanoparticles
• FIGS. 4a to 4e illustrate an example of a method with the production of metal pillars
• FIGS. 5a and 5b illustrate an assembly example of the invention comprising a stack of alternating intermediate elements and sintered joints making it possible to compensate the height of a chip in an assembly;
• FIGS. 6a to 6h illustrate the steps of an exemplary method of the invention making it possible to produce the assembly example illustrated in FIGS. 5b;
• FIG. 7 illustrates a variant of assembly example comprising a stack of several intermediate elements and of several sintered joints;
• FIGS. 9a to 9h illustrate the steps of an exemplary method of the invention making it possible to produce an assembly example comprising different numbers of interconnecting metal intermediate elements, along the stacks: metal intermediate elements of FIG. interconnection / sintered joint;
• FIGS. 10a and 10b illustrate the electrical characteristics of a Gallium nitride HEMT component assembled in "flip chip" on a DBC type circuit.
• the present invention relates to an assembly and a method of manufacturing an assembly for making electrical interconnections that can operate at temperatures above 300 ° C with a process temperature profile of less than 250 ° C and very low pressures ⁇ 100 g / cm 2 .
• the intermediate electrical connection element can typically be an element corresponding to a "stup bump", on a connection pad of a first element that can typically be a circuit or on the connection pad of a second element that can typically comprise a or a plurality of semiconductor components or both, the intermediate element being obtainable by thermosonic or thermo-compression technique.
• a pressure can then be applied on the intermediate element of connection type "stud bump" to deform and in the case of several intermediate interconnection elements to standardize their height.
• the intermediate interconnection elements may be covered by the paste of microparticles or metal nanoparticles by dispensing (controlled quantity without the use of masks).
• the pads of the semiconductors are aligned with the corresponding circuit pads and a low pressure ( ⁇ 100 g / cm 2 ) is applied to ensure contact between the pads. A temperature cycle for sintering the nanoparticle paste is then applied.
• a height of the joint adjustable by the "stud bumps" and the dough allows use of a wider variety of encapsulating materials because of the simplicity of filling voids with higher heights (encapsulant having larger viscosities and loaded with larger particles) and minimization of thermomechanical stresses);
• thermosonics From a first element of the DBC substrate type, 100 comprising a ceramic substrate 1 1, and a lower metal layer 10 and connection pads 12, intermediate interconnection elements 13 are produced by thermosonics.
• connection pads are made with a Ni / Au topcoat (2m / 50nm).
• the diameter of the Au wire used is 38 m.
• the minimum size of the connection pads 12 on which the intermediate interconnection elements will be made must preferably be at least 2 times greater than the diameter of the bonding wires.
• a matrix of 7x7 intermediate interconnection elements is made with a distance of 300 m between two consecutive interconnecting intermediate elements.
• Bonding conditions substrate temperature, power and ultrasound time, applied pressure
• the height of the intermediate interconnect elements is standardized by applying a force of 100g / interconnection intermediate element by a flat and rigid surface (glass or silicon). This force is sufficient to deform the intermediate interconnection elements and to obtain an interconnect intermediate element height of 40 m.
• the diameter of the intermediate interconnect element pressed is about 120 m.
• a paste of silver nanoparticles is used to attach the interconnect intermediate elements made on the DBC circuit to the finishing metal of the chip corresponding to the second element to be assembled (the finishing metal may typically be gold).
• a controlled quantity of the nanoparticle paste 14 is deposited on the interconnection intermediate elements by means of a manual dispenser.
• the dispensing process can be done automatically through automatic dispensing machines on the market (eg ASYMTEK Quantum series).
• a silicon chip 200 comprising a component 20 and a layer Ni / Au 21 finish is then reported in "Flip chip” technique on the matrix of the circuit.
• Step 5 illustrated in Figure 1 e Step 5 illustrated in Figure 1 e:
• a pressure of 100 g / cm 2 is applied to the chip to ensure contact between pads 21, the dough elements 14 previously stacked with intermediate elements interconnection 13 made on the surface of the connection pads 12 to perform the assembly of the circuit 100 and the chip 200.
• a sintering step of the paste containing silver nanoparticles is carried out by rising at 250 ° C. under air for 20 minutes with a controlled climb ramp (5 ° C / min). Following this step, all the organic materials forming the paste (solvent, binder, dispersant) are evaporated and the final seal is formed just of silver.
• a mechanical rigidity test in shear is carried out to test the mechanical rigidity of the joint.
• a force of 3 kg is required to pull the chip, which amounts to an average force of 61 g / interconnect stack.
• the seal is detached at the interface between the sintered seal and the finish of the chip which is the most critical interface in the present configuration.
• the sintered seal may have a thickness of between about 1 ⁇ and 10 ⁇ .
• first intermediate interconnection elements 13 are made by thermosonics.
• thermosonic interconnection elements 22 In parallel, a second silicon chip-type element 200 comprising a component 20 and a Ni / Au-finish layer 21, second intermediate thermosonic interconnection elements 22 is also produced.
• the height of the intermediate interconnection elements 13 and 22 is standardized by applying a force of 100 g / interconnection intermediate element by a flat and rigid surface (glass or silicon). This force is sufficient to deform the intermediate interconnection elements and to obtain an interconnect intermediate element height of 40 m.
• the diameter of the intermediate interconnect element pressed is about 120 m.
• a paste of silver nanoparticles is used to attach the intermediate interconnection elements made on the DBC circuit to the intermediate interconnection elements of the chip corresponding to the second element to be assembled (the finishing metal can typically be gold).
• the finishing metal can typically be gold.
• a controlled quantity of the nanoparticle paste 14 is deposited on the interconnection intermediate elements 13 by means of a manual dispenser. The dispensing process can be done automatically through automatic dispensing machines on the market (eg ASYMTEK Quantum series).
• the silicon chip 200 comprising a component 20, a Ni / Au finish layer 21, intermediate interconnection elements 22, is then reported in the "Flip chip” technique on the matrix of the circuit 100.
• a pressure of 100 g / cm 2 is applied on the chip to ensure contact between the different pads 21, the intermediate interconnection elements 22, the dough elements 14 previously stacked with the intermediate interconnection elements 13 made on the surface of the connection pads 12 for assembling the circuit 100 and the chip 200.
• a sintering step of the paste containing silver nanoparticles is carried out by rising at 250 ° C. under air for 20 minutes with a controlled rise ramp (5 ° C./min). Following this step, all the organic materials forming the paste (solvent, binder, dispersant) are evaporated and the final seal is formed just of silver.
• a third example of a method of manufacturing an assembly comprising first intermediate electrical and mechanical interconnection elements according to the invention is described below: The first and second process steps illustrated in FIGS. 3a and 3b are identical to those of the first exemplary method (illustrated in Figure 1a and 1b).
• the first interconnection elements 13 on the surface of the first metal studs 12 are heated and then pressed onto a dry metal film of microparticles or nanoparticles 31 which is placed on a flexible material forming the support 30.
• the temperature is of the order of 100 ° C to activate the adhesion during the contact with the film.
• the height of the intermediate interconnect elements is chosen greater than the depth of penetration into the film, so that the connection pads 12 are not in contact with said film.
• the first intermediate interconnection elements penetrate several ⁇ into the film and the surfaces of the dry film which are in contact with the interconnection element can separate from the rest of the film, creating dry film elements 31 which adhere to the intermediate elements. interconnection, (to do so, the adhesive force between the first element and the film is greater than that existing between the film and the flexible support), as shown in Figure 3d. The film is thus somehow stamped on the interconnection elements.
• a silicon chip comprising a component 20 and a Ni / Au finish layer 21 is then reported in "Flip chip” technique on the matrix of the circuit.
• a pressure of 10 kg / cm 2 is applied on the chip to ensure the contact between the different pads 21, the film elements 31 previously stacked with the intermediate interconnection elements 13 made on the surface of the connection pads 12 for assembling the circuit 100 and the chip 200.
• a sintering step of the film containing silver nanoparticles is carried out by rising at 250 ° C under air for 20 minutes with a ramp controlled rise (5 ° C / min).
• a fourth example of a method of manufacturing an assembly comprising first intermediate elements of electrical and mechanical interconnect type pillars, according to the invention is described below:
• a Ni / Au 21 finish and copper pillars 22 are produced by conventional microelectronics methods using photolithography of resins and electro-deposition of copper. to form metal pillars on substrates.
• the cutting of the substrate to have single pieces (chips) can be done generally after obtaining the pillars.
• Exemplary prior piers 22 are produced by depositing nanoparticle paste.
• a controlled quantity of the metal nanoparticle paste 14 is deposited on the interconnection intermediate elements by means of a manual dispenser, so as to form the elements 23 of metal paste to be sintered.
• a pressure of 100 g / cm 2 is applied on the chip to ensure contact between the different pads 21, the intermediate elements interconnection 22, the dough elements 23 stacked on the connection pads 12 to achieve the assembly of the circuit and the chip.
• a sintering step of the paste containing silver nanoparticles is carried out by rising at 250 ° C. under air for 20 minutes with a controlled rise ramp (5 ° C./min). Following this step, all the organic materials forming the paste (solvent, binder, dispersant) are evaporated and the final seal is formed just of silver.
• FIG. 5a thus illustrates a chip 40, connected via a seal 41 to a substrate DBC comprising a substrate 20 that can be made of ceramic, having a metal surface 24 and a metal surface 25.
• an assembly illustrated in FIG. 5b is obtained and comprising from a substrate 1 1, covered with a metal surface 10 and metal elements 12, the succession of elements. following on the periphery of the chip:
• this thickness e c can typically be between 70 ⁇ and 300 ⁇ .
• the thicknesses of the metal balls in the stack may have thicknesses of between 10 ⁇ and 100 ⁇ .
• the surface is made of elaborate metallic elements
• the height of the intermediate interconnection elements 13 is standardized by applying a pressure P which may be 100 g / interconnection metal intermediate element by a flat and rigid surface (glass or silicon) 300 (to the flatness tolerance of the glass plate near). This force is sufficient to deform the interconnecting metal intermediate elements and to obtain an intermediate interconnection thickness height of between 10 ⁇ and 100 ⁇ .
• a pressure P which may be 100 g / interconnection metal intermediate element by a flat and rigid surface (glass or silicon) 300 (to the flatness tolerance of the glass plate near). This force is sufficient to deform the interconnecting metal intermediate elements and to obtain an intermediate interconnection thickness height of between 10 ⁇ and 100 ⁇ .
• a controlled quantity of silver nanoparticle paste 14 is deposited on the interconnecting metal intermediate elements 13 by means of a manual dispenser.
• the dispensing process can be done automatically through automatic dispensing machines on the market (eg ASYMTEK Quantum series). Fourth step illustrated in Figure 6d:
• the sintered seals 14 are made by thermocompression operation TP on the surface of the metal balls 13 via an intermediate substrate 301. Step 5 illustrated in Figure 6e:
• a second level of metal balls 13 is produced on the surface of sintered seals previously made 14, by thermosonic technique.
• the height of the interconnecting metal intermediate elements 13 is uniformized by applying a pressure P which may be 100 g / interconnection intermediate element by a flat and rigid surface (glass or silicon) 302 (to the flatness tolerance of the glass plate near). This force is sufficient to deform the intermediate interconnection elements and to obtain an intermediate interconnection thickness height of between 10 ⁇ and 100 ⁇ .
• a pressure P which may be 100 g / interconnection intermediate element by a flat and rigid surface (glass or silicon) 302 (to the flatness tolerance of the glass plate near). This force is sufficient to deform the intermediate interconnection elements and to obtain an intermediate interconnection thickness height of between 10 ⁇ and 100 ⁇ .
• a controlled quantity of silver nanoparticle paste 14 is deposited on the interconnection intermediate elements 13 by means of a manual dispenser.
• the dispensing process can be done manually or automatically through automatic dispensing machines on the market (eg ASYMTEK Quantum series).
• the chip is assembled on the surface of its substrate with the assembly previously prepared and illustrated in FIG. 6g.
• Figure 6h highlights the different stacks.
• thermocompression machine that can be controlled with "z” or a machine of thermal report.
• This operation can be carried out at low pressure or by using a "non-pressure" type commercial sintering dough.
• the densification of the sintered seal makes it possible to start from a flat surface to stack a second "bump". This configuration is much better than a stack of 2 "bumps" without sintering step.
• FIG. 7 shows a stack made successively and comprising 3 levels of "bump” 13, two “bumps” being interconnected via sintered joints 14 a sintered seal also connecting the contact 24 on the substrate 20 supporting the chip 40.
• the different levels of “bumps” can in particular have “bumps” with different diameters or different numbers per sintered joint so as to ensure a more stable pyramidal structure.
• FIG. 8 illustrates an assembly example in which two levels of "bumps” 13 have different "bump” diameters.
• the surface is made of elaborate metallic elements
• the height of the intermediate interconnection elements 13i is standardized by applying a pressure P which may be 100 g / interconnection intermediate element by a flat and rigid surface (glass or silicon) 300. This force is sufficient to deform the intermediate elements of interconnection and obtain an interconnect intermediate thickness height of between 10 ⁇ and 100 ⁇ .
• a controlled quantity of silver nanoparticle paste 14 is deposited on the interconnection intermediate elements 13i by means of a manual dispenser.
• the dispensing process can be done automatically through automatic dispensing machines on the market (eg ASYMTEK Quantum series).
• the sintered joints 14 are made by a T.P. thermocompression operation on the surface of the metal balls 13i via an intermediate substrate 301.
• a second level of metal balls 13j is produced on the surface of the sintered joints previously made by thermosonic technique.
• the height of the interconnection intermediate elements 13j is standardized by applying a pressure P which may be 100 g / interconnection intermediate element by a flat and rigid surface (glass or silicon) 302. This force is sufficient to deform the intermediate elements of interconnection and obtain an interconnect intermediate thickness height of between 10 ⁇ and 100 ⁇ .
• a pressure P which may be 100 g / interconnection intermediate element by a flat and rigid surface (glass or silicon) 302. This force is sufficient to deform the intermediate elements of interconnection and obtain an interconnect intermediate thickness height of between 10 ⁇ and 100 ⁇ .
• a controlled quantity of silver nanoparticle paste 14 is deposited on the intermediate interconnection elements 13j with the aid of a manual dispenser.
• the dispensing process can be done automatically through automatic dispensing machines on the market (eg ASYMTEK Quantum series). Step 8 illustrated in Figure 9h:
• the chip is assembled on the surface of its substrate with the assembly previously prepared and illustrated in FIG. 9g.
• Figure 9h highlights the different stacks.
• This operation can be carried out at low pressure or by using a "non-pressure" type commercial sintering dough.
• a "pyramid” type configuration can be made from the two substrates (thus also on the chip side).
• height compensation can also be performed on the chip side substrate.
• the Applicant has carried out tests to assemble a GaN HEMT transistor component (High Electron Mobility Transistor), on a "DBC" type substrate obtained according to the first example of a method of manufacturing an assembly illustrated in FIG. 1 f.
• a GaN HEMT transistor component High Electron Mobility Transistor
• the component has a gate height 10 m lower than the drain and source. It has thus been possible to make interconnections with elements having adapted and different heights.
• FIG. 10a represents the characteristics of the current Ids as a function of the voltage Vds (with the following references: d for drain and s for source) with a time of the pulse 100 ⁇ , of a GaN transistor with gate-source voltages Vgs between -4V (transistor off) and 2V, with increment steps of 1 V.
• Figure 10b shows the variation of the current Ids as a function of the voltage Vgs for a drain-source voltage Vds of 1 V showing the currents Ids when the transistor is blocked and open.
• silver nanoparticle sintering has several advantages such as better thermal conductivity (more than 4 times higher than conventional solders), process temperature below 300 ° C and an operating temperature above 300 ° C (in the case of brazing, the process temperature is higher than the operating temperature).
• the technique used makes it possible to avoid the short circuits that can take place during the fusion of the solder.
• porous joint between the intermediate interconnection element and the semiconductor stud makes it possible to better deal with the mechanical stresses induced by the difference in the coefficients of thermal expansion between the components assembled during the thermal cycles.
• the height of the intermediate interconnect elements can be controlled and standardized by applying a sufficient pressure to deform them.
• intermediate interconnect elements "stud bumps” Au can be realized. Intermediate interconnection elements may also be made using other metals or alloys (Cu, Ag, Ag alloy). The intermediate interconnection elements can be pressed to have a controlled height with a variation less than m. However, it is possible not to press the formed "stud bumps", which can generate a height variation of 1 to 5 m approximately.
• the paste of microparticles or nanoparticles can be silver or gold or copper or copper / silver alloy.
• Deposition of the nanoparticle paste can be achieved using a dispenser.
• Other dough deposition solutions may be envisaged, such as screen printing or direct imprint printing, which makes it possible to have the dough in well-localized areas.

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• Wire Bonding (AREA)
• Engineering & Computer Science (AREA)
• Manufacturing & Machinery (AREA)
• Ceramic Engineering (AREA)
• Electric Connection Of Electric Components To Printed Circuits (AREA)
• Powder Metallurgy (AREA)

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• 2016
  • 2016-01-26 FR FR1650583A patent/FR3047111B1/fr active Active
• 2017
  • 2017-01-26 EP EP17701352.1A patent/EP3408863A1/de active Pending
  • 2017-01-26 WO PCT/EP2017/051667 patent/WO2017129687A1/fr not_active Ceased
  • 2017-01-26 US US16/072,867 patent/US11011490B2/en active Active

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