EP3610573A4 - Schottky-cmos asynchronous logic cells - Google Patents

Schottky-cmos asynchronous logic cells Download PDF

Info

Publication number: EP3610573A4
Authority: EP; European Patent Office
Prior art keywords: schottky; cmos; logic cells; asynchronous logic; asynchronous
Prior art date: 2017-04-10
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Pending

Application number

EP18783874.3A

Other languages

German (de)

French (fr)

Other versions

EP3610573A1 (en

Inventor

Augustine Wei-Chun CHANG

Pierre Dermy

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Schottky LSI Inc

Original Assignee

Schottky LSI Inc

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

2017-04-10

Filing date

2018-04-10

Publication date

2021-04-21

2017-04-10 Priority claimed from US15/484,040 external-priority patent/US9853643B2/en

2018-04-10 Application filed by Schottky LSI Inc filed Critical Schottky LSI Inc

2020-02-19 Publication of EP3610573A1 publication Critical patent/EP3610573A1/en

2021-04-21 Publication of EP3610573A4 publication Critical patent/EP3610573A4/en

Status Pending legal-status Critical Current

Links

Classifications

- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
- H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/0956—Schottky diode FET logic
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form

Landscapes

Engineering & Computer Science (AREA)
Physics & Mathematics (AREA)
Mathematical Physics (AREA)
Computer Hardware Design (AREA)
Computing Systems (AREA)
General Engineering & Computer Science (AREA)
Power Engineering (AREA)
Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Logic Circuits (AREA)
Semiconductor Integrated Circuits (AREA)

EP18783874.3A 2017-04-10 2018-04-10 Schottky-cmos asynchronous logic cells Pending EP3610573A4 (en)

Applications Claiming Priority (2)

Application Number	Priority Date	Filing Date	Title
US15/484,040 US9853643B2 (en)	2008-12-23	2017-04-10	Schottky-CMOS asynchronous logic cells
PCT/US2018/026817 WO2018191217A1 (en)	2017-04-10	2018-04-10	Schottky-cmos asynchronous logic cells

Publications (2)

Publication Number	Publication Date
EP3610573A1 EP3610573A1 (en)	2020-02-19
EP3610573A4 true EP3610573A4 (en)	2021-04-21

Family

ID=63792798

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
EP18783874.3A Pending EP3610573A4 (en)	2017-04-10	2018-04-10	Schottky-cmos asynchronous logic cells

Country Status (4)

Country	Link
EP (1)	EP3610573A4 (en)
CN (2)	CN113452362B (en)
TW (2)	TWI760477B (en)
WO (1)	WO2018191217A1 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4405870A (en) *	1980-12-10	1983-09-20	Rockwell International Corporation	Schottky diode-diode field effect transistor logic
US5451890A (en) *	1992-08-24	1995-09-19	California Institue Of Technology	Gallium arsenide source follower FET logic family with diodes for preventing leakage currents
US20060044018A1 (en) *	2004-04-02	2006-03-02	Chang Augustine W	Variable threshold transistor for the Schottky FPGA and multilevel storage cell flash arrays

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4300064A (en) *	1979-02-12	1981-11-10	Rockwell International Corporation	Schottky diode FET logic integrated circuit
DE3276988D1 (en) *	1981-09-30	1987-09-17	Toshiba Kk	Logic circuit operable by a single power voltage
US4559609A (en) *	1983-02-07	1985-12-17	At&T Bell Laboratories	Full adder using transmission gates
US4607175A (en) *	1984-08-27	1986-08-19	Advanced Micro Devices, Inc.	Non-inverting high speed low level gate to Schottky transistor-transistor logic translator
US4701643A (en) *	1986-03-24	1987-10-20	Ford Microelectronics, Inc.	FET gate current limiter circuits
US4798979A (en) *	1986-09-23	1989-01-17	Honeywell Inc.	Schottky diode logic for E-mode FET/D-mode FET VLSI circuits
US4798978A (en) *	1987-04-30	1989-01-17	Gain Electronics Corporation	GAAS FET logic having increased noise margin
US4868415A (en) *	1988-05-16	1989-09-19	Motorola, Inc.	Voltage level conversion circuit
US4931670A (en) *	1988-12-14	1990-06-05	American Telephone And Telegraph Company	TTL and CMOS logic compatible GAAS logic family
US6590800B2 (en) *	2001-06-15	2003-07-08	Augustine Wei-Chun Chang	Schottky diode static random access memory (DSRAM) device, a method for making same, and CFET based DTL
US6693464B2 (en) *	2002-06-14	2004-02-17	Skyworks Solutions, Inc.	Low-voltage current mode logic circuits and methods
US7135890B2 (en) *	2004-04-19	2006-11-14	Super Talent Electronics, Inc.	SCL type FPGA with multi-threshold transistors and method for forming same
US20050258863A1 (en) *	2004-05-20	2005-11-24	Chang Augustine W	Quaternary and trinary logic switching circuits
US7071518B2 (en) *	2004-05-28	2006-07-04	Freescale Semiconductor, Inc.	Schottky device
US7224205B2 (en) *	2004-07-07	2007-05-29	Semi Solutions, Llc	Apparatus and method for improving drive-strength and leakage of deep submicron MOS transistors

2018
- 2018-04-10 EP EP18783874.3A patent/EP3610573A4/en active Pending
- 2018-04-10 WO PCT/US2018/026817 patent/WO2018191217A1/en not_active Ceased
- 2018-04-10 TW TW107112301A patent/TWI760477B/en active
- 2018-04-10 CN CN202110419241.XA patent/CN113452362B/en active Active
- 2018-04-10 TW TW111107370A patent/TW202230983A/en unknown
- 2018-04-10 CN CN201880031001.9A patent/CN110622419B/en active Active

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4405870A (en) *	1980-12-10	1983-09-20	Rockwell International Corporation	Schottky diode-diode field effect transistor logic
US5451890A (en) *	1992-08-24	1995-09-19	California Institue Of Technology	Gallium arsenide source follower FET logic family with diodes for preventing leakage currents
US20060044018A1 (en) *	2004-04-02	2006-03-02	Chang Augustine W	Variable threshold transistor for the Schottky FPGA and multilevel storage cell flash arrays

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
"Integrated Circuits and Digital Devices - Computer Arithmetic, Principles, Architecture and Design, Chapter 2", 1 January 1979, JOHN WILEY & SONS, New York, ISBN: 978-0-471-03496-4, article KAI HWANG: "Integrated Circuits and Digital Devices - Computer Arithmetic, Principles, Architecture and Design, Chapter 2", pages: 31 - 68, XP055569640 *
See also references of WO2018191217A1 *

Also Published As

Publication number	Publication date
WO2018191217A1 (en)	2018-10-18
CN110622419B (en)	2021-05-11
CN110622419A (en)	2019-12-27
WO2018191217A4 (en)	2018-11-29
EP3610573A1 (en)	2020-02-19
CN113452362A (en)	2021-09-28
CN113452362B (en)	2022-07-08
TW202230983A (en)	2022-08-01
TWI760477B (en)	2022-04-11
TW201904198A (en)	2019-01-16

Legal Events

Date	Code	Title	Description
2018-10-20	STAA	Information on the status of an ep patent application or granted ep patent	Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE
2020-01-17	PUAI	Public reference made under article 153(3) epc to a published international application that has entered the european phase	Free format text: ORIGINAL CODE: 0009012
2020-01-17	STAA	Information on the status of an ep patent application or granted ep patent	Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE
2020-02-19	17P	Request for examination filed	Effective date: 20191104
2020-02-19	AK	Designated contracting states	Kind code of ref document: A1 Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR
2020-02-19	AX	Request for extension of the european patent	Extension state: BA ME
2020-07-15	DAV	Request for validation of the european patent (deleted)
2020-07-15	DAX	Request for extension of the european patent (deleted)
2020-12-30	RIC1	Information provided on ipc code assigned before grant	Ipc: H03K 19/0948 20060101ALI20201125BHEP Ipc: H03K 19/017 20060101ALI20201125BHEP Ipc: H03K 19/0956 20060101AFI20201125BHEP Ipc: H03K 19/177 20200101ALI20201125BHEP
2021-04-21	A4	Supplementary search report drawn up and despatched	Effective date: 20210322
2021-04-21	RIC1	Information provided on ipc code assigned before grant	Ipc: H03K 19/0956 20060101AFI20210316BHEP Ipc: H03K 19/017 20060101ALI20210316BHEP Ipc: H03K 19/177 20200101ALI20210316BHEP Ipc: H03K 19/0948 20060101ALI20210316BHEP
2023-07-05	P01	Opt-out of the competence of the unified patent court (upc) registered	Effective date: 20230526
2025-02-06	STAA	Information on the status of an ep patent application or granted ep patent	Free format text: STATUS: EXAMINATION IS IN PROGRESS
2025-03-12	17Q	First examination report despatched	Effective date: 20250205

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