ES2138979T3 - Procedimiento y dispositivo para transmitir paquetes de datos. - Google Patents

Procedimiento y dispositivo para transmitir paquetes de datos.

Info

Publication number
ES2138979T3
ES2138979T3 ES93106122T ES93106122T ES2138979T3 ES 2138979 T3 ES2138979 T3 ES 2138979T3 ES 93106122 T ES93106122 T ES 93106122T ES 93106122 T ES93106122 T ES 93106122T ES 2138979 T3 ES2138979 T3 ES 2138979T3
Authority
ES
Spain
Prior art keywords
data
period
time
procedure
transmit data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES93106122T
Other languages
English (en)
Inventor
Uwe Kauffert
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent SAS
Nokia Inc
Original Assignee
Alcatel SA
Nokia Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel SA, Nokia Inc filed Critical Alcatel SA
Application granted granted Critical
Publication of ES2138979T3 publication Critical patent/ES2138979T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/3625—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using a time dependent access
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/282—Cycle stealing DMA
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)
  • Bus Control (AREA)
  • Computer And Data Communications (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Multi Processors (AREA)

Abstract

TRANSMISION COMPLETA AL MENOS DE UN PAQUETE DE DATOS EN EL ESPACIO DE TIEMPO, EN DONDE EL PROCESADOR EN EL CASO DE TRAMITACION DE UN MANDO U ORDEN NO SE APOYA SOBRE EL BUS DATOS/DIRECCION. UN MEDIO DE CONTROL ES INDICADO A TRAVES DE UNA SEÑAL, DANDO A CONOCER QUE EL PROCESADOR, QUE TRABAJA DE FORMA ACTUAL PARA LA CUMPLIMENTACION DE LA ORDEN, EN UN ESPACIO DE TIEMPO NO SE BASA EN EL BUS DATOS/DIRECCION. CON ELLO SE COMPARA, SI EN ESE ESPACIO DE TIEMPO AL MENOS UN PAQUETE DE DATOS PUEDE SER TRANSMITIDO COMPLETAMENTE. EN EL CASO AFIRMATIVO, SE COMIENZA DE FORMA INMEDIATA CON LA TRANSMISION DE DATOS. APROVECHAMIENTO OPTIMIZADO DE LA CAPACIDAD DEL COMPUTADOR.
ES93106122T 1992-04-24 1993-04-15 Procedimiento y dispositivo para transmitir paquetes de datos. Expired - Lifetime ES2138979T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4213593A DE4213593A1 (de) 1992-04-24 1992-04-24 Verfahren und Vorrichtung zur Übertragung von Datenpaketen

Publications (1)

Publication Number Publication Date
ES2138979T3 true ES2138979T3 (es) 2000-02-01

Family

ID=6457441

Family Applications (1)

Application Number Title Priority Date Filing Date
ES93106122T Expired - Lifetime ES2138979T3 (es) 1992-04-24 1993-04-15 Procedimiento y dispositivo para transmitir paquetes de datos.

Country Status (4)

Country Link
EP (1) EP0566985B1 (es)
AT (1) ATE187563T1 (es)
DE (2) DE4213593A1 (es)
ES (1) ES2138979T3 (es)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19634080A1 (de) * 1995-08-25 1997-02-27 Kommunikations Elektronik Schaltungsanordnung zur digitalen Datenübertragung

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5326539A (en) * 1976-08-25 1978-03-11 Hitachi Ltd Data exchenge system
JPS6019269A (ja) * 1983-07-13 1985-01-31 Nec Corp 高速デ−タ転送方式
SU1234843A1 (ru) * 1984-04-25 1986-05-30 Предприятие П/Я Г-4677 Устройство дл сопр жени цифровой вычислительной машины (ЦВМ) с абонентами
SU1262515A1 (ru) * 1985-01-29 1986-10-07 Львовский Ордена Ленина Политехнический Институт Им.Ленинского Комсомола Устройство сопр жени с пам тью
US4959782A (en) * 1986-10-29 1990-09-25 United Technologies Corporation Access arbitration for an input-output controller
US4975832A (en) * 1987-06-25 1990-12-04 Teac Corporation Microcomputer system with dual DMA mode transmissions
SU1550522A1 (ru) * 1988-01-19 1990-03-15 Научно-Производственное Объединение "Информатика" Кольцева система дл обмена информацией
EP0346917A3 (en) * 1988-06-17 1990-11-07 Modular Computer Systems Inc. Bus stealing method for concurrent cpu and i/o processing
JPH02109153A (ja) * 1988-10-18 1990-04-20 Fujitsu Ltd プロセッサ間データ伝送方式
EP0410382A3 (en) * 1989-07-24 1991-07-24 Nec Corporation Data transfer controller using direct memory access method
JPH03122746A (ja) * 1989-10-05 1991-05-24 Mitsubishi Electric Corp Ｄｍａ制御方式

Also Published As

Publication number Publication date
DE4213593A1 (de) 1993-10-28
EP0566985A1 (de) 1993-10-27
EP0566985B1 (de) 1999-12-08
DE59309894D1 (de) 2000-01-13
ATE187563T1 (de) 1999-12-15

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