FR2179632B1 - - Google Patents
Info
- Publication number
- FR2179632B1 FR2179632B1 FR7213226A FR7213226A FR2179632B1 FR 2179632 B1 FR2179632 B1 FR 2179632B1 FR 7213226 A FR7213226 A FR 7213226A FR 7213226 A FR7213226 A FR 7213226A FR 2179632 B1 FR2179632 B1 FR 2179632B1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W46/00—Marks applied to devices, e.g. for alignment or identification
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70491—Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes
- G03F7/70541—Tagging, i.e. hardware or software tagging of features or components, e.g. using tagging scripts or tagging identifier codes for identification of chips, shots or wafers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W46/00—Marks applied to devices, e.g. for alignment or identification
- H10W46/101—Marks applied to devices, e.g. for alignment or identification characterised by the type of information, e.g. logos or symbols
- H10W46/103—Marks applied to devices, e.g. for alignment or identification characterised by the type of information, e.g. logos or symbols alphanumeric information, e.g. words, letters or serial numbers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W46/00—Marks applied to devices, e.g. for alignment or identification
- H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W46/00—Marks applied to devices, e.g. for alignment or identification
- H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
- H10W46/603—Formed on wafers or substrates before dicing and remaining on chips after dicing
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR7213226A FR2179632B1 (de) | 1972-04-14 | 1972-04-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR7213226A FR2179632B1 (de) | 1972-04-14 | 1972-04-14 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2179632A1 FR2179632A1 (de) | 1973-11-23 |
| FR2179632B1 true FR2179632B1 (de) | 1977-01-14 |
Family
ID=9096902
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7213226A Expired FR2179632B1 (de) | 1972-04-14 | 1972-04-14 |
Country Status (1)
| Country | Link |
|---|---|
| FR (1) | FR2179632B1 (de) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB8512532D0 (en) * | 1985-05-17 | 1985-06-19 | Pa Consulting Services | Electrical circuit interconnection |
| JPH0196920A (ja) * | 1987-10-09 | 1989-04-14 | Fujitsu Ltd | ウエーハの識別方法 |
-
1972
- 1972-04-14 FR FR7213226A patent/FR2179632B1/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| FR2179632A1 (de) | 1973-11-23 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| TP | Transmission of property | ||
| ST | Notification of lapse |