ITMI910107A0 - Dispositivo di memoria a semiconduttore - Google Patents

Dispositivo di memoria a semiconduttore

Info

Publication number: ITMI910107A0
Authority: IT; Italy
Prior art keywords: memory device; semiconductor memory; semiconductor; memory
Prior art date: 1990-09-04

Application number

IT91MI107A

Other languages

English (en)

Inventor

Yun-Ho Choi

Original Assignee

Samsung Electronics Co Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1990-09-04

Filing date

1991-01-18

Publication date

1991-01-18

1991-01-18 Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd

1991-01-18 Publication of ITMI910107A0 publication Critical patent/ITMI910107A0/it

1992-07-18 Publication of ITMI910107A1 publication Critical patent/ITMI910107A1/it

1994-11-16 Application granted granted Critical

1994-11-16 Publication of IT1246232B publication Critical patent/IT1246232B/it

Links

239000004065 semiconductor Substances 0.000 title 1

Classifications

- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals

Landscapes

Engineering & Computer Science (AREA)
Microelectronics & Electronic Packaging (AREA)
Dram (AREA)
Static Random-Access Memory (AREA)

ITMI910107A 1990-09-04 1991-01-18 Dispositivo di memoria a semiconduttore IT1246232B (it)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
KR1019900013926A KR930006622B1 (ko)	1990-09-04	1990-09-04	반도체 메모리장치

Publications (3)

Publication Number	Publication Date
ITMI910107A0 true ITMI910107A0 (it)	1991-01-18
ITMI910107A1 ITMI910107A1 (it)	1992-07-18
IT1246232B IT1246232B (it)	1994-11-16

Family

ID=19303213

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
ITMI910107A IT1246232B (it)	1990-09-04	1991-01-18	Dispositivo di memoria a semiconduttore

Country Status (7)

Country	Link
US (1)	US5062082A (it)
JP (1)	JPH04232692A (it)
KR (1)	KR930006622B1 (it)
DE (1)	DE4101396C2 (it)
FR (1)	FR2666436B1 (it)
GB (1)	GB2247759B (it)
IT (1)	IT1246232B (it)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP2531829B2 (ja) *	1990-05-01	1996-09-04	株式会社東芝	スタティック型メモリ
JPH0474384A (ja) *	1990-07-17	1992-03-09	Toshiba Corp	半導体集積回路装置
JP2623979B2 (ja) *	1991-01-25	1997-06-25	日本電気株式会社	ダイナミック型論理回路
JP2717738B2 (ja) *	1991-06-20	1998-02-25	三菱電機株式会社	半導体記憶装置
IT1252017B (it) *	1991-11-28	1995-05-27	Sgs Thomson Microelectronics	Struttura circuitale a registri distribuiti con lettura e scrittura autotemporizzate
US5295104A (en) *	1991-12-17	1994-03-15	Sgs-Thomson Microelectronics, Inc.	Integrated circuit with precharged internal data bus
US5257226A (en) *	1991-12-17	1993-10-26	Sgs-Thomson Microelectronics, Inc.	Integrated circuit with self-biased differential data lines
EP0547892B1 (en) *	1991-12-17	1998-10-28	STMicroelectronics, Inc.	An integrated circuit with self-biased differential data lines
US5274278A (en) *	1991-12-31	1993-12-28	Intel Corporation	High-speed tri-level decoder with dual-voltage isolation
JPH05234380A (ja) *	1992-02-21	1993-09-10	Sharp Corp	半導体記憶装置
US5532969A (en) *	1994-10-07	1996-07-02	International Business Machines Corporation	Clocking circuit with increasing delay as supply voltage VDD
US5493241A (en) *	1994-11-16	1996-02-20	Cypress Semiconductor, Inc.	Memory having a decoder with improved address hold time
US5745431A (en) *	1996-01-05	1998-04-28	International Business Machines Corporation	Address transition detector (ATD) for power conservation
US5708613A (en) *	1996-07-22	1998-01-13	International Business Machines Corporation	High performance redundancy in an integrated memory system
US6912680B1 (en)	1997-02-11	2005-06-28	Micron Technology, Inc.	Memory system with dynamic timing correction
US5946244A (en) *	1997-03-05	1999-08-31	Micron Technology, Inc.	Delay-locked loop with binary-coupled capacitor
US6173432B1 (en)	1997-06-20	2001-01-09	Micron Technology, Inc.	Method and apparatus for generating a sequence of clock signals
US6101197A (en)	1997-09-18	2000-08-08	Micron Technology, Inc.	Method and apparatus for adjusting the timing of signals over fine and coarse ranges
US5940337A (en) *	1997-10-23	1999-08-17	Integrated Silicon Solution, Inc.	Method and apparatus for controlling memory address hold time
US6269451B1 (en)	1998-02-27	2001-07-31	Micron Technology, Inc.	Method and apparatus for adjusting data timing by delaying clock signal
US6349399B1 (en)	1998-09-03	2002-02-19	Micron Technology, Inc.	Method and apparatus for generating expect data from a captured bit pattern, and memory device using same
US6374360B1 (en)	1998-12-11	2002-04-16	Micron Technology, Inc.	Method and apparatus for bit-to-bit timing correction of a high speed memory bus
US6470060B1 (en)	1999-03-01	2002-10-22	Micron Technology, Inc.	Method and apparatus for generating a phase dependent control signal
JP4469531B2 (ja) *	1999-10-04	2010-05-26	セイコーエプソン株式会社	半導体集積回路、インクカートリッジ及びインクジェット記録装置
US6801989B2 (en)	2001-06-28	2004-10-05	Micron Technology, Inc.	Method and system for adjusting the timing offset between a clock signal and respective digital signals transmitted along with that clock signal, and memory device and computer system using same
JP4338010B2 (ja) *	2002-04-22	2009-09-30	株式会社日立製作所	半導体集積回路装置
US7168027B2 (en)	2003-06-12	2007-01-23	Micron Technology, Inc.	Dynamic synchronization of data capture on an optical or other high speed communications link
US7234070B2 (en)	2003-10-27	2007-06-19	Micron Technology, Inc.	System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding
JP5563183B2 (ja) *	2007-02-15	2014-07-30	ピーエスフォールクスコエスエイアールエル	半導体メモリ集積回路
US7821866B1 (en)	2007-11-14	2010-10-26	Cypress Semiconductor Corporation	Low impedance column multiplexer circuit and method
US10074493B2 (en) *	2016-11-21	2018-09-11	Aeroflex Colorado Springs Inc.	Radiation-hardened break before make circuit
CN108257641B (zh) *	2018-04-18	2023-08-11	长鑫存储技术有限公司	用于半导体存储器的存储矩阵及半导体存储器

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS5963091A (ja) *	1982-09-30	1984-04-10	Fujitsu Ltd	スタテイツクメモリ回路
JPS59119591A (ja) *	1982-12-27	1984-07-10	Toshiba Corp	半導体メモリ装置
US4712197A (en) *	1986-01-28	1987-12-08	Motorola, Inc.	High speed equalization in a memory
JPS62180607A (ja) *	1986-02-04	1987-08-07	Fujitsu Ltd	半導体集積回路
US4751680A (en) *	1986-03-03	1988-06-14	Motorola, Inc.	Bit line equalization in a memory
JPH0612631B2 (ja) *	1986-10-17	1994-02-16	日本電気株式会社	半導体メモリ
JPH0194592A (ja) *	1987-10-06	1989-04-13	Fujitsu Ltd	半導体メモリ
JP2575449B2 (ja) *	1988-02-18	1997-01-22	株式会社東芝	半導体メモリ装置
JPH01251397A (ja) *	1988-03-30	1989-10-06	Toshiba Corp	半導体メモリ装置
JPH0766665B2 (ja) *	1988-03-31	1995-07-19	株式会社東芝	半導体記憶装置
JPH0340293A (ja) *	1989-07-07	1991-02-21	Fujitsu Ltd	半導体記憶装置

1990
- 1990-09-04 KR KR1019900013926A patent/KR930006622B1/ko not_active Expired - Lifetime
1991
- 1991-01-14 FR FR9100318A patent/FR2666436B1/fr not_active Expired - Lifetime
- 1991-01-18 US US07/642,746 patent/US5062082A/en not_active Expired - Lifetime
- 1991-01-18 DE DE4101396A patent/DE4101396C2/de not_active Expired - Lifetime
- 1991-01-18 IT ITMI910107A patent/IT1246232B/it active IP Right Grant
- 1991-01-19 JP JP3019377A patent/JPH04232692A/ja active Pending
- 1991-01-21 GB GB9101265A patent/GB2247759B/en not_active Expired - Lifetime

Also Published As

Publication number	Publication date
IT1246232B (it)	1994-11-16
FR2666436B1 (fr)	1997-02-07
US5062082A (en)	1991-10-29
GB9101265D0 (en)	1991-03-06
KR930006622B1 (ko)	1993-07-21
ITMI910107A1 (it)	1992-07-18
KR920006976A (ko)	1992-04-28
JPH04232692A (ja)	1992-08-20
DE4101396A1 (de)	1992-03-05
FR2666436A1 (fr)	1992-03-06
DE4101396C2 (de)	1995-06-08
GB2247759B (en)	1994-10-12
GB2247759A (en)	1992-03-11

Legal Events

Date	Code	Title	Description
1994-11-16	0001	Granted
1999-10-27	TA	Fee payment date (situation as of event date), data collected since 19931001	Effective date: 19960130

Publication	Publication Date	Title
ITMI910107A0 (it)	1991-01-18	Dispositivo di memoria a semiconduttore
DE69232356D1 (de)	2002-02-21	Halbleiterspeicheranordnung
DE69133361D1 (de)	2004-03-18	Halbleiterspeichervorrichtung
DE69132284D1 (de)	2000-08-10	Halbleiterspeicheranordnung
DE69430683D1 (de)	2002-07-04	Halbleiterspeicheranordnung
ITMI911218A1 (it)	1992-11-03	Dispositivo a semiconduttore di memoria non volatile
DE69123666D1 (de)	1997-01-30	Halbleiterspeicheranordnung
DE69331562D1 (de)	2002-03-21	Halbleiterspeicheranordnung
DE69125671D1 (de)	1997-05-22	Halbleiter-Speicherbauteil
DE69125206D1 (de)	1997-04-24	Halbleiterspeicheranordnung
DE69121801D1 (de)	1996-10-10	Halbleiterspeicheranordnung
DE69123379D1 (de)	1997-01-16	Halbleiterspeichervorrichtung
DE69125535D1 (de)	1997-05-15	Halbleiterspeicheranordnung
DE69127155D1 (de)	1997-09-11	Halbleiterspeicheranordnung
DE69432882D1 (de)	2003-08-07	Halbleiterspeicheranordnung
DE69126559D1 (de)	1997-07-24	Halbleiterspeicheranordnung
DE69220101D1 (de)	1997-07-10	Halbleiterspeichereinrichtung
DE69125339D1 (de)	1997-04-30	Halbleiterspeicheranordnung
DE69128061D1 (de)	1997-12-04	Halbleiterspeicheranordnung
DE69219518D1 (de)	1997-06-12	Halbleiterspeicheranordnung
DE69128819D1 (de)	1998-03-05	Halbleiterspeicheranordnung
DE69222793D1 (de)	1997-11-27	Halbleiterspeicheranordnung
DE69125734D1 (de)	1997-05-28	Halbleiterspeicheranordnung
DE69123294D1 (de)	1997-01-09	Halbleiterspeicheranordnung
ITMI912808A1 (it)	1993-04-23	Dispositivo di memoria a semiconduttore