JP2552784B2 - 並列データ処理制御方式 - Google Patents

並列データ処理制御方式

Info

Publication number: JP2552784B2
Authority: JP; Japan
Prior art keywords: computer; data; data processing; network device; transferred
Prior art date: 1991-11-28
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Expired - Lifetime

Application number

JP3314164A

Other languages

English (en)

Japanese (ja)

Other versions

JPH05151173A (ja

Inventor

賢一石坂

雅之香取

正幸池田

茂長沢

浩小松田

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Fujitsu Ltd

Original Assignee

Fujitsu Ltd

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1991-11-28

Filing date

1991-11-28

Publication date

1996-11-13

1991-11-28 Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd

1991-11-28 Priority to JP3314164A priority Critical patent/JP2552784B2/ja

1992-11-27 Priority to CA002084039A priority patent/CA2084039C/fr

1992-11-27 Priority to AU29704/92A priority patent/AU649176B2/en

1992-11-27 Priority to DE69228293T priority patent/DE69228293T2/de

1992-11-27 Priority to EP92310844A priority patent/EP0544535B1/fr

1992-11-30 Priority to US07/983,075 priority patent/US5832261A/en

1993-06-18 Publication of JPH05151173A publication Critical patent/JPH05151173A/ja

1996-11-13 Application granted granted Critical

1996-11-13 Publication of JP2552784B2 publication Critical patent/JP2552784B2/ja

2011-11-13 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Links

Classifications

- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/45—Exploiting coarse grain parallelism in compilation, i.e. parallelism between groups of instructions
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
General Engineering & Computer Science (AREA)
Computer Hardware Design (AREA)
Physics & Mathematics (AREA)
General Physics & Mathematics (AREA)
Computing Systems (AREA)
Software Systems (AREA)
Multi Processors (AREA)

JP3314164A 1991-11-28 1991-11-28 並列データ処理制御方式 Expired - Lifetime JP2552784B2 (ja)

Priority Applications (6)

Application Number	Priority Date	Filing Date	Title
JP3314164A JP2552784B2 (ja)	1991-11-28	1991-11-28	並列データ処理制御方式
CA002084039A CA2084039C (fr)	1991-11-28	1992-11-27	Systeme de controle de traitement de donnees en parallele
AU29704/92A AU649176B2 (en)	1991-11-28	1992-11-27	Parallel data processing control system
DE69228293T DE69228293T2 (de)	1991-11-28	1992-11-27	Paralleles Datenverarbeitungssteuerungssystem
EP92310844A EP0544535B1 (fr)	1991-11-28	1992-11-27	Système de commande parallèle pour le traitement de données
US07/983,075 US5832261A (en)	1991-11-28	1992-11-30	Barrier synchronizing mechanism for a parallel data processing control system

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP3314164A JP2552784B2 (ja)	1991-11-28	1991-11-28	並列データ処理制御方式

Publications (2)

Publication Number	Publication Date
JPH05151173A JPH05151173A (ja)	1993-06-18
JP2552784B2 true JP2552784B2 (ja)	1996-11-13

Family

ID=18050017

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
JP3314164A Expired - Lifetime JP2552784B2 (ja)	1991-11-28	1991-11-28	並列データ処理制御方式

Country Status (6)

Country	Link
US (1)	US5832261A (fr)
EP (1)	EP0544535B1 (fr)
JP (1)	JP2552784B2 (fr)
AU (1)	AU649176B2 (fr)
CA (1)	CA2084039C (fr)
DE (1)	DE69228293T2 (fr)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP3526492B2 (ja) *	1995-09-19	2004-05-17	富士通株式会社	並列処理システム
US7346664B2 (en) *	2003-04-24	2008-03-18	Neopath Networks, Inc.	Transparent file migration using namespace replication
WO2005029251A2 (fr)	2003-09-15	2005-03-31	Neopath Networks, Inc.	Autorisation de services proxy au moyen de mecanismes d'indications clients
US8190741B2 (en) *	2004-04-23	2012-05-29	Neopath Networks, Inc.	Customizing a namespace in a decentralized storage environment
US8195627B2 (en) *	2004-04-23	2012-06-05	Neopath Networks, Inc.	Storage policy monitoring for a storage network
JP4372043B2 (ja) *	2005-05-12	2009-11-25	株式会社ソニー・コンピュータエンタテインメント	コマンド実行制御装置、コマンド実行指示装置およびコマンド実行制御方法
US8832697B2 (en) *	2005-06-29	2014-09-09	Cisco Technology, Inc.	Parallel filesystem traversal for transparent mirroring of directories and files
US8131689B2 (en) *	2005-09-30	2012-03-06	Panagiotis Tsirigotis	Accumulating access frequency and file attributes for supporting policy based storage management
CN100571183C (zh) *	2007-08-24	2009-12-16	中国科学院计算技术研究所	一种基于胖树拓扑的屏障操作网络系统、装置及方法
US20100049307A1 (en) *	2008-08-25	2010-02-25	Aga Medical Corporation	Stent graft having extended landing area and method for using the same
US8924984B2 (en) *	2009-06-26	2014-12-30	Microsoft Corporation	Lock-free barrier with dynamic updating of participant count
JP5549574B2 (ja) *	2010-12-17	2014-07-16	富士通株式会社	並列計算機システム、同期装置、並列計算機システムの制御方法
WO2012127534A1 (fr) *	2011-03-23	2012-09-27	富士通株式会社	Procédé de synchronisation de barrières, dispositif de synchronisation de barrières et dispositif de traitement

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
DE2530887C3 (de) *	1975-07-10	1980-07-17	Ibm Deutschland Gmbh, 7000 Stuttgart	Steuereinrichtung zum Informationsaustausch
JPS5222406A (en) *	1975-08-13	1977-02-19	Nec Corp	Control system among information processing units
US4412285A (en) *	1981-04-01	1983-10-25	Teradata Corporation	Multiprocessor intercommunication system and method
US5047925A (en) *	1985-05-06	1991-09-10	Motorola, Inc.	Logical ring in a virtual single machine
US4829422A (en) *	1987-04-02	1989-05-09	Stellar Computer, Inc.	Control of multiple processors executing in parallel regions
US4914583A (en) *	1988-04-13	1990-04-03	Motorola, Inc.	Method of indicating processes resident within a cell of a data processing system
US5127092A (en) *	1989-06-15	1992-06-30	North American Philips Corp.	Apparatus and method for collective branching in a multiple instruction stream multiprocessor where any of the parallel processors is scheduled to evaluate the branching condition
IL93239A (en) *	1990-02-01	1993-03-15	Technion Res & Dev Foundation	High flow-rate synchronizer/schedular apparatus for multiprocessors
DE69130630T2 (de) *	1990-09-14	1999-09-09	Hitachi	Synchrones Verfahren und Gerät für Prozessoren
US5365228A (en) *	1991-03-29	1994-11-15	International Business Machines Corporation	SYNC-NET- a barrier synchronization apparatus for multi-stage networks
JP3285629B2 (ja) *	1992-12-18	2002-05-27	富士通株式会社	同期処理方法及び同期処理装置

1991
- 1991-11-28 JP JP3314164A patent/JP2552784B2/ja not_active Expired - Lifetime
1992
- 1992-11-27 AU AU29704/92A patent/AU649176B2/en not_active Ceased
- 1992-11-27 DE DE69228293T patent/DE69228293T2/de not_active Expired - Lifetime
- 1992-11-27 EP EP92310844A patent/EP0544535B1/fr not_active Expired - Lifetime
- 1992-11-27 CA CA002084039A patent/CA2084039C/fr not_active Expired - Fee Related
- 1992-11-30 US US07/983,075 patent/US5832261A/en not_active Expired - Lifetime

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
電子情報通信学会誌Ｄ−１ＶＯＬ．７５ＮＯ．８１９９２Ｐ．６３７−６４５石畑宏明外４名「高並列計算機ＡＰ１０００のアーキテクチャ」

Also Published As

Publication number	Publication date
AU2970492A (en)	1993-07-08
AU649176B2 (en)	1994-05-12
US5832261A (en)	1998-11-03
EP0544535A3 (fr)	1994-10-12
EP0544535A2 (fr)	1993-06-02
CA2084039C (fr)	1999-01-19
JPH05151173A (ja)	1993-06-18
DE69228293D1 (de)	1999-03-11
DE69228293T2 (de)	1999-06-02
CA2084039A1 (fr)	1993-05-29
EP0544535B1 (fr)	1999-01-27

Legal Events

Date	Code	Title	Description
1996-07-09	A01	Written decision to grant a patent or to grant a registration (utility model)	Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19960709
2007-06-19	FPAY	Renewal fee payment (event date is renewal date of database)	Free format text: PAYMENT UNTIL: 20080822 Year of fee payment: 12
2008-06-17	FPAY	Renewal fee payment (event date is renewal date of database)	Free format text: PAYMENT UNTIL: 20090822 Year of fee payment: 13
2009-06-18	FPAY	Renewal fee payment (event date is renewal date of database)	Free format text: PAYMENT UNTIL: 20090822 Year of fee payment: 13
2009-06-23	FPAY	Renewal fee payment (event date is renewal date of database)	Free format text: PAYMENT UNTIL: 20100822 Year of fee payment: 14
2010-06-22	FPAY	Renewal fee payment (event date is renewal date of database)	Free format text: PAYMENT UNTIL: 20110822 Year of fee payment: 15
2011-06-28	FPAY	Renewal fee payment (event date is renewal date of database)	Free format text: PAYMENT UNTIL: 20120822 Year of fee payment: 16
2011-11-28	EXPY	Cancellation because of completion of term
2012-02-08	FPAY	Renewal fee payment (event date is renewal date of database)	Free format text: PAYMENT UNTIL: 20120822 Year of fee payment: 16

Publication	Publication Date	Title
JP2552784B2 (ja)	1996-11-13	並列データ処理制御方式
KR100812225B1 (ko)	2008-03-13	멀티프로세서 ＳｏＣ 플랫폼에 적합한 크로스바 스위치구조
CN113272796B (zh)	2023-03-24	可重配置的数据处理器
US11386038B2 (en)	2022-07-12	Control flow barrier and reconfigurable data processor
EP0334954B1 (fr)	1993-04-21	Reseau en couches
JP2642671B2 (ja)	1997-08-20	ディジタルクロスバースイッチ
EP3884394A1 (fr)	2021-09-29	Chargement de configuration d'un processeur de données reconfigurable
JP3645281B2 (ja)	2005-05-11	共用メモリを有するマルチプロセッサ・システム
JPH05250293A (ja)	1993-09-28	通信装置及び通信装置を使用する方法
JPH0713945A (ja)	1995-01-17	演算処理部および制御・記憶部分離型マルチプロセッサ・システムのバス構造
US4262357A (en)	1981-04-14	Data processing system incorporating arbiters and selectors to allocate transmissions by multiple devices on a bus
US5050069A (en)	1991-09-17	Method and apparatus for simulating m-dimension connection networks in and n-dimension network where m is less than n
JP3987784B2 (ja)	2007-10-10	アレイ型プロセッサ
JP2003337807A (ja)	2003-11-28	クロスバの高速化方法及びクロスバの高速化方式
JP3119130B2 (ja)	2000-12-18	ネットワーク構成
JP2888206B2 (ja)	1999-05-10	データ処理装置
EP1675015B1 (fr)	2008-04-30	Système multiprocesseur reconfigurable notamment pour le traitement numérique des images de radar
JPH07160612A (ja)	1995-06-23	データの相互伝送方法
JP2001167084A (ja)	2001-06-22	ベクトル演算処理装置及びベクトルデータ移送方法
Boianov et al.	1991	Higher speed transputer communication using shared memory
JP2007188447A (ja)	2007-07-26	信号伝送方法、ブリッジユニット、および情報処理装置
JP2717850B2 (ja)	1998-02-25	高速通信機構を持った並列計算機
JP2007148622A (ja)	2007-06-14	インターフェース設定方法
JP2788250B2 (ja)	1998-08-20	ディジタル信号交換器及びディジタル信号交換器の選択モジュール
JPH1011391A (ja)	1998-01-16	データ転送制御装置およびデータ転送システム