JP7520501B2 - 半導体素子の分析システム及び方法 - Google Patents
半導体素子の分析システム及び方法 Download PDFInfo
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- Testing Or Measuring Of Semiconductors Or The Like (AREA)
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Description
Claims (17)
- 分析対象が存在する深さまで、ウェーハの表面の全面を同一のエッチング速度でエッチングする全面エッチングモジュール;
繰り返しエッチングされた前記ウェーハの表面から2次元構造情報を取得する分析モジュール;及び、
前記分析モジュールから繰り返し獲得した前記2次元構造情報を時系列的に積層処理して、3次元イメージを再構成するコンピュータ装置を含み、
前記分析モジュールは、
前記エッチングされたウェーハの表面の物理的イメージを獲得する第1の分析ユニット;及び、
前記エッチングされたウェーハの表面の電気的イメージを獲得する第2の分析ユニットを含む、半導体素子の分析システム。 - 前記全面エッチングモジュールは、前記ウェーハの表面の全面にイオンビームを照射するミリング装置、CMP(Chemical mechanical polishing)装置、乾式エッチング装置及び湿式エッチング装置から選択される一つである、請求項1に記載の半導体素子の分析システム。
- 前記ミリング装置は、前記ウェーハの全面に対してイオンビームを供給するイオンビーム照射部を含む、請求項2に記載の半導体素子の分析システム。
- 前記分析モジュールは、SEM(Scanning Electron Microscope)装置、PEEM(Photo Electron Emission Microscopy)装置、EDX(Energy Dispersive X-ray analysis)装置、XPS(X-rays Photoelectron Spectroscopy)、SPM(Scanning Probe Microscopy)、AFM(Atomic Force Microscopy)及びSTM(Scanning Tunneling Microscopy)のようにプローブ(probe)を用いた計測/分析装置、ラマン分光器(Raman spectroscopy)、TCAD(Technology Computer Aided Design)又は素子内のオプティック(optic)又は電子(electron)の挙動(behavior)を計算及び演算するシミュレーション技法及び光学計測/検査装備(Optical Metrology/Inspection tool)の少なくとも一つである、請求項1に記載の半導体素子の分析システム。
- 前記第1の分析ユニットはSEM装置を含む、請求項1に記載の半導体素子の分析システム。
- 前記第2の分析ユニットはPEEM装置又はEDX装置を含む、請求項1に記載の半導体素子の分析システム。
- 前記全面エッチングモジュールは、
前記ウェーハを支持するステージ;及び、
前記ウェーハの表面の回路層が同一のエッチング速度でエッチングされるように、前記ウェーハの全面に対してイオンビームを照射するイオンビーム照射部を含む、請求項1に記載の半導体素子の分析システム。 - 前記イオンビーム照射部は、前記ウェーハの口径よりも大きい口径を有する、請求項7に記載の半導体素子の分析システム。
- 前記繰り返し得られた2次元構造情報は2次元イメージを含み、
前記コンピュータ装置は、
前記分析モジュールから提供される前記2次元イメージをエッチング深さ及び(X、Y)座標の形態で区分し、前記エッチング深さ及び前記(X、Y)座標値に基づいて、前記2次元イメージを時系列的に積層して前記3次元イメージを再生成する制御器;及び、
前記制御器により区分された2次元イメージを格納する格納ユニットを含む、請求項1に記載の半導体素子の分析システム。 - 前記全面エッチングが進行された前記ウェーハの表面をクリーニングするクリーニングモジュールをさらに含む、請求項1に記載の半導体素子の分析システム。
- 処理する前記ウェーハが待機するロードロックをさらに含み、
前記全面エッチングモジュール、前記分析モジュール及び前記クリーニングモジュールは、前記ロードロックを基準としてクラスター形態で連結する、請求項10に記載の半導体素子の分析システム。 - 前記分析モジュールは、前記ウェーハのエッチング時に発生するエッチング副産物を分析する質量分析器及びOES(Optical Emission Spectroscopy)の少なくとも一つをさらに含む、請求項1に記載の半導体素子の分析システム。
- ウェーハの表面の全体を同一のエッチング速度で設定のエッチングターゲット深さだけ繰り返しエッチングして、前記ウェーハの次の表面を露出させるステップ;
前記エッチングターゲット深さだけ繰り返しエッチングされた前記ウェーハの表面の2次元構造情報を各々獲得するステップ;及び、
繰り返し獲得した前記2次元構造情報を時系列的に積層及び処理して3次元イメージを生成するステップを含み、
前記2次元構造情報を繰り返し獲得するステップは、
前記ウェーハの表面の2次元物理構造情報を獲得するステップ;及び、
前記ウェーハの表面の2次元電気構造情報を獲得するステップを含む、半導体素子の分析方法。 - 前記繰り返し得られた2次元構造情報は2次元イメージを含み、
前記2次元構造情報を繰り返し獲得するステップは、
前記ウェーハのエッチングターゲット深さ別に前記2次元イメージを(X、Y)座標形態で区分するステップ;及び、
前記エッチングターゲット深さ及び前記(X、Y)座標に基づいて、前記繰り返し獲得された2次元イメージを連続積層及び処理するステップを含む、請求項13に記載の半導体素子の分析方法。 - 前記ウェーハの表面のエッチング時に発生するエッチング副産物を分析するステップをさらに含む、請求項13に記載の半導体素子の分析方法。
- 前記エッチング副産物の量を分析して前記エッチングターゲット深さを制御する、請求項15に記載の半導体素子の分析方法。
- 前記ウェーハの表面の全体をエッチングするステップと、前記2次元イメージを測定するステップとの間に、エッチングされた前記ウェーハの表面をクリーニングするステップをさらに含む、請求項14に記載の半導体素子の分析方法。
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| KR1020190088824A KR102705854B1 (ko) | 2019-07-23 | 2019-07-23 | 반도체 소자의 분석 시스템 및 방법 |
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| CN111857111B (zh) * | 2019-04-09 | 2024-07-19 | 商汤集团有限公司 | 对象三维检测及智能驾驶控制方法、装置、介质及设备 |
| TWI786455B (zh) * | 2019-10-30 | 2022-12-11 | 德商卡爾蔡司Smt有限公司 | 確定積體半導體樣本中三維結構間的接觸區域尺寸的方法及其用途、電腦程式產品、以及半導體檢查裝置 |
| CN114646638A (zh) * | 2022-04-12 | 2022-06-21 | 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) | 芯片失效分析定位方法、装置、设备及存储介质 |
| CN115900554A (zh) * | 2022-09-08 | 2023-04-04 | 中国电子产品可靠性与环境试验研究所((工业和信息化部电子第五研究所)(中国赛宝实验室)) | 半导体器件的多层铜线路检测方法 |
| TWI894929B (zh) * | 2023-06-19 | 2025-08-21 | 德商卡爾蔡司Smt有限公司 | 在處理實體處執行的方法、含有記憶體及至少一處理器的處理實體、電腦程式及包含該電腦程式的載體 |
| CN120635050A (zh) * | 2025-06-24 | 2025-09-12 | 上海聚跃检测技术有限公司 | 一种基于刻蚀技术的半导体截面结构检测方法及系统 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004045172A (ja) | 2002-07-11 | 2004-02-12 | Fujitsu Ltd | 3次元構造評価方法 |
| JP2018152330A (ja) | 2017-02-16 | 2018-09-27 | カール ツァイス マイクロスコーピー ゲーエムベーハーCarl Zeiss Microscopy GmbH | 物体を分析する方法およびこの方法を実行するための荷電粒子ビーム装置 |
| JP2019078684A (ja) | 2017-10-26 | 2019-05-23 | 信越半導体株式会社 | シリコンウェーハの金属不純物分析方法 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10209112A (ja) * | 1997-01-27 | 1998-08-07 | Tera Tec:Kk | エッチング方法および装置 |
| US6317514B1 (en) | 1998-09-09 | 2001-11-13 | Applied Materials, Inc. | Method and apparatus for inspection of patterned semiconductor wafers |
| WO2003050841A1 (en) | 2001-11-30 | 2003-06-19 | Kla Tencor Corporation | A photoelectron emission microscope for wafer and reticle inspection |
| US9698062B2 (en) * | 2013-02-28 | 2017-07-04 | Veeco Precision Surface Processing Llc | System and method for performing a wet etching process |
| WO2015144700A2 (en) | 2014-03-25 | 2015-10-01 | Carl Zeiss Sms Ltd. | Method and apparatus for generating a predetermined three-dimensional contour of an optical component and/or a wafer |
| KR102257901B1 (ko) | 2014-09-19 | 2021-05-31 | 삼성전자주식회사 | 반도체 검사 장비 및 이를 이용한 반도체 소자의 검사 방법 |
| KR102410666B1 (ko) | 2015-01-09 | 2022-06-20 | 삼성전자주식회사 | 반도체 소자의 계측 방법, 및 이를 이용한 반도체 소자의 제조방법 |
| KR102228497B1 (ko) * | 2016-07-19 | 2021-03-15 | 도쿄엘렉트론가부시키가이샤 | 3 차원 반도체 디바이스 및 그 제조 방법 |
| CN109643725B (zh) * | 2016-08-08 | 2022-07-29 | 东京毅力科创株式会社 | 三维半导体器件及制造方法 |
| US10847376B2 (en) * | 2018-06-28 | 2020-11-24 | Sandisk Technologies Llc | In-situ deposition and etch process and apparatus for precision patterning of semiconductor devices |
| US11018063B2 (en) * | 2018-11-26 | 2021-05-25 | Sandisk Technologies Llc | Method and apparatus for nanoscale-dimension measurement using a diffraction pattern filter |
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- 2019-10-29 US US16/667,499 patent/US11295970B2/en active Active
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004045172A (ja) | 2002-07-11 | 2004-02-12 | Fujitsu Ltd | 3次元構造評価方法 |
| JP2018152330A (ja) | 2017-02-16 | 2018-09-27 | カール ツァイス マイクロスコーピー ゲーエムベーハーCarl Zeiss Microscopy GmbH | 物体を分析する方法およびこの方法を実行するための荷電粒子ビーム装置 |
| JP2019078684A (ja) | 2017-10-26 | 2019-05-23 | 信越半導体株式会社 | シリコンウェーハの金属不純物分析方法 |
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| JP2021019179A (ja) | 2021-02-15 |
| US20220277975A1 (en) | 2022-09-01 |
| US20210028033A1 (en) | 2021-01-28 |
| KR102705854B1 (ko) | 2024-09-11 |
| CN112309890A (zh) | 2021-02-02 |
| KR20210011657A (ko) | 2021-02-02 |
| CN112309890B (zh) | 2024-12-10 |
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| US11626306B2 (en) | 2023-04-11 |
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