JPH01123442A - Ceramic package for semiconductor device - Google Patents
Ceramic package for semiconductor deviceInfo
- Publication number
- JPH01123442A JPH01123442A JP62281626A JP28162687A JPH01123442A JP H01123442 A JPH01123442 A JP H01123442A JP 62281626 A JP62281626 A JP 62281626A JP 28162687 A JP28162687 A JP 28162687A JP H01123442 A JPH01123442 A JP H01123442A
- Authority
- JP
- Japan
- Prior art keywords
- sealing material
- substrate
- bonding
- grooves
- ceramic package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
- H10W76/60—Seals
Landscapes
- Die Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体素子を封止する際に使用されるセラミッ
クパッケージに関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a ceramic package used for sealing a semiconductor element.
従来のこの種セラミックパッケージは、半導体素子が固
着される凹部が形成された基板と、この基板の凹部と対
向する凹部が形成さｎた蓋体とからなシ、基板と蓋体は
凹部どうしが向き合うよう低融点ガラスによって互いに
接着されている。すなわち、前記基板と蓋体を接着させ
ることによって、半導体素子を気密封止する中空部が形
成されることになる。これを図によって説明すると、第
５図は従来のとの種低触点ガラスシールセラミックパッ
ケージを使用した半導体装置を示す側断面図で、同図に
おいて、１はセラミック基板で、このセラミック基板１
には半導体素子２がろう材（図示せず）を介して固着さ
れる凹部１ａ が形成されている。３は外部装置（図示
せず）と接続されるリードで、前記半導体素子２の配線
用電極パッド（図示せず）に金あるいはアルミからなる
ポンディングワイヤ４を介して接続され、前記セラミッ
ク基板１に低融点ガラスからなる封止材５によって接着
されている。６は蓋体で、全体が前記セラミック基板１
と同様にセラミックによって形成されてオシ、前記リー
ド３とポンディングワイヤ４とのボンディング部を囲む
開口部を有する凹部６ａが形成され、この凹部６ａと前
記セラミック基板１の凹部１ａ とを対向させて前記セ
ラミック基板１に封止材５を介して固着されている。A conventional ceramic package of this type consists of a substrate having a recess formed thereon to which a semiconductor element is fixed, and a lid body having a recess formed therein opposite to the recess of the substrate. They are bonded together by low-melting glass so that they face each other. That is, by bonding the substrate and the lid, a hollow portion is formed that hermetically seals the semiconductor element. To explain this with the help of diagrams, Fig. 5 is a side cross-sectional view showing a semiconductor device using a conventional low-contact glass-sealed ceramic package.
A recess 1a is formed in which the semiconductor element 2 is fixed via a brazing material (not shown). A lead 3 is connected to an external device (not shown), and is connected to a wiring electrode pad (not shown) of the semiconductor element 2 via a bonding wire 4 made of gold or aluminum. are bonded to each other with a sealing material 5 made of low melting point glass. 6 is a lid body, the whole of which is attached to the ceramic substrate 1
Similarly, a recess 6a is formed of ceramic and has an opening surrounding the bonding portion between the lead 3 and the bonding wire 4, and the recess 6a and the recess 1a of the ceramic substrate 1 are opposed to each other. It is fixed to the ceramic substrate 1 with a sealant 5 interposed therebetween.
どのように構成された半導体装置を組立てるには、先ず
、セラミック基板１の凹部１ａ内に半導体素子２をろう
材によって固着させる。次で、このセラミック基板１に
リード３を封止材５によって接着させ、ボンディングワ
イヤ４でワイヤボンディングを行なう。なお、封止材５
は４００℃〜５００℃において溶融され、溶融状態で接
着部分に滴下される。しかる後、前記セラミック基板１
上に封止材５を介して蓋体６を固着させることによって
組立てが終了する。In order to assemble the semiconductor device of any configuration, first, the semiconductor element 2 is fixed in the recess 1a of the ceramic substrate 1 using a brazing material. Next, the leads 3 are bonded to the ceramic substrate 1 using the sealing material 5, and wire bonding is performed using the bonding wire 4. In addition, the sealing material 5
is melted at 400° C. to 500° C. and dripped onto the adhesive part in a molten state. After that, the ceramic substrate 1
The assembly is completed by fixing the lid 6 on top via the sealing material 5.
しかるに、このように構成された従来のセラミックパッ
ケージ′においては、第６図に示すように、セラミック
基板１と蓋体６のそれぞれの接着面が平坦であるため、
封止材５によって接着された後に封止材５が剥れやすい
という問題があった。However, in the conventional ceramic package configured as described above, as shown in FIG. 6, the adhesive surfaces of the ceramic substrate 1 and the lid 6 are flat, so
There was a problem in that the sealing material 5 easily peeled off after being bonded with the sealing material 5.
本発明に係る半導体装置用セラミックパッケージは、基
板および蓋体のそれぞれの接着面に凹溝を設けたもので
ある。The ceramic package for a semiconductor device according to the present invention has grooves provided on the respective adhesive surfaces of the substrate and the lid.
封止材で凹溝内を満たすことによって、基板および蓋体
と封止材との接着面積が増大され、封止材が強固に接着
される。By filling the groove with the sealing material, the bonding area between the substrate and the lid and the sealing material is increased, and the sealing material is firmly bonded.
以下、その構成等を図に示す実施例によシ詳細に説明す
る。Hereinafter, the configuration and the like will be explained in detail with reference to the embodiment shown in the drawings.
第１図は本発明に係るセラミックパッケージを使用し次
子導体装置を示す側断面図、第２図は本発明に係るセラ
ミックパッケージを示す斜視図である。これらの図にお
いて、前記従来例で説明したものと同一もしくは同等部
材については同一符号を付し、ここにおいて詳細な説明
は省略する。FIG. 1 is a sectional side view showing a secondary conductor device using the ceramic package according to the present invention, and FIG. 2 is a perspective view showing the ceramic package according to the present invention. In these figures, the same or equivalent members as those explained in the conventional example are given the same reference numerals, and detailed explanation will be omitted here.
これらの図において、１１はセラミック基板１の接着面
に形成された凹溝、１２は蓋体６の接着面に形成された
凹溝で、これらの凹溝１１．１２は、セラミック基板１
および蓋体６の接着面側開口部からそれぞれの内部に向
かうにしたがい幅寸法が次第に狭くなるよう側面視略Ｖ
字形に形成されており、セラミック基板１および蓋体６
を成形する際に同時に形成されている。In these figures, 11 is a groove formed on the adhesive surface of the ceramic substrate 1, 12 is a groove formed on the adhesive surface of the lid 6, and these grooves 11 and 12 are grooves formed on the adhesive surface of the ceramic substrate 1.
and the width dimension becomes gradually narrower from the adhesive surface side opening of the lid body 6 toward the inside thereof.
The ceramic substrate 1 and the lid body 6 are
It is formed at the same time as molding.
このように凹溝１１，１２が形成されたセラミックパッ
ケージを使用して半導体装置を組立てるには、先ず、セ
ラミック基板１に半導体素子２を固着させ、かつリード
３を封止材５によって接着させる。そして、ボンディン
グワイヤ４でワイヤボンディングした後、セラミック基
板１および蓋体６の接着面に封止材を塗布し、両者を接
着させる。乙の際、蓋体６上に重プを載せるか、あるい
はセラミック基板１が上側になるよう裏返し、セラミッ
ク基板１の自重で押圧するか、さらにセラミック基板１
上に重シを載せるかして凹溝１１゜１２内を封止材５で
充満させる。しかる後、封止材５が硬化した時点で組立
てが終了する。To assemble a semiconductor device using the ceramic package in which the grooves 11 and 12 are formed in this way, first, the semiconductor element 2 is fixed to the ceramic substrate 1 and the leads 3 are bonded with the sealing material 5. After wire bonding with the bonding wire 4, a sealing material is applied to the bonding surfaces of the ceramic substrate 1 and the lid 6 to bond them together. At the time of B, either place a heavy plate on the lid body 6, or turn it over so that the ceramic substrate 1 is on the upper side and press it with its own weight, or further press the ceramic substrate 1 with its own weight.
The grooves 11 and 12 are filled with the sealing material 5 by placing a weight on top. Thereafter, the assembly is completed when the sealing material 5 is cured.
したがって、凹溝１１，１２にょシ封止材５とセラミッ
ク基板１および蓋体６との接着面積が増大し、封止材５
が強固に接着されることになる。Therefore, the adhesive area between the grooves 11 and 12 and the sealing material 5 and the ceramic substrate 1 and the lid 6 increases, and the sealing material 5 increases.
will be firmly bonded.
また、本実施例では凹溝１１，１２が側面視略Ｖ字形に
形成されたものを示したが、この凹溝１１．１２を第３
図および第４図に示すように、側面視略矩形および側面
視略半円形に形成しても同等の効果が得られる。Further, in this embodiment, the grooves 11 and 12 are formed in a substantially V-shape in side view, but the grooves 11 and 12 are
As shown in the drawings and FIG. 4, the same effect can be obtained even if it is formed into a substantially rectangular shape in side view or a substantially semicircular shape in side view.
以上説明したように本発明によれば、基板および蓋体の
それぞれの接着面に凹溝を設けたため、この凹溝内を封
止材で溝たすことによって基板および蓋体と封止材との
接着面積が増大さｎ、封止材が強固に接着される。As explained above, according to the present invention, since grooves are provided on the bonding surfaces of the substrate and the lid, the grooves are filled with the sealing material to connect the substrate and the lid to the sealing material. The adhesion area is increased, and the sealing material is firmly adhered.
したがって、封止材が剥れにくくなシ、気密性が良く高
品質の半導体装置を得ることができる。Therefore, it is possible to obtain a high-quality semiconductor device in which the sealing material does not easily peel off and has good airtightness.
第１図は本発明に係るセラミックパッケージを使用した
半導体装置を示す側断面図、第２図は本発明に係るセラ
ミックパッケージを示す斜視図、第３図および第４図は
他の実施例を示す図、第５図は従来の低融点ガラスシー
ルセラミックパッケージを使用した半導体装置を示す側
断面図、第６図は従来のセラミックパッケージを示す斜
視図である。
１・・・・セラミック基板、５・・・・封止材、６・・
・・蓋体、１１，１２・・・−凹溝。FIG. 1 is a side sectional view showing a semiconductor device using a ceramic package according to the present invention, FIG. 2 is a perspective view showing a ceramic package according to the present invention, and FIGS. 3 and 4 show other embodiments. 5 is a side sectional view showing a semiconductor device using a conventional low melting point glass-sealed ceramic package, and FIG. 6 is a perspective view showing a conventional ceramic package. 1... Ceramic substrate, 5... Sealing material, 6...
... Lid body, 11, 12...-concave groove.
Claims (1)
らなる半導体装置用セラミックパッケージにおいて、前
記基板および蓋体のそれぞれの接着面に凹溝を設けたこ
とを特徴とする半導体装置用セラミックパッケージ。A ceramic package for a semiconductor device comprising a substrate and a lid that are bonded to each other with a sealing material, characterized in that a groove is provided on each bonding surface of the substrate and the lid. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62281626A JPH01123442A (en) | 1987-11-06 | 1987-11-06 | Ceramic package for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62281626A JPH01123442A (en) | 1987-11-06 | 1987-11-06 | Ceramic package for semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01123442A true JPH01123442A (en) | 1989-05-16 |
Family
ID=17641740
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62281626A Pending JPH01123442A (en) | 1987-11-06 | 1987-11-06 | Ceramic package for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01123442A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014165305A (en) * | 2013-02-25 | 2014-09-08 | Kyocera Crystal Device Corp | Electronic device, glass sealing method of the same, and lid member for the same |
| CN108529550A (en) * | 2018-04-28 | 2018-09-14 | 北京航天控制仪器研究所 | Wafer-level package of MEMS chip structure and its processing method based on wafer bonding technique |
-
1987
- 1987-11-06 JP JP62281626A patent/JPH01123442A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014165305A (en) * | 2013-02-25 | 2014-09-08 | Kyocera Crystal Device Corp | Electronic device, glass sealing method of the same, and lid member for the same |
| CN108529550A (en) * | 2018-04-28 | 2018-09-14 | 北京航天控制仪器研究所 | Wafer-level package of MEMS chip structure and its processing method based on wafer bonding technique |
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