JPH02283115A - Active filter - Google Patents

Abstract

PURPOSE:To obtain a prescribed frequency automatically and to reduce the error of a cut-off frequency by switching a resistance of a resistance circuit of a filter section with a switching signal in response to a level of an output signal of the filter section. CONSTITUTION:An input signal VI passes through a switching circuit 1 when a switching signal VS is at a low level and a pulse signal VP passes therethrough when the signal is at a high level. Thus, the signal VP is inputted to a filter section 2 when the signal VS is at a high level, a level deciding section 3 compares an output waveform of the filter section 2 (trailing edge of a pulse) after a prescribed time elapses with the leading edge of each pulse of the signal VP with a reference voltage VR, and outputs the result of decision of quantity as a decision signal VJ. Then a resistance control circuit 5 receives the signal VJ and outputs a resistance control signal VRC whose value is changed in response to the signal VJ when the signal VS is at a high level and keeps the value of the signal VRC when the signal VS is at a low level. Then it is possible to bring the cut-off frequency to a prescribed frequency automatically via a resistance circuit 21 to reduce the error in the cut-off frequency.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an active filter, and particularly to a monolithic LS composed of resistors, capacitors, operational amplifiers, etc.
This relates to a built-in RC type active filter.

[Conventional technology]

The biggest problem when incorporating an RC type active filter inside a monolithic LSI is that the error in element values of capacitors and resistors is 2 times larger than that of discrete elements.
This is an extraordinarily large amount, ranging from 0% to 40%. On the other hand, the relative error between resistors and capacitors within the same chip is 1% or less, which is a value that can be ignored compared to the absolute value error.

Therefore, if an active filter is constructed using these resistors and capacitors, the cutoff frequency will vary greatly, making it extremely difficult to realize a filter that requires precision. For example, reduce the variation in element values by ±3'0%.
Then, the variation in cutoff frequency is -40%~
It reaches +100%.

From the above, in recent years, filters built into monolithic LSIs are often constructed of switched capacitor type circuits. However, since the switched capacitor type circuit has a sample value system, an anti-aliasing filter and a smoothing filter are always required before and after the switched capacitor type circuit. These filters have no choice but to be constructed of RC type active filters, and variations in cutoff frequency are a design problem.

[Problem to be solved by the invention]

The conventional active filter described above has a structure equipped with resistors and capacitors, so it is not a monolithic LS.
When built into I, there is a drawback that the error in the cutoff frequency becomes very large due to variations in the element values of these resistors and capacitors.

An object of the present invention is to provide an active filter that can reduce cutoff frequency errors.

[Means for Solving the Problems] The active filter of the present invention includes a switching circuit that transmits an input signal when the switching signal is at a first level and a pulse signal when it is at a second level, and a value of a resistance control signal. a filter section that includes a resistance circuit that switches the resistance value according to the switching circuit, and performs a predetermined filtering process on the output signal of the switching circuit, and compares the level of the output signal of the filter section with a reference voltage and determines the comparison result. a level determination section that outputs as a signal;
a pulse signal generator that generates the pulse signal with a predetermined amplitude, pulse width, and period; and a first pulse signal generator that outputs the resistance control signal that changes its value in accordance with the determination signal when the switching signal is at a second level. and a resistance control circuit that holds the value of the resistance control signal when the resistance control signal is at the level of .

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of the present invention.

This embodiment includes a switching circuit 1 that transmits an input signal 1 when the switching signal s is at a low level and transmits a pulse signal VP when the switching signal s is at a high level, and a resistance control signal V.

A filter unit 2 includes a resistor circuit 21, an operational amplifier 22, and a capacitor C1, and performs predetermined filter processing on the output signal of the switching circuit 1, a comparator 31, and a D-flip-flop. a level determination unit 3 which compares the level of the output signal of the filter unit 2 with a reference voltage vR and outputs the comparison result as a determination signal VJ; It includes a pulse signal generator 4 that generates a pulse signal, an AND gate 51, and an up/down counter 52, and a switching signal v
The resistance control circuit 5 outputs a resistance control signal vRc whose value changes according to the determination signal J when s is at a high level, and holds the value of the resistance control signal VRC when s is at a low level.

Next, the operation of this embodiment will be explained.

Immediately after the power of the LSI is turned on or while it is in standby mode and does not need to operate as a filter, the external switching signal s is at a high level, and the filter unit 2 receives pulses from the pulse signal generator 4. Signal VP is input.

The level determination unit 3 compares the output waveform of the filter unit 2 with the reference voltage VR when a certain period of time has elapsed from the rise of each pulse of the pulse signal VP &<the fall of the pulse in this embodiment), and determines the magnitude determination result. Output as signal VJ.

FIG. 2 shows the response characteristics of the filter section 2 to the pulse signal VP.

The peak value Vt of the output signal VO of the filter section 2 after a certain period of time (T seconds) from the rise of the pulse signal VP is expressed as follows, where the gain of the filter 2 is "IJ", Vt=Vr (1-evp (-T/R-C) )...
1) However, Vr: the peak value of the pulse signal VP R: the resistance value of the resistor circuit 21 C: the capacitance value of the capacitor C1.

Here, if the cutoff frequency is fc, then fc = 1
/R, C-(2>, so in the end, Vt=Vr (1-evp (2π・fc -T))
...(3).

That is, if you measure Vt, f. The value of is known.

Conversely, if the standard cutoff frequency is fc, (3)
If the value obtained by entering this into the formula is t', then if f c > f c ', then vt >vt' f C < f
If C', it is clear that vt<vt'.

The level determining section 3 uses this principle to determine the magnitude of the cutoff frequency. In this embodiment, when Vt is higher than the reference potential vt', it is "1", and when it is lower, it is "0".
” is output as the determination signal VJ.

In this embodiment, the resistance control circuit 5 is realized by an up/down counter 52, and the output signal of the filter section 2 is
When the o-wave height value Vt is high (that is, when the cutoff frequency is high and the judgment signal VJ is "1"), it counts up and increases the resistance value of the resistor circuit 21, and when it is low (that is, when the cutoff frequency is low), the resistance value of the resistance circuit 21 is increased. In this case, if the determination signal V is "0", it counts down and works to lower the resistance value.

Since the cutoff frequency fc is inversely proportional to the resistance value of the resistor circuit 21, it can be seen that when the cutoff frequency fc is lower than the reference frequency, it works to increase the frequency, and when it is higher, it works to lower the frequency. .

A specific circuit of the resistance circuit 21 is shown in FIG.

In this circuit, resistors R+ (resistance value r) to R6 (resistance value 32r) are binary weighted to resistor Ro (resistance value ro).
) are connected in series, and each resistor R1~
Analog switches SI to S6 are connected in parallel to R6.

By driving the analog switches 81 to S6 with the resistance control signal Rc from the resistance control circuit 5, the resistance value between the input terminal and the output terminal can be changed.

The AND gate 51 is inserted so that the cutoff frequency is adjusted only while the switching signal s is at a high level, and during normal operation, the up/down counter 52 stops and holds the previous value.

FIG. 4 is a block diagram showing a second embodiment of the present invention.

In this embodiment, the filter section 2A is a Sallen-Key type filter, and the cutoff frequency is adjusted by two resistor circuits 21A and 21a.

〔Effect of the invention〕

As explained above, the present invention is configured to use a switching signal to switch the resistance value of the resistance circuit of the filter section according to the level of the output signal of the filter section, thereby automatically changing the cutoff frequency to a predetermined frequency. This has the effect of reducing cutoff frequency errors.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention;
The figures are waveform diagrams of various signals for explaining the operation of the embodiment shown in Fig. 1, Fig. 3 is a circuit diagram showing a specific example of the resistance circuit of the embodiment shown in Fig. 1, and Fig. The figure is a block diagram showing a second embodiment of the present invention. 1...Switching circuit, 2,2^...Filter section, 3...
- Level determination section, 4... Pulse signal generator, 5...
Resistance control circuit, 21.21A, 21B...resistance circuit,
22... operational amplifier, 31... comparator, 32...
D-flip-flop, 51...AND gate, 52
...up/down counter, C,, C2...capacitor, Ro, R1~R6...resistor, Sl~s6
...Analog switch.

Claims (1)

[Claims] A switching circuit that transmits an input signal when the switching signal is at a first level and a pulse signal when the switching signal is at a second level, and a resistor circuit that switches the resistance value according to the value of the resistance control signal,
a filter section that performs predetermined filter processing on the output signal of the switching circuit; a level determination section that compares the level of the output signal of the filter section with a reference voltage and outputs the comparison result as a determination signal; , a pulse signal generator that generates the pulse signal with a pulse width and period, and a pulse signal generator that outputs the resistance control signal that changes its value in accordance with the determination signal when the switching signal is at a second level, and the resistance control signal is at a first level. and a resistance control circuit that holds the value of the resistance control signal.