JPH02290084A - Silicon carbide light emitting diode device and manufacture of silicon carbide single crystal - Google Patents

Silicon carbide light emitting diode device and manufacture of silicon carbide single crystal

Info

Publication number
JPH02290084A
JPH02290084A JP1052302A JP5230289A JPH02290084A JP H02290084 A JPH02290084 A JP H02290084A JP 1052302 A JP1052302 A JP 1052302A JP 5230289 A JP5230289 A JP 5230289A JP H02290084 A JPH02290084 A JP H02290084A
Authority
JP
Japan
Prior art keywords
type
silicon carbide
substrate
light emitting
emitting diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1052302A
Other languages
Japanese (ja)
Other versions
JPH06103751B2 (en
Inventor
Tatsuhiko Niina
新名 達彦
Kiyoshi Ota
潔 太田
Toshitake Nakada
中田 俊武
Yasuhiko Matsushita
保彦 松下
Takahiro Kamiya
上谷 高弘
Yoshiharu Fujikawa
藤川 好晴
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP5230289A priority Critical patent/JPH06103751B2/en
Priority to US07/616,768 priority patent/US5187547A/en
Publication of JPH02290084A publication Critical patent/JPH02290084A/en
Publication of JPH06103751B2 publication Critical patent/JPH06103751B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/536Shapes of wire connectors the connected ends being ball-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Led Device Packages (AREA)
  • Led Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (イ) 産業上の利用分野 本発明は青色発光可能な炭化ケイ素発光ダイオド装置及
び炭化ケイ素単結晶の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a silicon carbide light emitting diode device capable of emitting blue light and a method for producing a silicon carbide single crystal.

(口〉 従来の技術 一般に、炭化ケイ素[3 i C]は、耐熱性および機
械的強度に優れ、放射線に対して強いなどの物理的、化
学的性質から耐環境性半導体材料として注目されており
、しかもSiC結晶には同一の化学組成に対して立方、
六方なとの種々の結晶構造が存在し、その禁制帯幅は2
39〜3.33eVと広範囲にわたるとともに、pn接
合の形成が可能であることから、赤色から青色までのす
へての波長範囲の可視光を発する発光ダイオード材料と
して有望視され、なかでも室温において約3eVの禁制
帯幅を有する6H型のSiC結晶は、青色発光ダイ才一
ドの材料として用いられている。
(Explanation) Conventional technology In general, silicon carbide [3iC] has attracted attention as an environmentally resistant semiconductor material due to its physical and chemical properties such as excellent heat resistance, mechanical strength, and resistance to radiation. , Moreover, for the same chemical composition, SiC crystal has cubic,
Various hexagonal crystal structures exist, and the forbidden band width is 2.
Because it has a wide range of 39 to 3.33 eV and is capable of forming pn junctions, it is seen as a promising material for light emitting diodes that emit visible light in the entire wavelength range from red to blue. A 6H type SiC crystal with a forbidden band width of 3 eV is used as a material for blue light emitting diodes.

そして、通常SiC単結晶の成長は液相エピタキシャル
成長法の一種であるデイップ法により行なわれ、たとえ
は日刊工業新聞社発行の雑誌「電子技術,第26巻、第
14号の頁128〜129に記載のような装置が用いら
れている。すなわち、この装置は第4図に示すように構
成されており、グラファイトからなるるつぼ(16)内
にケイ素[Si]が充填され、不活性ガス雰囲気中にお
いてるつぼ(16)の外側に巻装された高周波誘導加熱
コイル(図示せず〉によりるつぼ(16)が加熱きれて
St融液(17〉が形成され、グラファイトからなる支
持棒(18)の先端部に形成きれたv字状の切込み(1
9)に6H型のS + Cm結晶基板(20)が装着、
固定きれ、基板(20〉が支持棒(18〉ごと84融液
(17〉中に一定時間浸漬され、基板(20)の表面に
6H型のSiC単結晶が成長する。
The growth of SiC single crystals is usually carried out by the dip method, which is a type of liquid phase epitaxial growth method, as described in the magazine "Electronic Technology, Vol. 26, No. 14, pp. 128-129, published by Nikkan Kogyo Shimbun. This device is constructed as shown in Fig. 4, in which a crucible (16) made of graphite is filled with silicon [Si] and heated in an inert gas atmosphere. The crucible (16) is completely heated by a high-frequency induction heating coil (not shown) wound around the outside of the crucible (16), and an St melt (17) is formed, and the tip of the support rod (18) made of graphite is heated. V-shaped notch (1
9) is equipped with a 6H type S + Cm crystal substrate (20),
Once fixed, the substrate (20) is immersed together with the support rod (18) in the melt (17) for a certain period of time, and a 6H type SiC single crystal grows on the surface of the substrate (20).

斯るSiC単結晶の成長は、St融液(17)に、加熱
されたるつぼ(16)から炭素[C]が少量溶け込み、
Si融液<17)の対流によって基板(20)の表面近
辺に運ばれてStと反応することによって行われる。
The growth of such a SiC single crystal is achieved by dissolving a small amount of carbon [C] into the St melt (17) from the heated crucible (16).
This is carried out by the Si melt <17) being carried near the surface of the substrate (20) by convection and reacting with St.

また結晶成長中、支持棒(18)が第1図中の矢印のよ
うに回転されて基板(20)が定位置で回転され、成長
層の均一化が図られる。
Further, during crystal growth, the support rod (18) is rotated as shown by the arrow in FIG. 1, and the substrate (20) is rotated in a fixed position, thereby making the growth layer uniform.

なお、n型層の成長の際には、ドナー不純物として窒化
ケイ素[s:+NilがSi融液(17)に添加される
とともに、発光センターとなる少量のアルミニウム[A
2]が添加され、p型層の成長の際には、アクセブタ不
純物としてApが添加される。
Note that during the growth of the n-type layer, silicon nitride [s:+Nil] is added to the Si melt (17) as a donor impurity, and a small amount of aluminum [A
2] is added, and during growth of the p-type layer, Ap is added as an acceptor impurity.

また従来のSiC発光ダイオードは、先述の電子技術、
第26巻、第14号、P128〜P129に示されてい
るように、n型SiC基板の一主面上に、不純物濃度の
制御されたn型層、p型層を順次積層し、p型層表面に
Al/Si!極を、n型基板の他主面にAu/Nit極
をそれぞれ形成したものである。
In addition, conventional SiC light emitting diodes are based on the electronic technology mentioned above.
As shown in Volume 26, No. 14, P128-P129, an n-type layer and a p-type layer with controlled impurity concentrations are sequentially stacked on one main surface of an n-type SiC substrate, and a p-type Al/Si on the layer surface! Au/Nit electrodes are formed on the other main surface of an n-type substrate.

(ハ)発明が解決しようとする課題 しかし乍ら、発光材料であるSiCは間接遷移型のエネ
ルギバンド構造を持つため直接遷移型の発光材料に比へ
発光効率が低い。このためSiC発光ダイオードは他の
材料からなる発光ダイ才ドよりも発光強度の弱いものし
か得られなかった。
(c) Problems to be Solved by the Invention However, since SiC, which is a light-emitting material, has an indirect transition type energy band structure, its luminous efficiency is lower than that of a direct transition type light-emitting material. For this reason, SiC light emitting diodes have only a weaker emission intensity than light emitting diodes made of other materials.

したがって、本発明は高輝度化が図れるSiC発光ダイ
才一ド装置及び炭化ケイ素単結晶の製造方法を提供する
ことを技術的課題とする。
Therefore, the technical object of the present invention is to provide a SiC light emitting diode device and a method for manufacturing a silicon carbide single crystal that can achieve high brightness.

(二〉 課題を解決するための手段 本発明は、n型炭化ケイ素基板の一主面上に炭化ケイ素
からなるn型層及びp型層がこの順序で積層きれ、上記
n型基板の他主面一F及び上記p型層上に夫々n型オー
ミック電極及びp型オーミック電極が形成された戻化ケ
イ素発光ダイオード素子と、当該発光ダイオード素子を
載置固着するステムと、を備えた炭化ケイ素発光ダイオ
ード装置であって、上記課題を解決するため、上記n型
基板の結晶成長面には(000丁)面又は(0001)
面から傾斜した面が用いられており、上記n型オーミッ
ク電極及びp型オーミック電極は、各炭化ケイ素の他主
面に対して部分的に形成されており、−ヒ記発光ダイオ
ード素子は上記p型層表面を底辺とし、上記n型基板表
面を1二辺とする略断面台形状を成していると共に、当
該p型層側で上記ステムに固着されていることを特徴と
する。
(2) Means for Solving the Problems The present invention provides an arrangement in which an n-type layer and a p-type layer made of silicon carbide are laminated in this order on one main surface of an n-type silicon carbide substrate. A silicon carbide light emitting device comprising a regenerated silicon light emitting diode element in which an n-type ohmic electrode and a p-type ohmic electrode are formed on a flush F and the p-type layer, respectively, and a stem for mounting and fixing the light emitting diode element. In order to solve the above problem in a diode device, the crystal growth plane of the n-type substrate has a (000 plane) plane or a (0001 plane).
The n-type ohmic electrode and the p-type ohmic electrode are formed partially with respect to the other main surface of each silicon carbide; It is characterized in that it has a substantially trapezoidal cross section with the surface of the mold layer as the base and the surface of the n-type substrate as one or two sides, and is fixed to the stem on the p-type layer side.

より好適な本発明は、上述の構成において、n型基板の
結晶成長面に(OO+)T)面を用いることを特徴きす
る。
A more preferred feature of the present invention is that, in the above configuration, the (OO+)T) plane is used as the crystal growth plane of the n-type substrate.

また本発明は、上述の構成において、n型基板が10Ω
鉦以下の比抵抗を有すると共に、n型才ミック電極がn
型基板の他主面の隅に配されていることを特徴とする。
Further, in the present invention, in the above configuration, the n-type substrate has a resistance of 10Ω.
In addition to having a specific resistance of less than 300 nm, the n-type electrode has a specific resistance of
It is characterized by being arranged at the corner of the other main surface of the mold substrate.

さらに本発明は、グラファイトからなるるつぼ内のケイ
素融液中にAPおよびNを添加し、該融液中に炭化ケイ
素単結晶基板を浸漬して、前記基板上に炭化ケイ素単結
晶からなるn型層を液相エビタキジャル成長させる炭化
ケイ素単結晶の製造方法において、前記ケイ素形液中に
添加するAρの添加量を、ケイ素融液中にA足のみを添
加したとき得られる炭化ケイ素単結晶のキャリア濃度が
5. 5X 10” − 6 X 10” am−’と
なる範囲に設定すると共に、前記ケイ素融液中に添加す
るNの添加量を、ケイ素融液中にNのみを添加したとき
得られる炭化ケイ素単結晶のキャリア濃度が7x tQ
 1 7〜5×1016cm−3となる範囲に設定し、
且つ成長温度を1650〜1800℃とすることを特徴
とする。
Further, in the present invention, AP and N are added to a silicon melt in a crucible made of graphite, a silicon carbide single crystal substrate is immersed in the melt, and an n-type silicon carbide single crystal substrate is placed on the substrate. In a method for producing a silicon carbide single crystal in which a layer is grown in a liquid phase phase, the amount of Aρ added to the silicon form liquid is changed to a carrier of a silicon carbide single crystal obtained when only A feet are added to the silicon melt. The concentration is 5. 5 X 10" - 6 X 10"am-', and the amount of N added to the silicon melt is set to a range of The carrier concentration is 7x tQ
1 Set to a range of 7 to 5 x 1016 cm-3,
Moreover, the growth temperature is 1650 to 1800°C.

(ホ)作用 本発明装置は、基板の結晶成長面に(0001)面又は
(0001)面から傾斜した面を用い、n型才一ミツク
電極及びp型オーミツク電極を各炭化ケイ素表面に対し
て夫々部分的に形成し、発光ダイオード素子を、p型層
表面が広面積となる略断面台形状とすると共にp型層側
でステムに固着ずることによって、高輝度の青色光が得
られる。
(e) Operation The device of the present invention uses a (0001) plane or a plane inclined from the (0001) plane as the crystal growth plane of the substrate, and an n-type polarizing electrode and a p-type ohmic electrode are attached to each silicon carbide surface. High-intensity blue light can be obtained by forming each light emitting diode element partially, making the light emitting diode element approximately trapezoidal in cross section so that the surface of the p-type layer has a large area, and fixing the p-type layer side to the stem.

くべ)実施例 第1図に本発明装置の一実施例を示す。図において、(
7)は発光ダイ才一ド素子を示し、斯る素子の構成とし
て、(1)はn型S + C(シリコンカパイド)から
なる基板、(2)及び〈3)は夫々基板(1〉の一主面
(18)上にエピタキシャル成長さ−7= れたn型SiC層及びp型S i CJiを示す。
1) Embodiment FIG. 1 shows an embodiment of the apparatus of the present invention. In the figure, (
7) shows a light emitting diode element, and the structure of such an element is as follows: (1) is a substrate made of n-type S+C (silicon capide), (2) and <3) are each a substrate (1). An n-type SiC layer and a p-type SiCJi are shown epitaxially grown on one principal surface (18) of the figure.

発光ダイ才一ド素子く7〉は50〜100ρの厚みを有
し、例えばn型SiC基板(1)表面を260−×26
0pm.  p型SiCffi(3)表面を300pm
 X 300plnとして、p型SiC層〈3)表面を
底辺、n型SiC基板(1)表面を上辺とする略断面台
形状をなしている。
The light emitting diode element 7〉 has a thickness of 50 to 100ρ, for example, the surface of the n-type SiC substrate (1) is 260×26
0pm. p-type SiCffi (3) surface at 300pm
X 300pln, the cross-section has a substantially trapezoidal shape with the surface of the p-type SiC layer (3) as the bottom and the surface of the n-type SiC substrate (1) as the top.

基板(1)は30〜80押の厚み、IXIO”cm−3
以上のキャリア濃度と、l60Ω印以下の比抵抗を有す
る。基板く1〉は一主面(1a)と他主面(1b)を有
するが、特に一生面<1a>としては、C(炭素)配列
が表面となる(0001)面又はSt(ケイ素)配列が
表面となる(0001)面を選び、その面を<o2o>
方向あるいは<1oTo>方向に傾斜させたものである
The substrate (1) has a thickness of 30 to 80 cm, IXIO"cm-3
It has a carrier concentration above and a specific resistance below the 160Ω mark. The substrate 1> has one main surface (1a) and the other main surface (1b), and in particular, the main surface <1a> is a (0001) plane with a C (carbon) arrangement on the surface or an St (silicon) arrangement. Select the (0001) plane where is the surface, and convert that plane to <o2o>
direction or <1oTo> direction.

基板の一生面(1a)における上記傾斜角は、1〜10
6、好ましくは3〜10″′、より好ましくは3〜76
であり、本実施例では5″′が採用されている。
The above inclination angle on the life surface (1a) of the substrate is 1 to 10
6, preferably 3-10'', more preferably 3-76
In this embodiment, 5'' is adopted.

第3図は基板(1)の一主面(la)における(000
丁)面からの傾斜角と、斯る基板(1)を用いて製造さ
れた発光ダイオード素子(7〉の通電エージング前後の
発光波長を示している。通電エージングは通電電流40
mA、通電時間50時間とした。また、ここで言う発光
波長とは、通常複数のピーク波長を有するSiC発光ダ
イオード素子の光を人間の視覚で感しる1つの色の光と
して波長に換算したものである。同図から明らかな如く
、傾斜角が0@のものは、傾斜許せたものに比べ、通電
エーンング前における発光波長が長波長側に位置してお
り、通電エーレング後の発光波長のシフト幅が大きくな
っている。これはいずれも基板(1)上に形成される成
長層に結晶欠陥が多く存在することに起因するものであ
る。また通電エーシングによる発光波長のシフト幅が、
基板(1)の傾斜角の増加に伴い減少していくことから
、基板く1)上(こ形成される成長層の結晶欠陥が減少
し、結晶性が向上していることがわかる。ここで、傾斜
角を5″′以上にした場合のシフト幅は、5゜の場合と
略同しであったので、区には省略してある。
Figure 3 shows (000
The graph shows the inclination angle from the surface (1) and the emission wavelength before and after current aging of the light emitting diode element (7) manufactured using such a substrate (1).
mA, and the current application time was 50 hours. Furthermore, the emission wavelength referred to here is the light emitted from a SiC light emitting diode element, which normally has a plurality of peak wavelengths, converted into a wavelength as light of one color perceived by human vision. As is clear from the figure, in the case where the tilt angle is 0 @, the emission wavelength before energization is located on the longer wavelength side compared to the case where the inclination is allowed, and the shift width of the emission wavelength after energization is large. It has become. This is all due to the presence of many crystal defects in the growth layer formed on the substrate (1). In addition, the shift width of the emission wavelength due to energization is
Since it decreases as the tilt angle of the substrate (1) increases, it can be seen that the crystal defects in the growth layer formed on the substrate (1) decrease and the crystallinity improves. The shift width when the inclination angle is 5'' or more is approximately the same as when it is 5 degrees, so it is omitted from the table.

この様に、傾斜角の選択は、その上にエビタキシャル成
長詐れるn型SiC層(2)の結晶性の向上及び発光ダ
イオード素子(7)の発光波長の長波長化を抑えるのに
極めて壱効である。
In this way, the selection of the tilt angle is extremely important for improving the crystallinity of the n-type SiC layer (2) on which epitaxial growth occurs and for suppressing the increase in the emission wavelength of the light emitting diode element (7). It is effective.

また本発明装置における結晶成長面は(0001)面よ
りも(000丁〉面からの傾斜面を用いるのがより好ま
しい。これは、(0001)面からの傾剥面上に形成さ
れた成長層の表面に比して、(0001)面からの傾斜
面上に形成された成長層の表面が波状に荒れること及び
、結晶成長面に(ooor>面からの傾斜面を用いて製
造された発光ダイ才一ド素子の通電工一シングによる発
光波長のシフトが、(0001)面からの傾斜面を用い
たものよりも小さくなることによる。
In addition, it is more preferable to use an inclined plane from the (000〉 plane) as the crystal growth plane in the apparatus of the present invention than the (0001) plane. Compared to the surface of This is because the shift in the emission wavelength due to energization of the die-cut element is smaller than that using an inclined plane from the (0001) plane.

n型SiCJi(2)は5〜10ρの膜厚を有し、その
キャリア濃度はI X 10”〜5 X 10”c+n
−’、好ましくは2 X 10” 〜3 X IQ’ 
”cm−’、より好ましくは5 X 10” 〜l X
 IQ”Om−’である。但し、n型StC層(2)の
キャリア濃度は、Nのみを添加した時のキャリアく電子
)濃度から、A!のみを添加した時のキャリア(正孔)
濃度を差し引いた値となる。
The n-type SiCJi (2) has a film thickness of 5 to 10ρ, and its carrier concentration is I x 10" to 5 x 10"c+n
-', preferably 2 X 10'' to 3 X IQ'
"cm-', more preferably 5 x 10" to l x
IQ"Om-'. However, the carrier concentration in the n-type StC layer (2) is from the carrier (electron) concentration when only N is added to the carrier (hole) concentration when only A! is added.
This is the value obtained by subtracting the concentration.

従って、n型SiC層く2)の−ヒ記キャリア濃度を得
るためには、Nの添加量とAlの添加量の種々組合せが
考えられるが、本発明におけるN及びAlの添加量は、
夫々単独で添加したときに得られるキャリア濃度に換算
して次の様に決定すればよい。
Therefore, in order to obtain the carrier concentration in the n-type SiC layer 2), various combinations of the amount of N added and the amount of Al added can be considered, but the amounts of N and Al added in the present invention are as follows:
The carrier concentration can be determined as follows by converting it into the carrier concentration obtained when each is added alone.

本実施例におい一〔1才、前述の如く、結晶成長面に(
000”’1)面又は(0001)面から傾斜した面を
用いることによって、この上に形成されるn型SiC層
(2〉の結晶性が向上ずる。したがって結晶性を損うこ
となく、従来よりも不純物を多く添加することができる
。その結果、発光中心となるドナー・アクセプタ対が増
加し、発光強度が高くなる。
In this example, one year old, as mentioned above, (
By using a plane inclined from the 000"'1) plane or the (0001) plane, the crystallinity of the n-type SiC layer (2> formed thereon) is improved. Therefore, the crystallinity of the n-type SiC layer (2>) formed thereon is improved. As a result, the number of donor-acceptor pairs serving as luminescence centers increases, and the luminescence intensity increases.

=11− 一12一 p型SiC層(3)は5〜10ρの膜厚を有し、そのキ
ャリア濃度はI X 10”〜5 X 10”cm−”
、好ましくは2 X 10” 〜3 X 10”cm−
”C’ある。
=11-1121 The p-type SiC layer (3) has a film thickness of 5 to 10 ρ, and its carrier concentration is I x 10" to 5 x 10"cm-"
, preferably 2 X 10" to 3 X 10" cm-
``C' is there.

(4)は、p型SjC層(3)表面の中心に配され、且
つp型SiC層〈3〉表面に対して部分的に設けられた
p型オーミック電極で、p型SiC層(3)側から見て
Ti膜、Al膜、Ti膜の積層構造からなり、7 X 
10”’ − 7 X IQ−’cTII”の面積を有
する。ここで斯るp型オーミック電極〈4)の電極面積
は通常使用する5〜50mAの電流において、緑色光の
混じらない良質な青色光を発生させるのに効果的である
。即ち、発生波長は発光M(本実施例装置ではn型Si
C層(2))の、発光に寄与する部分における電流密度
によって変化することが知られている。また本実施例装
置において、キャリア濃度がIXIO”〜5×1016
cm−”であるp型SiC層(3)は比抵抗が高く、p
型S{Ciil(3)内では電流はほとんど拡がらない
こと、及びn型SjC層(2)とp型オーミック電極(
4)の距離が短かいことから、n型SiC層(2)の発
光に寄与する部分を流れる電流密度は、p型SiC層(
3〉の大きさに関係せず、p型SiC層(3)内の電流
密度、即ち注入電流の大きさとp型オーミック電極(4
〉の面積によって決まる。本発明者らが注入電流と電極
面積を種々変えて実験した結果、電流5〜50mAの間
では電極面積を7X10−’cm”以下としたとき緑色
光の混しらない良質な青色光が得られた。しかし、電極
面積が7X10−’cm”よりも小さくなるとt流集中
が大きくなり、素子劣化が激しくなるため、素子の信顆
性が低下する。したがってp型オーミック電極(4)の
電極面積は、7 X 10−’ 〜7 X IQ−’c
m″が適当である。
(4) is a p-type ohmic electrode placed at the center of the surface of the p-type SJC layer (3) and partially provided on the surface of the p-type SiC layer (3); Viewed from the side, it consists of a laminated structure of a Ti film, an Al film, and a Ti film, and has a 7
It has an area of 10"' - 7 X IQ - 'cTII'. The electrode area of the p-type ohmic electrode (4) is effective in generating high-quality blue light without mixing with green light at a current of 5 to 50 mA that is normally used. That is, the generation wavelength is light emission M (in this example device, n-type Si
It is known that the current density changes depending on the current density in the portion of the C layer (2) that contributes to light emission. In addition, in the device of this embodiment, the carrier concentration is IXIO”~5×1016
cm-” p-type SiC layer (3) has a high resistivity and p
The current hardly spreads in the type S{Ciil (3), and the n-type SjC layer (2) and the p-type ohmic electrode (
4) is short, the current density flowing through the part of the n-type SiC layer (2) that contributes to light emission is lower than that of the p-type SiC layer (2).
3>, the current density in the p-type SiC layer (3), that is, the magnitude of the injection current and the p-type ohmic electrode (4)
It is determined by the area of As a result of experiments conducted by the present inventors with various injection currents and electrode areas, it was found that when the current was between 5 and 50 mA and the electrode area was 7 x 10 cm" or less, high-quality blue light without mixing with green light was obtained. However, when the electrode area is smaller than 7×10 cm, the concentration of t-current becomes large and the device deteriorates rapidly, resulting in a decrease in the reliability of the device. Therefore, the electrode area of the p-type ohmic electrode (4) is 7 x 10-' to 7 x IQ-'c
m'' is appropriate.

く5)はn型SiC基板く1)表面の中心からずれた位
置に配され、且つn型SiC基板(1)表面に対して部
分的に設けられたn型オーミック電極で、n型SiC基
板(1)側から見て、N i pJ ,Pd膜の積層構
造をなす。
(5) is an n-type ohmic electrode located at a position offset from the center of the n-type SiC substrate (1) surface and partially provided on the n-type SiC substrate (1) surface. (1) When viewed from the side, it has a laminated structure of N i pJ and Pd films.

(6)、〈6)は夫々p型オーミック電極(4)、n型
オーミック電極(5)上に設けられたボンディング電極
で、各オーミック電極からみて、Ti膜、Pd膜、Au
膜の積層構造をなす。
(6) and <6) are bonding electrodes provided on the p-type ohmic electrode (4) and the n-type ohmic electrode (5), respectively, and when viewed from each ohmic electrode, Ti film, Pd film, Au
Forms a layered structure of membranes.

(8)はA j2 1 0 M膜又はSiO,膜からな
る保護膜で、発光ダイオード素子(7)のn型SiC基
板(1)表面及び側面に被着される。(9)は銀ペース
ト、<10)は発光ダイ才一ド素子く7〉を載置する第
1ステムである。第1ステム(10〉は発光ダイオド素
子(7)を囲繞する反射部(11)を有する。発光ダイ
才一ド素子(7)は銀ペースト(9)を介してp型Si
C層(3)側で第1ステム(10)に固着される。
(8) is a protective film made of an A j2 10 M film or a SiO film, which is deposited on the surface and side surfaces of the n-type SiC substrate (1) of the light emitting diode element (7). (9) is a silver paste, and <10) is a first stem on which a light emitting diode element (7) is mounted. The first stem (10) has a reflective part (11) surrounding a light emitting diode element (7).
It is fixed to the first stem (10) on the C layer (3) side.

この様な素子配置は次の理由による。n型StC層(2
〉での発光領域がp型オーミック電極(4)と対応する
部分となるため、p型SiCJ!!(3)側を上にして
固着すると上に向かう光はp型オミック電極(4)によ
って遮ぎられ、素子上部から取り出せない。また、n型
SiC基板(1)の光透過率はp型SfC層(3)に比
して高い。更に、基板(1)の比抵抗は1Ω印以下と低
く、電流が流れ易いため、n型オーミック電極(5)を
基板(1)の他主面(1b)の隅に配置でき、放射光に
対し、実質的に遮蔽体とならない。さらに本発明装置で
は発光ダイオード素子く7)を、底面が広面積となる略
断面台形状としているので、n型SiC層(2)で発光
し、n型SiC基板(1)を通って素子側面に向う光は
、素子側面に対する入射角が大きくなるため、内部反射
が減少し、効率良く素子外部に取り出される。
The reason for this element arrangement is as follows. n-type StC layer (2
> is the part corresponding to the p-type ohmic electrode (4), so the p-type SiCJ! ! If it is fixed with the (3) side up, the light directed upward will be blocked by the p-type ohmic electrode (4) and cannot be extracted from the top of the element. Furthermore, the light transmittance of the n-type SiC substrate (1) is higher than that of the p-type SfC layer (3). Furthermore, the specific resistance of the substrate (1) is as low as 1Ω or less, and current flows easily, so the n-type ohmic electrode (5) can be placed at the corner of the other main surface (1b) of the substrate (1), which prevents radiation On the other hand, it does not substantially serve as a shield. Furthermore, in the device of the present invention, the light emitting diode element 7) has a substantially trapezoidal cross section with a wide bottom surface, so light is emitted from the n-type SiC layer (2) and passes through the n-type SiC substrate (1) to the side surface of the element. Since the incident angle with respect to the side surface of the element becomes large, the light directed toward the element reduces internal reflection and is efficiently extracted to the outside of the element.

(12)は金ワイヤ、(13)は第2ステムで、第2ス
テム<13)は金ワイヤ(12)を介して、n型オーミ
ック電極(5)上のポンティング電極(6)に電気的に
接続きれる。(14)は発光ダイオード素子(7)及び
第1、第2ステム(10)、ク13)の一部を覆う、エ
ボキシ樹脂系の透明樹脂モールドである。
(12) is a gold wire, (13) is a second stem, and the second stem <13) is electrically connected to the terminal electrode (6) on the n-type ohmic electrode (5) via the gold wire (12). I can connect to. (14) is an epoxy resin-based transparent resin mold that covers part of the light emitting diode element (7), the first and second stems (10), and the stems (13).

次に、本実施例装置の製造方法の一例を第2図を参照し
て説明する。
Next, an example of a method for manufacturing the device of this embodiment will be explained with reference to FIG.

第2図(a)は第1工程を示し、(000丁)面又は(
0001 )面を有する、厚さ350 〜500smの
n型SiC基板(1)を準備する。そして斯るSjC基
板(1)の(000丁)面又は(0001)面を〈11
芝0〉方向あるいは<10工0〉方向に研磨し、1〜1
0゜傾斜させる。しかる=15− −16= 後、斯る傾斜面を、その研磨損傷除去のために400 
〜500’C (7) K O H融液b ルイ41:
1500 〜1800’C t7)H,雰囲気でエッチ
ング処理する。得られた傾斜面は基板(1)の一生面(
1a)となる。
Figure 2(a) shows the first step, and shows the (000th) plane or (
An n-type SiC substrate (1) with a thickness of 350 to 500 sm is prepared. Then, the (000 plane) or (0001) plane of such SjC substrate (1) is
Polish in the grass 0> direction or <10 work 0> direction, 1 to 1
Tilt 0°. =15--16= After that, the inclined surface was polished for 400 minutes to remove the polishing damage.
~500'C (7) KOH melt b Louis 41:
Etching treatment at 1500 to 1800'C t7) H atmosphere. The obtained inclined surface is the whole surface of the substrate (1) (
1a).

第2図<b>は第2工程を示し、上記一生面(1a)上
に第4図に示す装置を用い、各層の成長温度を1500
〜1800℃好ましくは1650〜1800℃、例えば
1700℃でn型SiCJ!t(2)、p型SiC層(
3)を順次液相エビタキシャル成長する。この時、n型
SiC層(2)やp型SiC層(3》を成長する際にS
i融液(17〉中に添加される不純物の量は記述のキャ
リア濃度を得るべく決定される。例えばn型SiC層〈
2)のキャリア濃度IXIO”〜5 X 10’ ”c
m−” ヲ得ルニハ、StsNaを1.3X10−”〜
3. OX 10−”wt%、Alを0. 2−12.
 Oat.%夫々添加すればよい。またp型SjC層(
3)のキャリア濃度1×1017〜5×101″On−
’を得るには、Alを045〜20. Oat.%添加
すればよい。
FIG. 2<b> shows the second step, using the apparatus shown in FIG.
n-type SiCJ at ~1800°C, preferably 1650-1800°C, for example 1700°C! t(2), p-type SiC layer (
3) are sequentially grown by liquid phase epitaxial growth. At this time, when growing the n-type SiC layer (2) and the p-type SiC layer (3),
The amount of impurities added into the i-melt (17) is determined to obtain the carrier concentration described. For example, in an n-type SiC layer
2) Carrier concentration IXIO”~5×10’”c
m-” 1.3X10-”~
3. OX 10-”wt%, Al 0.2-12.
Oat. % may be added respectively. In addition, p-type SjC layer (
3) Carrier concentration 1×1017 to 5×101″On-
'To obtain Al, 045-20. Oat. % may be added.

各層を成長した後、n型SiC基板(1)の他主面を研
磨して、積層基板全体の厚さを50〜ioomにする。
After growing each layer, the other main surface of the n-type SiC substrate (1) is polished to make the thickness of the entire laminated substrate 50 to ioom.

第2図(e)は第3工程を示し、p型SfC層(3)上
に膜厚300人以上、例えば膜厚500人のTi膜、膜
厚5000人のA!膜、膜厚4000人のTi膜をこの
順に真空蒸着してp型オーミック電極く4)を形成し、
n型SiC基板(1)の他主面(1b)上に膜厚300
0人のNi膜、膜厚5000人のPd膜をこの順に真空
蒸着してn型オーミック電極(5)を形成する。ここで
、p型オーミック電極(4)は斯る積層基板を将来素子
毎に分離した時(図中破線で示す〉、素子の中心に7 
X ’J−0−” 〜7 X 10−’c′m ”の面
積を持って配されるよう、メタルマスクを用いて各素子
のp型SiC層(3)表面に対して部分的に形成される
。またn型オーミック電ai(5 )は素子の中心から
ずれるように配され、各素子のn型SiC基板(1)表
面に対して部分的に形成される。
FIG. 2(e) shows the third step, in which a Ti film with a thickness of 300 or more, for example, a Ti film with a thickness of 500 and an A! A Ti film with a thickness of 4,000 yen was vacuum deposited in this order to form a p-type ohmic electrode (4).
A film with a thickness of 300 mm is formed on the other main surface (1b) of the n-type SiC substrate (1).
A Ni film with a thickness of 0 and a Pd film with a thickness of 5000 are vacuum deposited in this order to form an n-type ohmic electrode (5). Here, the p-type ohmic electrode (4) will be located at 7 in the center of the device when the multilayer substrate is separated into devices in the future (indicated by the broken line in the figure).
Using a metal mask, partially form on the surface of the p-type SiC layer (3) of each element so that it has an area of be done. Further, the n-type ohmic electrode ai (5) is arranged so as to be offset from the center of the element, and is partially formed on the surface of the n-type SiC substrate (1) of each element.

しかる後、斯る積層基板に真空中又はAr、Ha.Nt
、Heいずれかあるいはこれらの混合雰囲気中で900
〜1000℃の熱郊理を施す。これにより、各オーミッ
ク1t極はSiCとオーミック性を得る。
Thereafter, such a laminated substrate is exposed to vacuum or Ar, Ha. Nt
, He or a mixed atmosphere of 900
Apply heat treatment at ~1000°C. As a result, each ohmic 1t pole obtains ohmic properties with SiC.

第2図(d)は第4工程を示し、p型オーミック電極(
4)上及びn型オーミック電極く5〉上に、膜厚100
0人のTi膜、膜厚2000人のPd膜、膜厚5000
人のAu膜をこの順に真空蒸着して、ボンディング電極
(6)(6)を夫々形成する。
FIG. 2(d) shows the fourth step, in which the p-type ohmic electrode (
4) On top and n-type ohmic electrode 5〉, film thickness 100
Ti film of 0 people, Pd film of 2000 people, thickness 5000
The Au films are vacuum-deposited in this order to form bonding electrodes (6) and (6), respectively.

しかる後、斯る積層基板に真空中又はAr、H2、N,
、Heのいずれかあるいはこれらの混合雰囲気中で30
0〜500℃の熱処理を施す。
After that, the laminated substrate is coated with Ar, H2, N,
, He or a mixed atmosphere of 30
Heat treatment is performed at 0 to 500°C.

第2図(e)は第5工程を示し、斯る積層基板のn型S
iC基板(1)側に、深さ20〜70−の素子分離用の
溝(15)(15)・・・をダイシング形成する。この
時、溝(15)(15)・・・は楔状に形成されるため
、将来分離された各素子はp型SiC層(3)表面を底
辺とし、n型SiC基板(1〉を上辺とする略断面台形
状となる。
FIG. 2(e) shows the fifth step, in which the n-type S
Grooves (15), (15), etc. for element isolation having a depth of 20 to 70 − are formed by dicing on the iC substrate (1) side. At this time, the grooves (15) (15)... are formed in a wedge shape, so each element separated in the future will have the surface of the p-type SiC layer (3) as the bottom and the n-type SiC substrate (1> as the top). The cross section is approximately trapezoidal.

第2図(f)は第6工程を示し、溝(15)(15)・
・・が形成された積層基板を溝(15)<15)・・・
に沿って機械的に分離し、各発光ダイ才一ド素子(7〉
を得る。
FIG. 2(f) shows the sixth step, where grooves (15) (15)
Groove (15)<15)... is formed on the laminated substrate with...
Mechanically separate each light emitting diode element (7〉
get.

そして、各発光ダイオード素子(7)を有機洗浄した後
、n型SiC基板(1)をソース側にして、Arスパッ
タリングにより、発光ダイオード素子〈7)のn型Si
C基板(1)側表面及び側面にAl10.あるいはSi
n2膜からなる保護膜(8)を被着ずる。
After each light-emitting diode element (7) is organically cleaned, the n-type SiC substrate (1) of the light-emitting diode element (7) is cleaned by Ar sputtering with the n-type SiC substrate (1) on the source side.
Al10. Or Si
A protective film (8) consisting of an n2 film is deposited.

第2図(g)は最終工程を示し、発光ダイオード素子(
7〉のp型SiC層(3)側を第1ステム(10〉に、
銀ペースト(9)を介して載置し、これを130〜17
0℃で熱処理する。次いでn型SiC基板(1)側のボ
ンディング電極(6)と第2ステム(13)を金ワイヤ
(12)でワイヤポンドする。この時、n型SiC基板
(1)側のボンデイング電極(6)上には、保護膜く8
)が被着されているが、その膜厚が2000人程度以下
であれば金ワイヤ(12〉はワイヤボンドによって保護
膜(8)を突き破り、ボンデイング電極(6)に接統さ
れる。また保護膜(8〉の膜厚が厚く、ワイヤポンドに
よって突き破れない場合はワイヤボンド前に予め、ポン
デイング電極く6〉上の保護膜(8)を機械的に除去し
てやればよい。
Figure 2(g) shows the final process, in which the light emitting diode element (
7〉 p-type SiC layer (3) side to the first stem (10〉),
Place it through silver paste (9) and apply it to 130-17
Heat treatment at 0°C. Next, the bonding electrode (6) and the second stem (13) on the side of the n-type SiC substrate (1) are wire bonded with a gold wire (12). At this time, a protective film 8 is placed on the bonding electrode (6) on the n-type SiC substrate (1) side.
), but if the film thickness is less than about 2000, the gold wire (12) will break through the protective film (8) by wire bonding and be connected to the bonding electrode (6). If the film (8) is too thick to be pierced by the wire bonding, the protective film (8) on the pounding electrode 6> may be mechanically removed before wire bonding.

最後に、発光ダイオード素子(7)及び第1、第2ステ
ム(10)、(13〉の一部を図示していないエボキシ
樹脂系の透明樹脂モールド(14)で覆うことによって
第1図に示すSiC発光ダイオード装置が完成する。
Finally, a part of the light emitting diode element (7) and the first and second stems (10) and (13) are covered with an epoxy resin transparent resin mold (14) not shown, as shown in FIG. The SiC light emitting diode device is completed.

以上の製造方法に従って、キャリア濃度が8×101フ
CTI1−”のn型SiC基板(1)を用い、その結晶
成長面を(000丁)面から<ti2o>方向に5゜傾
斜した面として、次に示す条件で各層を形成し、SIC
発光ダイオード装置を製造した。
According to the above manufacturing method, an n-type SiC substrate (1) with a carrier concentration of 8 x 101F CTI1-'' is used, and its crystal growth plane is set to be a plane inclined by 5 degrees in the <ti2o> direction from the (000 plane) plane. Each layer was formed under the following conditions, and the SIC
A light emitting diode device was manufactured.

また、p型オーミック電極(4)の面積は4X10−’
cITl2とした。
Also, the area of the p-type ohmic electrode (4) is 4X10-'
It was designated as cITl2.

これにより製造されたSiC発光ダイオード装置の発光
波長は4B2nmであり、発光強度は、駆動電流が20
mAのとき10〜1 2mcdであった。
The emission wavelength of the SiC light emitting diode device manufactured in this way is 4B2 nm, and the emission intensity is 20 nm when the driving current is 20 nm.
It was 10-12 mcd at mA.

(ト)  発明の効果 本発明装置によれば、基板の結晶成長面に、(000丁
〉面又は<0001)面から傾斜した面を用いることに
よって、結晶性に優れたn型SiC層が形成できるので
、結晶性を損うことなく不純物を多く添加することがで
きる。その結果、発光中心となるドナー・アクセプタ対
が増加し発光強度が高くなる。さらに、n型オーミツク
電極及びp型才ミック電極を、各SiC表面に対して部
分的に形成し、発光ダイオード素子を、p型SiC層表
面を底辺とし、n型SiC基板表面を上辺とする略断面
台形状とすると共にp型SiC層側でステムに固着する
ことによって、効率良く外部に光を取り出すことができ
る。
(g) Effects of the Invention According to the apparatus of the present invention, an n-type SiC layer with excellent crystallinity can be formed by using a plane inclined from the (000 plane> plane or <0001) plane as the crystal growth plane of the substrate. Therefore, a large amount of impurities can be added without impairing crystallinity. As a result, the number of donor-acceptor pairs serving as luminescence centers increases, and the luminescence intensity increases. Further, an n-type ohmic electrode and a p-type ohmic electrode are partially formed on each SiC surface, and a light emitting diode element is formed with the p-type SiC layer surface as the bottom side and the n-type SiC substrate surface as the top side. By making it trapezoidal in cross section and fixing it to the stem on the p-type SiC layer side, light can be efficiently extracted to the outside.

以上より本発明装置では、駆動電流20m Aにおける
発光強度を10〜1 2mcdと高くすることができ、
きらにその光を緑色光の混じらない良質の青色光とする
ことができる。また、本発明によれば、通電エージング
による発光波長の長波長ジフト幅が小さく、且つ高輝度
の青色光が得られる。
As described above, in the device of the present invention, the emission intensity can be increased to 10 to 12 mcd at a driving current of 20 mA,
It is possible to turn that light into high-quality blue light without any green light mixed in. Further, according to the present invention, high-intensity blue light with a small long-wavelength shift width of the emission wavelength due to current aging can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明装置の一実施例を示す断面図、第2図は
本発明装置の製造方法の−例を示す工郡別断面図、第3
図は基板の傾斜角と発光ダイオド素子の通電エージング
前後の発光波長を示す特性図、第4図は本発明装置の製
造に用いた結晶成長装置の断面図である。
FIG. 1 is a sectional view showing one embodiment of the device of the present invention, FIG. 2 is a sectional view showing an example of the manufacturing method of the device of the present invention, and FIG.
The figure is a characteristic diagram showing the tilt angle of the substrate and the emission wavelength of the light emitting diode element before and after energization aging, and FIG. 4 is a cross-sectional view of the crystal growth apparatus used for manufacturing the apparatus of the present invention.

Claims (4)

【特許請求の範囲】[Claims] (1)n型炭化ケイ素基板の一主面上に炭化ケイ素から
なるn型層及びp型層がこの順序で積層され、上記n型
基板の他主面上及び上記p型層上に夫々n型オーミック
電極及びp型オーミック電極が形成された炭化ケイ素発
光ダイオード素子と、当該発光ダイオード素子を載置固
着するステムと、を備えた炭化ケイ素発光ダイオード装
置において、上記n型基板の結晶成長面には(000@
1@)面又は(0001)面から傾斜した面が用いられ
ており、上記n型オーミック電極及びp型オーミック電
極は、各炭化ケイ素表面に対して部分的に形成されてお
り、上記発光ダイオード素子は上記p型層表面を底辺と
し、上記n型基板の他主面を上辺とする略断面台形状を
成していると共に、当該p型層側で上記ステムに固着さ
れていることを特徴とする炭化ケイ素発光ダイオード装
置。
(1) An n-type layer and a p-type layer made of silicon carbide are laminated in this order on one main surface of an n-type silicon carbide substrate, and an n-type layer and a p-type layer are respectively stacked on the other main surface of the n-type substrate and on the p-type layer. In a silicon carbide light emitting diode device comprising a silicon carbide light emitting diode element on which a type ohmic electrode and a p type ohmic electrode are formed, and a stem for mounting and fixing the light emitting diode element, the crystal growth surface of the n type substrate is Ha(000@
1@) plane or a plane inclined from the (0001) plane, the n-type ohmic electrode and the p-type ohmic electrode are formed partially on each silicon carbide surface, and the light emitting diode element has a substantially trapezoidal cross section with the surface of the p-type layer as the base and the other main surface of the n-type substrate as the top, and is fixed to the stem on the p-type layer side. silicon carbide light emitting diode device.
(2)上記n型基板の結晶成長面には(000@1@)
面から傾斜した面が用いられることを特徴とする請求項
1記載の炭化ケイ素発光ダイオード装置。
(2) On the crystal growth surface of the above n-type substrate (000@1@)
2. The silicon carbide light emitting diode device according to claim 1, wherein a surface inclined from the surface is used.
(3)上記n型基板は1.0Ωcm以下の比抵抗を有す
ると共に、上記n型オーミック電極は上記n型基板の他
主面の隅に配されていることを特徴とする請求項1記載
の炭化ケイ素発光ダイオード装置。
(3) The n-type substrate has a specific resistance of 1.0 Ωcm or less, and the n-type ohmic electrode is arranged at a corner of the other main surface of the n-type substrate. Silicon carbide light emitting diode device.
(4)グラファイトからなるるつぼ内のケイ素融液中に
AlおよびNを添加し、該融液中に炭化ケイ素単結晶基
板を浸漬して、前記基板上に炭化ケイ素単結晶からなる
n型層を液相エピタキシャル成長させる炭化ケイ素単結
晶の製造方法において、前記ケイ素融液中に添加するA
lの添加量を、ケイ素融液中にAlのみを添加したとき
得られる炭化ケイ素単結晶のキャリア濃度が5.5×1
0^1^6〜6×10^1^7cm^−^3となる範囲
に設定すると共に、前記ケイ素融液中に添加するNの添
加量を、ケイ素融液中にNのみを添加したとき得られる
炭化ケイ素単結晶のキャリア濃度が7×10^1^7〜
5×10^1^8cm^−^3となる範囲に設定し、且
つ成長温度を1650〜1800℃とすることを特徴と
する炭化ケイ素単結晶の製造方法。
(4) Al and N are added to a silicon melt in a crucible made of graphite, a silicon carbide single crystal substrate is immersed in the melt, and an n-type layer made of silicon carbide single crystal is formed on the substrate. In the method for producing a silicon carbide single crystal grown by liquid phase epitaxial growth, A added to the silicon melt
The carrier concentration of the silicon carbide single crystal obtained when only Al is added to the silicon melt is 5.5 × 1.
When only N is added to the silicon melt, the amount of N added to the silicon melt is set to a range of 0^1^6 to 6 x 10^1^7 cm^-^3. The carrier concentration of the silicon carbide single crystal obtained is 7×10^1^7 ~
A method for producing a silicon carbide single crystal, characterized in that the growth temperature is set in a range of 5 x 10^1^8 cm^-^3 and the growth temperature is set at 1650 to 1800°C.
JP5230289A 1988-05-18 1989-03-03 Silicon carbide light emitting diode device and method for manufacturing silicon carbide single crystal Expired - Fee Related JPH06103751B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP5230289A JPH06103751B2 (en) 1988-05-18 1989-03-03 Silicon carbide light emitting diode device and method for manufacturing silicon carbide single crystal
US07/616,768 US5187547A (en) 1988-05-18 1990-11-19 Light emitting diode device and method for producing same

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
JP12105288 1988-05-18
JP1571189 1989-01-25
JP63-121052 1989-02-14
JP1-34282 1989-02-14
JP3428289 1989-02-14
JP1-15711 1989-02-14
JP5230289A JPH06103751B2 (en) 1988-05-18 1989-03-03 Silicon carbide light emitting diode device and method for manufacturing silicon carbide single crystal

Publications (2)

Publication Number Publication Date
JPH02290084A true JPH02290084A (en) 1990-11-29
JPH06103751B2 JPH06103751B2 (en) 1994-12-14

Family

ID=27456430

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5230289A Expired - Fee Related JPH06103751B2 (en) 1988-05-18 1989-03-03 Silicon carbide light emitting diode device and method for manufacturing silicon carbide single crystal

Country Status (1)

Country Link
JP (1) JPH06103751B2 (en)

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5313078A (en) * 1991-12-04 1994-05-17 Sharp Kabushiki Kaisha Multi-layer silicon carbide light emitting diode having a PN junction
US5432357A (en) * 1992-04-16 1995-07-11 Kabushiki Kaisha Kobe Seiko Sho Diamond film electronic devices
US5958132A (en) * 1991-04-18 1999-09-28 Nippon Steel Corporation SiC single crystal and method for growth thereof
US6169294B1 (en) 1998-09-08 2001-01-02 Epistar Co. Inverted light emitting diode
JP2004221619A (en) * 2004-04-30 2004-08-05 Sanken Electric Co Ltd Semiconductor light emitting device
JP2004221620A (en) * 2004-04-30 2004-08-05 Sanken Electric Co Ltd Semiconductor light emitting device
JP2004221621A (en) * 2004-04-30 2004-08-05 Sanken Electric Co Ltd Manufacturing method of semiconductor light emitting device
JP2004235668A (en) * 2004-04-30 2004-08-19 Sanken Electric Co Ltd Semiconductor light emitting device
JP2004235669A (en) * 2004-04-30 2004-08-19 Sanken Electric Co Ltd Semiconductor light emitting device
WO2004112154A1 (en) * 2003-06-13 2004-12-23 Rohm Co., Ltd. Process for producing light-emitting diode element emitting white light
JP2006510232A (en) * 2002-07-19 2006-03-23 クリー インコーポレイテッド Trench cut type light emitting diode and method of manufacturing the same
WO2007102534A1 (en) * 2006-03-08 2007-09-13 Rohm Co., Ltd. Chip type semiconductor light emitting element
JP2009177212A (en) * 2009-05-11 2009-08-06 Sanyo Electric Co Ltd Light emitting element and method for manufacturing the same
EP1451853A4 (en) * 2001-10-26 2010-01-27 Lg Electronics Inc Diode having vertical structure and method of manufacturing the same
KR101015194B1 (en) * 2005-07-08 2011-02-18 루미테크 프로둑션 운트 엔트빅룽 게엠베하 Optoelectronic Component Including Adhesive

Cited By (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5958132A (en) * 1991-04-18 1999-09-28 Nippon Steel Corporation SiC single crystal and method for growth thereof
US5313078A (en) * 1991-12-04 1994-05-17 Sharp Kabushiki Kaisha Multi-layer silicon carbide light emitting diode having a PN junction
US5432357A (en) * 1992-04-16 1995-07-11 Kabushiki Kaisha Kobe Seiko Sho Diamond film electronic devices
US6169294B1 (en) 1998-09-08 2001-01-02 Epistar Co. Inverted light emitting diode
US9620677B2 (en) 2001-10-26 2017-04-11 Lg Innotek Co., Ltd. Diode having vertical structure
US10032959B2 (en) 2001-10-26 2018-07-24 Lg Innotek Co., Ltd. Diode having vertical structure
EP1451853A4 (en) * 2001-10-26 2010-01-27 Lg Electronics Inc Diode having vertical structure and method of manufacturing the same
US9000468B2 (en) 2001-10-26 2015-04-07 Lg Innotek Co., Ltd. Diode having vertical structure
US8592846B2 (en) 2001-10-26 2013-11-26 Lg Electronics Inc. Diode having vertical structure and method of manufacturing the same
EP2528112A1 (en) * 2001-10-26 2012-11-28 LG Electronics, Inc. Diode having vertical structure and method of manufacturing the same
US8008681B2 (en) 2001-10-26 2011-08-30 Lg Electronics Inc. Diode having vertical structure and method of manufacturing the same
US10326055B2 (en) 2001-10-26 2019-06-18 Lg Innotek Co., Ltd. Diode having vertical structure
JP2006510232A (en) * 2002-07-19 2006-03-23 クリー インコーポレイテッド Trench cut type light emitting diode and method of manufacturing the same
CN100411203C (en) * 2003-06-13 2008-08-13 罗姆股份有限公司 Method for manufacturing white-emitting light-emitting diode elements
US7759145B2 (en) 2003-06-13 2010-07-20 Rohm Co., Ltd. Process for producing light-emitting diode element emitting white light
WO2004112154A1 (en) * 2003-06-13 2004-12-23 Rohm Co., Ltd. Process for producing light-emitting diode element emitting white light
JP2004235669A (en) * 2004-04-30 2004-08-19 Sanken Electric Co Ltd Semiconductor light emitting device
JP2004235668A (en) * 2004-04-30 2004-08-19 Sanken Electric Co Ltd Semiconductor light emitting device
JP2004221621A (en) * 2004-04-30 2004-08-05 Sanken Electric Co Ltd Manufacturing method of semiconductor light emitting device
JP2004221620A (en) * 2004-04-30 2004-08-05 Sanken Electric Co Ltd Semiconductor light emitting device
JP2004221619A (en) * 2004-04-30 2004-08-05 Sanken Electric Co Ltd Semiconductor light emitting device
KR101015194B1 (en) * 2005-07-08 2011-02-18 루미테크 프로둑션 운트 엔트빅룽 게엠베하 Optoelectronic Component Including Adhesive
WO2007102534A1 (en) * 2006-03-08 2007-09-13 Rohm Co., Ltd. Chip type semiconductor light emitting element
JP2009177212A (en) * 2009-05-11 2009-08-06 Sanyo Electric Co Ltd Light emitting element and method for manufacturing the same

Also Published As

Publication number Publication date
JPH06103751B2 (en) 1994-12-14

Similar Documents

Publication Publication Date Title
US5187547A (en) Light emitting diode device and method for producing same
US7112456B2 (en) Vertical GaN light emitting diode and method for manufacturing the same
KR100880631B1 (en) Vertical device using metal support film and manufacturing method thereof
JPH02290084A (en) Silicon carbide light emitting diode device and manufacture of silicon carbide single crystal
EP1936704B1 (en) Semiconductor light emitting device package
US7420217B2 (en) Thin film LED
TWI278995B (en) Nitride semiconductor element with a supporting substrate and a method for producing a nitride semiconductor element
US9281454B2 (en) Thin film light emitting diode
JP4309106B2 (en) InGaN-based compound semiconductor light emitting device manufacturing method
TW200903856A (en) Semiconductor light emitting device and method
JP3476611B2 (en) Multicolor light emitting device and display device using the same
TW200527722A (en) Semiconductor light emitting device, lighting module, lighting apparatus, display element, and manufacturing method for semiconductor light emitting device
TWI284431B (en) Thin gallium nitride light emitting diode device
CN101373809A (en) LED components
JP2013526073A (en) Light emitting device grown on wavelength conversion substrate
TWI287880B (en) Group III nitride semiconductor light-emitting device and method of producing the same
TW200826322A (en) LED and manufacture method thereof
JP4843235B2 (en) Group III nitride semiconductor light emitting device manufacturing method
TW200418211A (en) Light-emitting diode and its manufacturing method
KR100774198B1 (en) Vertical light emitting device
WO2005088738A1 (en) Group iii nitride semiconductor light-emitting device, forming method thereof, lamp and light source using same
JP4313478B2 (en) AlGaInP light emitting diode
JP2958209B2 (en) pn junction type semiconductor light emitting device
TWI281757B (en) Group III nitride semiconductor light-emitting device and producing method thereof
JP7483197B2 (en) Light emitting device and method for manufacturing the same

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees