JPH0319754B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a solid-state image sensing device composed of bipolar transistors.

[Prior art]

A conventional solid-state image sensing device is shown in FIG. 1a. FIGS. 1b to 1e are explanatory diagrams showing various states of FIG. 1a.

In Figure 1, T is an NPN bipolar transistor (hereinafter simply referred to as a transistor), R
is a resistor, C _BC is a junction capacitance between the base and collector of the transistor T, S is a switch, 1 is a ground terminal, 4 is an output terminal, 5 is a power supply terminal, and 7 and 8 are terminals representing connection points.

Next, the operation will be explained.

As an initial state, the switch S in FIG.
Consider a steady state in which the power supply is connected to the power supply terminal 5 as shown in FIG. 1b. Since no current flows through the resistor R, the potential of the output terminal 4 is 0 [V], and the potential of the terminal 7 is the forward base of the transistor T.
It becomes the emitter voltage (hereinafter referred to as V _BE ). On the other hand, terminal 8 becomes the power supply voltage V _CC . Therefore, a voltage equal to V _CC −V _BE is applied to the junction capacitance C _BC , and
The amount of charge equal to C _BC × (V _CC − V _BE ) can be stored.

Next, as shown in _FIG .
The potential of is −V _CC +V _BE .

Next, when the transistor T is irradiated with light in the state shown in FIG. 1c, it becomes the state shown in FIG. 1d, and the amount of charge stored in the junction capacitance C _BC is released. If this amount of released charge is ΔQ, then
The amount of charge present in the junction capacitance C _BC after irradiation is C _BC (V _CC
−V _BE )−ΔQ.

Therefore, the voltage across the junction capacitance C _BC is (V _CC −
V _BE −ΔQ/C _BC ), and the potential of terminal 7 is −
(V _CC −V _BE −ΔQ/C _BC ).

Next, as shown in Figure 1e, when switch S is connected to power supply terminal 5 again, the potential at terminals 7 and 8 increases by the power supply voltage V _CC , so the potential at terminal 7 becomes V _BE +ΔQ/C _BE and output terminal 4 has ΔQ/
C _BE voltage only appears.

Since the conventional solid-state image sensor is configured as described above, the output terminal 4 is outputted as an emitter follower, so the voltage gain is 1, and there is a drawback that no improvement in sensitivity can be expected. Furthermore, in the state shown in Figure 1e, the current flowing through the terminal 8 is amplified;
When using current output, there are drawbacks such as the complexity of external signal processing.

[Summary of the invention]

The present invention was made to eliminate the drawbacks of the conventional devices as described above, and provides a solid-state imaging device that can extract an amplified voltage signal by differentially amplifying the voltage generated by an optical signal. It is something. Hereinafter, the drawings of this invention will be explained.

[Embodiments of the invention]

FIG. 2a is a circuit diagram showing one embodiment of the present invention, and FIGS. 2b to 2e are circuit paths for explaining various states of FIG. 2a.

In FIG. 2, T ₁ , T ₂ , and T ₃ are NPN bipolar transistors (hereinafter referred to as first, second, and third transistors), R ₁ and R ₂ are first and second resistors, and S ₁ and S ₂ are the first and second switches,
C _BC is the base-collector junction capacitance of the first transistor _T1 . In addition, 1 is a ground terminal, 2,
3 is an input terminal, 4 is an output terminal, 5 is a power supply terminal,
6, 7, and 8 are terminals indicating connection points, the input terminal 3 receives the first reference voltage V _ref1 , and one terminal of the second switch S ₂ receives the second reference voltage V _ref2.
is applied.

Next, the operation will be explained.

In Figure 2a, if the first switch _S1 is closed and the power supply terminal 5 is connected, and the second switch _S2 is open, no current flows and the terminal 6 is closed, as shown in Figure 2b. , the potential of the input terminal 3 and the potential of the terminal 7 both become equal to the first reference voltage V _ref1 . Therefore, the voltage across junction capacitance C _BC is
V _CC −V _ref1 , and the amount of charge stored is C _BC (V _CC
−V _ref1 ).

Next, in Fig. 2a, if the first switch _S1 is grounded, the circuit shown in Fig. 2c is formed, and the potential of terminal 7 is -C _BC /C _BC +C _BE V _CC +V _ref1 . Become.

Here, C _BE is the base-emitter junction capacitance of the first transistor _T1 .

Next, when light is irradiated to the first transistor _T1 with the first switch _S1 grounded, the state shown in Figure 2d is created, and the amount of charge stored in the junction capacitance C _BC is released. be done. If the amount of charge released is ΔQ, the amount of charge existing in the junction capacitance C _BC after irradiation is C _BC (C _BC /C _BC +C _BE V _CC −V _ref1 )−ΔQ. Therefore, the voltage across junction capacitance C _BC is
C _BC /C _BC +C _BE V _CC- V _ref1 -ΔQ/C _BC , and the potential at terminal 7 becomes -C _BC /C _BC +C _BE V _CC+ V _ref1 -ΔQ/C _BC .

Next, in FIG. 2a, when the second switch S ₂ is closed and connected to the second reference voltage V _ref2 , the first resistor R 1 and the second resistor R ₁ are connected as shown in FIG. 2e. Current flows through transistor _T2 . If this current is _I2 , the potential of the terminal 7 is lower than the potential of the terminal 6, so no current flows through the first transistor _T1 . Therefore, output terminal 4 has V _CC −R ₁ ×
The potential of I ₂ appears.

Next, from the state shown in Fig. 2 e, the first switch S ₁
When connected to power supply terminal 5, the potential of terminal 7 is
C _BC /C _BC +C _BE V _CC +V _ref1 +ΔQ/C _BC , which is higher than the potential of input terminal 3. Therefore, current also flows through the first transistor _T1 , and conversely, the current flowing through the second transistor _T2 decreases. If the current change at this time is ΔI ₂ , the potential of output terminal 4 is V _CC
−R ₁ (I ₂ −ΔI ₂ ).

Therefore, a voltage change of R ₁ ×ΔI ₂ will appear at the output terminal 4. Since this ΔI ₂ is current amplified by the amplification factor h _fe of the second transistor T ₂ , the voltage change is much larger than in the conventional method.

Further, by increasing the size of the first resistor _R1 , it is possible to further increase the voltage change.

Figure 3 shows a combination of two or more circuits in Figure 2.
This is an example of an application of an image sensor configured as a dimensional array. In this example, transistors T ₁ , T ₂ , T ₃ , first and second resistors R ₁ , R ₂ , and first and second reference voltages V _ref1 and V _ref2 are provided for each column.

Further, in the above embodiment, the second transistor
Although the collector of T ₂ is set as the output terminal 4, since the first resistor R ₁ is large, the driving ability may be reduced. If this driving ability decreases, as another embodiment, as shown in FIG. 4, the output may be amplified by using a fourth transistor _T4 as an emitter follower.

Further, although S ₁ and S ₂ are used as first and second switches, they can also be replaced with MOS transistors or bipolar transistors.

〔Effect of the invention〕

As explained above, the present invention provides a solid-state imaging device consisting of three bipolar transistors, two resistors, and two switches, in which the emitter of the first transistor is connected to the emitter of the second transistor and the emitter of the third transistor. , the collector of the first transistor is connected to a first switch that can be switched to a power supply or ground, a first reference voltage is applied to the base of the second transistor, and the second transistor is connected to a first reference voltage. The collector of the transistor is connected to the power supply terminal via the first resistor, and the emitter of the third transistor is connected to the second
The base of the third transistor is connected to the second reference voltage via the second switch, and the output is taken out from the collector of the second transistor. The converted signal is differentially amplified, and the output is an amplified voltage signal. Therefore, since there is no need for amplification outside the solid-state image sensor, there is an advantage that no peripheral circuits for amplification, current-voltage converters, etc. are required.

[Brief explanation of the drawing]

Figure 1a is a circuit diagram of a conventional solid-state image sensor;
Figures b to e are circuit diagrams explaining various states of Figure 1a, Figure 2a is a circuit diagram of an embodiment of the present invention, and Figures 2b to e are circuit diagrams explaining various states of Figure 2a. FIG. 3 is a circuit diagram of an image sensor in which a plurality of the circuits shown in FIG. 2 are combined, and FIG. 4 is a circuit diagram of a solid-state image sensor according to another embodiment of the present invention. In the figure, T ₁ , T ₂ , T ₃ , and T ₄ are the first, second, third, and fourth transistors, respectively, and R ₁ and R ₂ are the first,
the second resistor, S ₁ and S ₂ are the first and second switches;
1 is the ground terminal, 2 and 3 are the input terminals, 4 is the output terminal, 5 is the power supply terminal, 6, 7, and 8 are the terminals, C _BC is the junction capacitance between the base and collector of the first transistor T ₁ , V _ref 1, V _ref22 are the first and second reference voltages. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Scope of Claims] 1. A solid-state imaging device consisting of three bipolar transistors, two resistors, and two switches, in which the emitter of the first bipolar transistor is connected to the emitter of the second bipolar transistor and the emitter of the third bipolar transistor. , the collector of the first bipolar transistor is connected to a first switch that can be switched to a power supply or ground, and a first reference voltage is applied to the base of the second bipolar transistor,
The collector of this second bipolar transistor is connected to the power supply terminal via the first resistor, and the collector of the second bipolar transistor is connected to the power supply terminal via the first resistor.
The emitter of the bipolar transistor is grounded via a second resistor, the base of the third bipolar transistor is connected to a second reference voltage via a second switch, and the collector of the second bipolar transistor is grounded via a second resistor. An output terminal is provided at a connection point between the first bipolar transistor and the first resistor, and photoelectric conversion is performed between the base and collector of the first bipolar transistor. 2. The solid-state imaging device according to claim 1, wherein MOS transistors are used as the first switch and the second switch. 3. The solid-state image sensor according to claim 1, wherein bipolar transistors are used as the first switch and the second switch.