JPH0320442U - - Google Patents
Info
- Publication number
- JPH0320442U JPH0320442U JP7876489U JP7876489U JPH0320442U JP H0320442 U JPH0320442 U JP H0320442U JP 7876489 U JP7876489 U JP 7876489U JP 7876489 U JP7876489 U JP 7876489U JP H0320442 U JPH0320442 U JP H0320442U
- Authority
- JP
- Japan
- Prior art keywords
- ceramic substrate
- cavity
- sealing
- opening
- sealing surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
Description
第１図は本考案に係るセラミツク基板の要部断
面図、第２図、第３図は従来のセラミツク基板を
示し、第２図はその要部断面図、第３Ａ図は封止
ガラスが封止面より流出している状態を示す要部
断面図、第３Ｂ図はその斜視図である。
１……セラミツク基板、２……セラミツク基板
本体、３……キヤビテイ、４……封止面、５……
封止板、６……封止ガラス。
Fig. 1 is a sectional view of the main part of a ceramic substrate according to the present invention, Figs. 2 and 3 show conventional ceramic substrates, Fig. 2 is a sectional view of the main part thereof, and Fig. 3A shows the sealing glass. FIG. 3B is a sectional view of the main part showing a state in which the fluid flows out from the stop surface, and FIG. 3B is a perspective view thereof. 1... Ceramic substrate, 2... Ceramic substrate body, 3... Cavity, 4... Sealing surface, 5...
Sealing plate, 6...Sealing glass.
Claims (1)
イ３を有するとともに、該キヤビテイ３の開口部
に狭細な封止面４が形成されているセラミツク基
板であつて、前記封止面４に傾斜を施したことを
特徴とするセラミツク基板。 ２ 半導体素子、圧電素子等の素子を収容するキ
ヤビテイ３が穿設され、該キヤビテイ３の開口部
に狭細な封止面４が形成されているセラミツク基
板であつて、前記封止面４を傾斜面として形成し
かつこの傾斜面の傾斜を前記キヤビテイ３が下向
き〓の状態でセラミツク基板の外側から前記キヤ
ビテイ３に向かつて上り勾配に形成し、前記キヤ
ビテイ３の開口部を覆う封止板５とセラミツク基
板本体２とを接合する封止ガラス６を、前記セラ
ミツク基板本体２と前記封止板５との間に保持可
能としたことを特徴とするセラミツク基板。[Claims for Utility Model Registration] 1. A ceramic substrate having a cavity 3 for accommodating a semiconductor element, a piezoelectric element, etc., and a narrow sealing surface 4 formed in the opening of the cavity 3, which A ceramic substrate characterized in that a sealing surface 4 is sloped. 2 A ceramic substrate in which a cavity 3 for accommodating elements such as semiconductor elements and piezoelectric elements is bored, and a narrow sealing surface 4 is formed in the opening of the cavity 3, and the sealing surface 4 is A sealing plate 5 is formed as an inclined surface, and the slope of this inclined surface is formed in an upward slope from the outside of the ceramic substrate toward the cavity 3 in a state in which the cavity 3 faces downward, and covers the opening of the cavity 3. A ceramic substrate characterized in that a sealing glass 6 for bonding the ceramic substrate body 2 and the ceramic substrate body 2 can be held between the ceramic substrate body 2 and the sealing plate 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7876489U JPH0320442U (en) | 1989-07-05 | 1989-07-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7876489U JPH0320442U (en) | 1989-07-05 | 1989-07-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0320442U true JPH0320442U (en) | 1991-02-28 |
Family
ID=31622324
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7876489U Pending JPH0320442U (en) | 1989-07-05 | 1989-07-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0320442U (en) |
-
1989
- 1989-07-05 JP JP7876489U patent/JPH0320442U/ja active Pending