JPH03279882A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To reduce input signals at the time of a burn-in test by connecting pull-up circuits and a pull-down circuit to an input circuit, an output circuit, and an input/output circuit symmetrically, and properly performing ON-OFF control over circuit elements. CONSTITUTION:The pull-up circuits 24... and pull-down circuits 24-2 are connected to the input circuit 24, output circuit 25, and input/output circuit 26 symmetrically and the control signal of a control signal source 27 which is applied to those circuits 24-1... and circuit 24-2 contains a waveform other than a direct current. The circuits 24-1... and 24-2 are turned on and off with the signal from the signal source 27 normally at the same time. Consequently, the signal line potential is controlled optionally through the operation of the pull-up circuits and pull-down circuit which are connected symmetrically to the signal lines to an internal circuit 20. When the circuit 20 is put in normal operation, the pull-up circuits and pull-down circuit are turned off at the same time, but when the burn-in test is conducted, they are turned on and off individually.

Description

[Detailed Description of the Invention] [Summary] Regarding semiconductor integrated circuits that can be efficiently burn-in tested, pull-up and
The purpose of this technology is to provide a semiconductor integrated circuit that can easily perform burn-in tests in a short time without adding a pull-down circuit and increasing externally applied signals. - In a semiconductor integrated circuit that is connected to an external terminal via an output circuit/input/output circuit and controls the operation of the input circuit/output circuit/input/output circuit by a signal from an internal circuit, the input circuit/input/output circuit is connected to an external terminal.
A pull-up circuit and a pull-down circuit are connected symmetrically to each output circuit and input/output circuit, and the pull-up circuit and pull-down circuit are connected symmetrically.
It is constructed by including a waveform other than direct current as a control signal of a control signal source applied to the pull-down circuit.

[Industrial application field]

The present invention relates to a semiconductor integrated circuit capable of efficient burn-in testing.

During burn-in testing of semiconductor integrated circuits, in order to vary the signals applied to input/output terminals, many types of circuits are required to change the signal level of the terminals. In order to improve efficiency, it has been desired to simplify such circuits and enable a variety of tests.

[Conventional technology]

In order to perform burn-in tests on highly integrated and highly functional semiconductor integrated circuits, the configurations described in Japanese Patent Application Laid-open No. 63-61972 and Japanese Patent Application Laid-open No. 63-260145 are known. In other words, in the process of manufacturing semiconductor integrated circuits, bias voltages are applied to power supply and signal terminals at ambient temperatures reaching 150°C in order to eliminate initial defects. It is known to conduct tests that allow the environment to be applied to quickly detect changes in the state of things that deteriorate. FIG. 5 shows an example of the configuration of a semiconductor integrated circuit having a circuit for efficiently conducting such a test. In FIG. 5, 1 is an internal logic circuit, 2 is a signal terminal for the input circuit, 3 is a signal terminal for the output circuit,
4 is a signal terminal for the input/output circuit, 5, 6° 7 is a pull-up circuit formed by a PMO3) transistor, 8 is a control signal terminal for the pull-up circuit, 9 is a DC power supply terminal for the pull-up circuit, 10. II and +2 are inverters, +3 is a tri-state element, 14 is an AND circuit, and Sl and S2 are input/output circuit control signals. Now, if "H" is generated as the input/output circuit control signal S1 from the internal logic circuit 1, and a logical operation is performed using the "H" signal from the pull-up circuit control signal terminal 8 and the AND circuit 14, the input/output circuit A control signal S2 is obtained. Since the signal S2 controls the tristate element 13 to turn it on, the state signal of the internal logic circuit 1 is output to the terminal 4. If the control signal Sl is "L", the tri-state element 13 becomes a "high impedance node", and the terminal 4 serves as an input terminal for receiving an external signal or the internal logic circuit 1.
is applied and processed.

During the burn-in test, apply +VDo to terminal 9 and “
At that time, the pull-up circuit 5.7 is turned on. The control signal S2 becomes "L", and the tristate element 13 becomes a high impedance J. Therefore, the external signal is applied to the terminals 2 and 4. Even if no voltage is applied, the 'L' signal from the terminal 8 is converted into an 'H' signal by the inverter 10.12 and applied to the internal logic circuit l. Therefore, the applied signal is processed in the internal logic circuit l, and
Output to terminal 3. Next, when "L" is applied to the terminal 8, the pull-up circuits H5, 6, and 7 are turned on. During the burn-in test, the pull-up circuit 5°6.7 is connected to the inverter 10.
~12 acts as a load resistor.

[Invention or problem to be solved]

During a burn-in test, a waveform is applied from the outside as a signal to be applied to the internal logic circuit, which is a conventional method, but it requires a signal source for the external waveform and connection means for that purpose.

Processing cannot be performed only on chips forming semiconductor integrated circuits, and it is necessary to add a large number of devices to a substrate called a burn-in board. Therefore, the cost required for the burn-in test was high.

The purpose of the present invention is to improve the above-mentioned drawbacks, and in the process of manufacturing semiconductor integrated circuits, by adding pull-up/pull-down circuits, burn-in tests can be easily and quickly performed without increasing externally applied signals. An object of the present invention is to provide a semiconductor integrated circuit that has the following characteristics.

[Means to solve the problem]

FIG. 1 is a diagram showing the basic configuration of the present invention. In FIG. 1, 20 is an internal circuit formed of semiconductor elements, 21,
22.23 is the external terminal of the chip, 24 is the input circuit, 25
is an output circuit, 26 is an input/output circuit, 24-1.25-1.
26-1 is a pull-up circuit, 2/l-2, 25-2, 2
6-2 is a pull-down circuit, and 27 is a control signal source.

The internal circuit 20 formed by the semiconductor element is connected to the input circuit 24.
External terminals 21 through output circuit 25 and input/output circuit 26
In a semiconductor integrated circuit connected to 23 and controlling the operation of the input circuit, output circuit, and input/output circuit by signals from an internal circuit, the present invention has the following configuration. That is, a pull-up circuit 24-1 and a pull-down circuit 24-2 are symmetrically connected to the input circuit 24, output circuit 25, and input/output circuit 26, respectively, and a control signal is applied to the pull-up circuit and pull-down circuit. The control signal for the source 27 is configured to include waveforms other than direct current.

[Effect]

Each pull-up circuit 24-L...Pull-down circuit 24
-2 is turned on and off by the signal from the control signal source 27.
Usually controlled at the same time. Therefore, the signal line potential is arbitrarily controlled by the operation of pull-up circuits and pull-down circuits symmetrically connected to the signal line for the internal circuit 20. When operating the internal circuit 20 normally, the pull-up circuit and pull-down circuit are turned off at the same time. Also, during a burn-in test, each can be turned on or off individually.

Furthermore, if an alternating current signal other than direct current is applied to the signal line by alternately turning on and off the pull-up circuit and pull-down circuit during the burn-in test, the operation of the internal circuit 20 can be changed and complicated. Burn-in tests can be performed efficiently.

〔Example〕

As an embodiment of the present invention, the pull-up circuit is connected to a P-channel F
A case will be described in which the ET and pull-down circuit are configured with N-channel FETs, and a pulse waveform is applied to each FET from a control signal source. In FIG. 2, 24-1 and 24-2 are representative of the pull-up circuit and pull-down circuit shown as 25.26 in FIG. Therefore, when the control signals A and B and the logical product are calculated and the A-B signal is applied to the pull-up circuit 24-1 and the pull-down circuit 24-2,
The potential of the signal line to the internal circuit varies depending on the application method. Note that setting both control signals A and B to "L" is prohibited as it will short-circuit the control signal source;
"H" means that the internal circuit is operating normally, not during a burn-in test, so that is also excluded.Therefore, if the control signals A and B are "H" and "L", This is a condition for the operation of the present invention.

In the frame 2A surrounded by the broken line in FIG. 2, the potential of the signal line to the internal circuit 20 as an output changes in phase with the control signal A. Similarly, within the frame 2B, the potential of the signal line to the circuit 20 changes in opposite phase to the control signal A. Within the 2C frame, that potential is fixed to "L", and within the 2D frame, that potential is fixed to "L".
It is fixed at "H".

Next, FIG. 3 is a diagram illustrating alternately turning on and off a pull-up circuit and a pull-down circuit as an embodiment of the present invention. 3A and 3B show the control signals A and B shown in FIG. 2, and FIG.

When B is applied, the output line potential of the circuit shown on the right side of the figure is shown. FIG. 3 shows, from the left, when the internal circuit is operated normally, when a burn-in DC test is performed, and when a burn-in AC test is performed. That is, when operating normally, Δ or ") - (", B is "H", ■, ■,
(2) has an appropriate potential. At the time of the burn-in DC test, 8 is "L" and B is "I", so the circuit shown in (2) is the same circuit as the frame in FIG. 2B, and the output changes in the opposite phase to A. Since the circuit (2) is the same as the 2D circuit frame, the output is fixed to "I". Since the circuit (2) is the same as the 2A frame, the output changes in phase with A.

Therefore, the circuits shown in FIGS. 3, 3, and 3 can be applied as shown in FIGS. FIG. 4I shows the input side pull-up circuit/pull-down circuit of the input/output circuit, and the signal changed to the opposite phase to A goes to the left side of the figure and is applied to the internal circuit. This signal is in phase with control signal A (because it is passed through an inverter).

4 is an input circuit, and the input signal applied to the terminal goes to the left side of the figure.

4 is an output circuit, in which a signal changing in phase with a control signal is superimposed on the output signal from the internal circuit.

Since the number of input signals during the burn-in test can be reduced in this way, the control signals obtained within the chip can be used as they are, or the control signals can be input directly from the outside. Waveforms obtained through processing such as logical operations are simultaneously applied to pull-up and pull-down circuits, and waveforms other than direct current can also be applied.

〔Effect of the invention〕

In this way, according to the present invention, since the pull-up circuit and the pull-down circuit are connected and used symmetrically, the input signal during the burn-in test can be reduced by appropriately controlling the on/off of the circuit elements. . Therefore, testing of semiconductor integrated circuits can be easily performed.

[Brief explanation of drawings]

Fig. 1 is a diagram showing the principle configuration of the present invention, Fig. 2 is a diagram showing a circuit of an embodiment of the invention, Fig. 3 is a diagram showing a circuit of another embodiment of the invention, and Fig. 4 is a diagram showing a circuit of an embodiment of the invention. A configuration diagram of a circuit to which FIG. 3 is applied, and FIG. 5 is a diagram showing a semiconductor integrated circuit when performing a burn-in test. 20...Internal circuits 21-23...External terminal 24...Input circuit 24-1...Pull-up circuit 24-2...Pull-down circuit 25...Output circuit 26...-Input/output circuit 27.-Control signal source

Claims (1)

[Claims] An internal circuit (20) formed of a semiconductor element is connected to external terminals (21) to (23) via an input circuit (24), an output circuit (25), and an input/output circuit (26). and the internal circuit (
In a semiconductor integrated circuit that controls the operation of the input circuit, output circuit, and input/output circuit by signals from the input circuit (24), the output circuit (25), and the input/output circuit (20),
6) with a pull-up circuit (24-1) and a pull-down circuit (24-2) symmetrically connected to each other, and a control signal source applied to the pull-up circuit and pull-down circuit. (27) A semiconductor integrated circuit characterized in that the control signal includes a waveform other than direct current.