JPH0391841A - Abnormality recovery processing system - Google Patents

Abstract

PURPOSE:To attain a process based on an experimental fact and to recover the abnormality with high reliability by transmitting a reset signal after detection of a fact that all information devices are abnormal. CONSTITUTION:When each of information processors 1(1) - 1(n) has the abnormal ity, each of halt instruction generating parts 1(1)a - 1(n)a provided for the infor mation processors respectively produces a halt instruction to each information processor. When the halt instructions are produced from all halt instruction generating parts, these instructions are detected by a full halt state detecting part 2. Then the reset signals are outputted from a reset signal transmission part 3 in accordance with the detection output of the part 2. Thus the processors 1(1) - 1(n) are reset. As a result, it is possible to attain an abnormality recovery processing system that is started again and can perform a normal process with high reliability despite the abnormal states of all information processors based on an experiential fact that the abnormality of a computer is caused most by a temporary fault.

Description

[Detailed Description of the Invention] [Summary] Regarding an abnormality recovery processing method that attempts to continue normal processing when an abnormality occurs in a processing device belonging to a system having a plurality of processing devices, all processing devices fall into an abnormal state. The purpose of this invention is to provide a reliable abnormality recovery processing method that allows the system to restart and continue normal processing even in the event of an abnormality that occurs in the processing device. In addition, an all-inactive state detection part is provided in each of the processing devices, and an all-inactive state detection unit for determining whether or not all the processing devices are in an inactive state; and a reset signal exit section that sends out a reset signal.

[Industrial application field]

The present invention relates to an abnormality recovery processing method, and particularly to an abnormality recovery processing method that attempts to continue normal processing when an abnormality occurs in a processing device belonging to a system having a plurality of processing devices.

(Conventional technology) Conventionally, there has been a system as shown in FIG.

This system includes a plurality of processing devices 6 (x). i=1,z,
The system consists of ~ (computers), and each processing device monitors each other for abnormalities. If an abnormality occurs in one processing device, an abnormality recovery method is used that allows the remaining processing devices to continue operating the system. It was getting worse.

(Problem to be Solved by the Invention) By the way, in the conventional abnormality recovery method, when an abnormality occurs in each processing device one after another and the remaining processing devices are finally exhausted, the system is unable to perform the processing. This solves the problem of not being able to continue. Was.

On the other hand, there is an empirical fact that, in general, most computer abnormalities are temporary failures, and that by restarting the computer, the computer continues normal processing.

Therefore, the present invention has been made with the object of providing a reliable abnormality recovery processing method that can restart the system and continue normal processing even if all processing devices fall into an abnormal state. It is.

[Means to solve the problem]

In order to solve the above technical problems, as shown in FIG. In an abnormality handling method that attempts to continue normal processing in response to an abnormality that occurs, each processing device is provided with a suspension command generation unit 1(i)a that causes the processing device 1(i) to enter a suspended state due to an abnormality that occurs. , an all-dormant state detection unit 2 that determines whether or not all the processing devices 1(i) are in a dormant state, and a reset signal to all the processing devices when it is determined that all the processing devices are in a dormant state. It has a reset signal sending unit 3 that sends out a reset signal.

[Effect]

Each processing device 1 (i) + t-1 s 2 to n is provided with a suspend instruction generating unit 1 (i) a; In this case, the processing device becomes inactive.

Even if an abnormality occurs, only one processing device is operating normally.
As long as there is one, the system continues normal processing by the processing device.

However, if the all-dormant state detection unit 2 detects that an abnormality has occurred in all the processing devices and the suspension command generating unit has put them into a dormant state, the system can continue processing normally. The reset signal sending unit 3 is notified of this fact.

Then, the reset signal sending unit 3 that has received the notification sends a reset signal to all processing devices.

This is based on the empirical fact that most computer abnormalities are generally temporary failures, and normal processing may continue by restarting the computer.

〔Example〕

Next, examples of the present invention will be described.

FIG. 2 shows an overall diagram of the system according to this embodiment.

This device has a plurality of processing devices 11(i) such as CPUs; i=1
．． A halt instruction generating section 11(i)a corresponding to the suspending instruction generating section 1(i)a which puts the processing device into a hibernation state due to an abnormality occurring in the processing device 11(i); It is provided in each processing device.

Furthermore, this system is a subsystem that is independent of each processing device, and provides hardware control of the main body necessary for operating each processing device, a means of conversation with the operating system (OS), It monitors and diagnoses the operational status of the system.

FIG. 3 shows the monitoring device in detail.

The monitoring device is composed of a CPU, and includes a monitoring processing section 21 corresponding to the all-halt state detection section 2 and reset signal sending section 3, and hardware that performs writing or reading access to control registers of each processing device.・Access part 2
2, and each of the processing devices 11(i); i・1, 2, 3, ~
A control table 23 consisting of a memory stores a table corresponding to each processing device indicating whether or not it is in a halt state (dormant state), processing of input/output operations with external storage devices, execution order, errors, etc. It has a management section 24 used for smooth operation of the system such as processing.

The device according to this embodiment operates as follows.

If an abnormality occurs in each processing device 1 1 (i); i=1.2, and it is determined that the processing device cannot continue normal processing, the halt instruction generating unit 1 1
(i); i=1.2, ~ puts the processing device in the halt state. The operating status of each processing device, that is, whether it is in a halt state or not, is determined by each processing device 11(i); i=1.2.
displayed in the status register of ~.

As shown in the flowchart of FIG. 5, the monitoring device 20, in step SJI, accesses each of the processing devices 1 1 (1); x=1.2. status of ~
Periodically instructs to read (access) the register. The read information, that is, information as to whether or not it is in the halt state, is recorded in the control table 23 for each processing device as shown in the upper part of FIG. 4.

In step SJ2, the monitoring processing unit 21 periodically accesses the control table 23, monitors the contents of the table, and determines whether all processing devices are in the halt state.

If all processors 11(x); i=1.2, ~ are not in the halt state, the remaining processors (even if there is only one) that are not in the halt state process the system. The operation continued, and there were no instructions from the monitoring equipment.

On the other hand, as shown in the upper part of FIG.
If the monitoring processing section 21 recognizes that all the processing devices are in the halt state in the table, the process proceeds to step SJ3, and the hard access section 22 performs the following operations on the reset register of each processing device. An instruction as shown in the middle part of FIG. 4 is given, and the hard access section 22 writes a reset instruction signal to each processing device.

As a result, as shown in the lower part of FIG. 4, each processing device is started up and processing continues, and the table of the control table 23 reflects the status register of each processing device, indicating that it is not in a halt state. It will be displayed.

〔Effect of the invention〕

As explained above, in the present invention, when an abnormality occurs in each of a plurality of processing devices and normal processing cannot be continued, the processing device is placed in a hibernation state, and all of the processing devices are in a hibernation state. When this is detected, a reset signal is sent to all the processing devices to start them up.

Therefore, it is possible to prevent a situation in which all devices are in a dormant state and the system is not operated at all, and to ensure reliable system operation.

[Brief explanation of drawings]

Fig. 1 is a principle block diagram of the present invention, Fig. 2 is an overall block diagram according to an embodiment, Fig. 3 is a diagram showing a monitoring device according to an embodiment, and Fig. 4 is a functional explanation of a monitoring device according to an embodiment. 5 is a processing flowchart of a monitoring device according to an embodiment, and FIG. 6 is a block diagram of a conventional example. 1 (i), 1 1 (i); i=1.2, ~n・
...processing device 1(i) a (1 1(i) a);
i=1.2, ~n... Pause command generation section (halt command generation section) 2 (20)... Total pause state detection section (monitoring device) 3
(20)... Reset signal sending unit (monitoring device) emitted from April's principle block area ill Inkstone casing actual illustration 3 gs 3 cause implementation 4#J 1'': Example of the flow of a monitoring device No. 5w
J

Claims (1)

[Claims] Continuation of normal processing in response to an abnormality occurring in the processing device {1(i)} belonging to a system having a plurality of processing devices {1(i), i=1, 2 to n} In an abnormality processing method that aims at (i) an all-dormant-state detection unit (2) that determines whether or not } is in a dormant state; and an all-dormant state detection unit (2) that sends a reset signal to all the processing devices when it is determined that all the processing devices are in a dormant state; An abnormality recovery processing method characterized by comprising a reset signal sending section (3).