JPH046282Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] This invention relates to a line status display device in a data communication system.

[Prior Art and its Problems] As a device for displaying the amount of packet traffic between data transmission lines, there are, for example, a dedicated packet monitor device and a device that adds a monitoring function to a network terminal. However, all of these devices are large-scale and expensive, and as a result, it is difficult to install the packet monitor device at the required time and place, and there is a problem in that it lacks ease of use in practical use.

Furthermore, it is difficult to accurately grasp overload conditions by simply displaying the amount of traffic.

[Purpose of the invention] The problem of this invention is to be able to accurately grasp the overload state of the network.

[Embodiment of the invention] An embodiment of the invention will be described below with reference to the drawings. Here, the packet traffic amount display device according to this invention is applied to the Ethernet (registered trademark of Xerox Corporation) RAN system. As shown in FIG.
3. Receive buffer 14, interface circuit 1
5 and a collision detection circuit 16.
The receiving device 12 exchanges transmitted and received data with other devices via the coaxial cable 11, and detects collisions of transmitted signals, that is, detects when a transmitted signal cannot be transmitted because the transmission line is in use. It is. A reception traffic display circuit 17 is connected via the reception buffer 14 of the transmitting/receiving device 12 configured as described above.
8, a charging/discharging circuit 19, an output buffer 20, and a level indicator 21.
Incidentally, a series of operations of the reception traffic display circuit 17 and the transmitting/receiving device 12 are controlled by a terminal device 22 connected via the interface circuit 15.

The packet signal detected by the transmitter/receiver 12 is input to the reception traffic display circuit 17 via the reception buffer 14, and the input signal is input to the charge/discharge circuit 19 via the input buffer 18.
is supplied to The charging/discharging circuit 19 includes a charging current adjusting resistor 23, a rectifying diode 24, a capacitor 25, and a discharging current adjusting resistor 26. Here, the input buffer 18 is for setting a voltage level that allows the rectifier diode 24 to perform the rectifying operation normally.
The signal amplified by the input buffer 18 is supplied to the rectifier diode 24 via the charging current adjustment resistor 23. By the rectifier diode 24,
The signal obtained through the charging current adjusting resistor 23 is waveform-shaped and supplied to a circuit consisting of a capacitor 25 and a discharging current adjusting resistor 26 at the next stage. That is, the signal obtained through the charging current adjustment resistor 23 is charged into the capacitor 25, and a portion is discharged through the discharge current adjustment resistor 26, and packet signals are continuously input. In this case, the amount of charge in the capacitor 25 becomes larger than the amount of discharge to the discharge current adjusting resistor 26, and the voltage across the capacitor 25 gradually increases. Then, when the input of the packet signal is interrupted, charging of the capacitor 25 is stopped, and the discharge current adjustment resistor 2
6 and the capacitor 25
The voltage across the terminal gradually decreases.

FIG. 2 shows a diagram for explaining the above signal state. Figure a shows a packet signal input to the charge/discharge circuit 19, and figure b shows an analog voltage signal corresponding to the packet signal.
That is, in response to the input of a continuous amount of packets between t ₀ and _{t 1} as shown in Figure A, the voltage across the capacitor 25 gradually increases between t ₀ and _{t 1} , and when reaching time t ₁ . , discharge is performed via a discharge current adjustment resistor 26. That is, the measurement of the amount of packet traffic per unit time is determined by changing the maximum value of the voltage across the capacitor 25 in accordance with the amount of consecutive packets. In this way, the signal obtained by the charging/discharging circuit 19 is supplied to the output buffer 20,
It is converted into a voltage value for driving the level indicator circuit 21. The amount of transmission detected by the transmitting/receiving device 12 as described above is displayed by the indicator circuit 21.

FIG. 3 is a block diagram in which a collision frequency display circuit 30 and a transmission traffic display circuit 31 are incorporated into the circuit shown in FIG. 1. The collision frequency display circuit 30 is provided via the collision detection circuit 16, and is configured to display the frequency of collisions of transmission signals while the transmission line is in use.
The transmission traffic display circuit 31 is provided via the transmission terminal of the interface circuit 15, and is configured to display the amount of traffic of transmission data sent via the terminal device 22. In addition, the collision frequency display circuit 3
0 and the transmission traffic display circuit 31 have the same circuit configuration as the reception traffic display circuit shown in FIG. It is possible to understand the

Figure 4 shows the received traffic display circuit 1 of Figure 1.
7 display section LED level indicator circuit 40
and a light emitting diode array 41.

A voltage signal corresponding to the amount of transmission obtained by the charge/discharge circuit 19 is input to the LED level indicator circuit 40 and converted into a signal for driving the light emitting diode array 41. The light emitting diode array 41 includes a large number of light emitting diodes 4.
2a, 42b... are provided, and the amount of transmission detected by the transmitting/receiving circuit 12 is displayed by blinking the light emitting diodes 42a, 42b....

[Effects of the invention] According to the invention, the overload state of the network can be accurately grasped, so that appropriate network management is possible.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram for explaining an embodiment of this invention, and diagrams a and b in FIG. 2 are characteristic diagrams of a packet signal and its corresponding analog voltage signal.
Fig. 3 is a circuit diagram showing another embodiment of this invention in which a collision frequency display circuit and a transmission traffic display circuit are added to the circuit shown in Fig. 1 above, and Fig. 4 shows an LED level indicator added to the circuit shown in Fig. 1 above. FIG. 7 is a circuit diagram showing another embodiment of the invention using a circuit. 18... Input buffer, 20... Output buffer, 23... Charging current adjusting resistor, 24... Rectifying diode, 25... Capacitor, 26... Discharging current adjusting resistor, 26... Level indicator circuit.

Claims (1)

[Scope of utility model registration request] A line status display device comprising: a detection means for detecting a collision of transmission signals on a transmission path; and a display means for displaying a collision frequency based on a collision detection signal from the detection means.