JPH0468566U - - Google Patents
Info
- Publication number
- JPH0468566U JPH0468566U JP11240490U JP11240490U JPH0468566U JP H0468566 U JPH0468566 U JP H0468566U JP 11240490 U JP11240490 U JP 11240490U JP 11240490 U JP11240490 U JP 11240490U JP H0468566 U JPH0468566 U JP H0468566U
- Authority
- JP
- Japan
- Prior art keywords
- relay terminal
- relay
- output terminals
- mosfet
- terminal located
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 9
- 238000003491 array Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 4
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- Electronic Switches (AREA)
Description
第1図は本考案の一実施例を示す半導体リレー
の内部平面配置図、第2図は第1図に示す半導体
リレーの回路図、第3図は従来の一例を示す半導
体リレーの内部平面配置図、第4図は第3図に示
す半導体リレーの回路図である。
1……半導体リレー、2A,2B……入力端子
、3A,3B……出力端子、4……中継端子、5
……発光ダイオード、6……フオトダイオードア
レー、7……駆動素子、8……MOSFET素子
、9A,9B,9C……リードフレームアイラン
ド部、10……ドレイン電極、11……ゲート電
極、12……ソース電極、13……アノード電極
、14……カソード電極、15……ワイヤー配線
、16……インピーダンス素子、17……ボデイ
電極。
Fig. 1 is an internal plan layout diagram of a semiconductor relay showing an embodiment of the present invention, Fig. 2 is a circuit diagram of the semiconductor relay shown in Fig. 1, and Fig. 3 is an internal plan layout diagram of a semiconductor relay showing a conventional example. 4 are circuit diagrams of the semiconductor relay shown in FIG. 3. 1...Semiconductor relay, 2A, 2B...Input terminal, 3A, 3B...Output terminal, 4...Relay terminal, 5
...Light emitting diode, 6...Photodiode array, 7...Drive element, 8...MOSFET element, 9A, 9B, 9C...Lead frame island portion, 10...Drain electrode, 11...Gate electrode, 12... ... Source electrode, 13 ... Anode electrode, 14 ... Cathode electrode, 15 ... Wire wiring, 16 ... Impedance element, 17 ... Body electrode.
Claims (1)
びソース電極を形成し且つ2つの出力端子の先端
に形成したアイランド部に搭載される二つのMO
SFET素子と、前記二つの出力端子間に位置す
る中継端子のアイランド部に独立して配置した2
組のフオトダイオードアレーを有する前記MOS
FETを駆動する駆動素子とを備えることを特徴
とする半導体リレー。 2 請求項1記載の駆動素子は1チツプ化される
ことを特徴とする半導体リレー。 3 入力端子からの信号により発光する発光ダイ
オードと、前記発光ダイオードからの光により、
電圧・電流を発生する2つのフオトダイオードア
レーと、前記電圧・電流によりゲート入力を充電
するNチヤンネルエンハンスメント型MOSFE
Tと、裏面がソース電極となる前記MOSFET
をマウントするアイランド部に連続したリードフ
レームの一部を外部に突出させた2つの出力端子
と、前記2つの出力端子の間に位置する中継端子
とを有し、前記中継端子のアイランド部と前記M
OSFETの表面部に配置されたドレイン電極と
をそれぞれワイヤー配線により接続して共通電位
とし、前記MOSFETを駆動するための独立し
た前記2つのフオトダイオードアレーを有する駆
動素子を前記中継端子のアイランド部にマウント
し、前記MOSFETのドレイン・ソース間をオ
ン状態にして前記出力端子および中継端子間を閉
成させることを特徴とする半導体リレー。[Claims for Utility Model Registration] 1. Two MOs having a body electrode on the back side, a drain electrode and a source electrode on the front side, and mounted on an island portion formed at the tips of two output terminals.
SFET element and 2 transistors arranged independently in the island part of the relay terminal located between the two output terminals.
the MOS having a photodiode array;
A semiconductor relay comprising a drive element that drives a FET. 2. A semiconductor relay, wherein the driving element according to claim 1 is integrated into one chip. 3. A light emitting diode that emits light in response to a signal from an input terminal, and light from the light emitting diode,
Two photodiode arrays that generate voltage and current, and an N-channel enhancement type MOSFE that charges the gate input with the voltage and current.
T and the MOSFET whose back surface is the source electrode.
and a relay terminal located between the two output terminals, and a relay terminal located between the two output terminals, and a relay terminal located between the island portion of the relay terminal and the M
The drain electrodes disposed on the surface of the OSFET are connected by wire wiring to provide a common potential, and a driving element having the two independent photodiode arrays for driving the MOSFET is connected to the island part of the relay terminal. A semiconductor relay, characterized in that the semiconductor relay is mounted, and the drain and source of the MOSFET are turned on to close the output terminal and the relay terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11240490U JPH0468566U (en) | 1990-10-25 | 1990-10-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11240490U JPH0468566U (en) | 1990-10-25 | 1990-10-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0468566U true JPH0468566U (en) | 1992-06-17 |
Family
ID=31859910
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11240490U Pending JPH0468566U (en) | 1990-10-25 | 1990-10-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0468566U (en) |
-
1990
- 1990-10-25 JP JP11240490U patent/JPH0468566U/ja active Pending
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