JPH0518138B2 - - Google Patents

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention provides an apparatus that includes a plurality of calculation modules (hereinafter referred to as modules) each having a calculation function, and performs a desired comprehensive calculation by selecting and combining these modules. The present invention relates to a calculation status changing method for changing the calculation status of .

[Conventional technology]

In control devices that use processors, in order to facilitate the creation of processing programs for control calculations, the calculation functions are divided into many standard subroutines (modules), and the required functions can be derived from these subroutines. The subroutines are called and executed in a predetermined order to perform comprehensive calculations. At this time, each calculation result in each executed subroutine is stored as output data at each memory address in RAM (volatile memory) specified by the pointer table with reference to the pointer table. Furthermore, when executing each subroutine, the access status specification table is referred to, and the output data stored in the memory address specified by the access status specification table is used as input data.

In addition, in the above, the processing program for control calculation is stored in ROM (non-volatile memory).
This control calculation processing program creates an execution order table that determines the execution order of subroutines, an access status designation table, and a pointer table.

[Problem to be solved by the invention]

However, in such a device, if you want to change the calculation status, for example, the exchange status of input/output data between each subroutine, you have to change the control calculation processing program stored in the ROM, that is, you have to replace the ROM. The disadvantage is that it is impossible to make changes at the installation site.

[Means to solve the problem]

The present invention was made to solve such problems, and it calls a calculation module with a required function from a plurality of calculation modules in a predetermined order according to a control calculation processing program stored in a non-volatile memory. The calculation results of each calculation module are used as output data, and a non-rewritable pointer table that specifies each memory address in volatile memory where each output data is stored is referenced. While storing each output data in each specified memory address, when executing each calculation module, specify the memory address where the input data is stored for those that require input data for each calculation module. In a device equipped with a processor that uses as input data the output data stored at the memory address specified by this access status specification table, the processor refers to a non-rewritable access status specification table. When an instruction to change the calculation status is received in a form that specifies the transfer destination memory address, this change instruction is stored in volatile memory, and is executed in each calculation module according to the control calculation processing program. Checks whether a prohibition code has been added to the memory address where the calculation result of is to be stored as output data. If no prohibition code has been added, the output data is stored to that memory address, and the prohibition code is not added. If so, stop storing output data to that memory address, check whether a change instruction is stored in volatile memory, and if a change instruction is stored, transfer the data stored at the source memory address. reading,
This operation of storing the read data with a prohibition code added to the transfer destination memory address is repeated.

[Effect]

Therefore, according to the present invention, each time each calculation module is executed according to the control calculation processing program, data is stored in the transfer destination memory address specified by the change instruction, based on the change instruction stored in the volatile memory. The data is stored with a prohibition code added to the transfer destination memory address specified by this change instruction. Furthermore, each time an arithmetic module is executed according to the control arithmetic processing program, the output data of that arithmetic module is stored in a designated memory address on the premise that no prohibition code is added.

Therefore, when a calculation module is executed, if a transfer destination memory address is specified as the input data storage address, it is equivalent to specifying a transfer source memory address.

〔Example〕

Hereinafter, details of the present invention will be explained with reference to figures showing examples.

FIG. 1 is a functional block diagram, in which a plurality of modules A to G each having an input IN and an output OUT are configured by subroutines, and the ROM 2
Pointer table TB created by the control calculation processing program stored in 2 (see Figure 6)
1 (Figure 2) and input/output data access status specification table TB2 (Figure 3) between each subroutine.
(Fig.), the connections shown by the solid lines in the figure are equivalently made.

In addition, in FIG. 2, D _A1 and D _A2 are the output data of subroutine A, D _B is the output data of subroutine B, D _C is the output data of subroutine C,
D _D is the output data of subroutine D, D _E is the output data of subroutine E, D _F is the output data of subroutine F, D _G is the output data of subroutine G, and the output data D _A1 , D _A2 , D _B , D _C , D _D ,
The memory addresses in RAM 23 (see Figure 6) where D _E , D _F , and D _G are stored are 11-1, 11.
-2, 11-3, 11-4, 11-5, 11-
6, 11-7, 11-8.

Also, in Fig. 3, IN, IN ₁ , and IN ₂ are input terminals of each subroutine, and subroutines A to
For subroutine C, it is shown that there is no need for input data to input terminal IN, and for subroutine D, output data D _A1 stored at memory address 11-1 is input data to input terminal IN,
For subroutine E, memory address 11-
Output data D _D stored in 5, 11-3,
D _B is input data to input terminals IN ₁ and IN ₂ , and for subroutine F, memory address 11-
Output data D _E stored in 6, 11-2,
D _A2 is input data to input terminals IN ₁ and IN ₂ , and subroutine G is input to memory address 11-4.
This indicates that the output data D _C stored in is used as the input data to the input terminal IN.

In the functional block diagram shown in Fig. 1, the overall calculation by selecting subroutines A to G is as follows:
The CPU 21 (see Fig. 6) refers to the pointer table TB1 and the access status specification table TB2 shown earlier according to the execution order table TB3 (Fig. 4) created by the control calculation processing program stored in the ROM 22. This is done as follows.

That is, the CPU 21 first selects subroutine A according to the control calculation processing program and with reference to the execution order table TB3. Then, regarding this subroutine A, by referring to the access status specification table TB2, it is known that no input data is required, and then the calculation is executed. The output data D _A1 and D _A2 , which are the calculation results in subroutine A, are stored at the memory address 11-11 specified by the pointer table TB1 with reference to the pointer table TB1.
1, 11-2.

Thereafter, in the same manner, the CPU 21 executes subroutines B, C, and C according to the control calculation processing program.
Operations are performed sequentially on D, E, F, and G, and the output data D _B , D _C , D _D , D _E , D _F , D _G is stored at memory addresses 11-3, 11-4, 11-5, 11- 6,
11-7 and 11-8, and an arithmetic processing file as shown in FIG. 5 is obtained in the RAM 23.

In addition, during calculation, the CPU 21 uses the output data D _A1 stored at memory address 11-1 as input data for subroutine D by referring to the access status specification table TB2 according to the control calculation processing program. , for subroutine E, memory address 1
Output data D _D and D _B stored in memory addresses 1-5 and 11-3 are used as input data, and for subroutine F, output data D _E and D stored in memory addresses 11-6 and 11-2 are used as input data. _A2 is used as input data, and for subroutine G, output data D _C stored at memory address 11-4 is used as input data.

In contrast to the above, now suppose that in FIG. 1, it is desired to change the calculation situation by cutting off the locations marked with x and adding connections indicated by dotted lines.

In this case, in the access status specification table TB2 shown in _FIG .
to 11-4, that is, output data D _E to D _C
The first thing to consider is to change to but,
The access status specification table TB2 cannot be rewritten because the control calculation processing program for creating it is stored in the ROM 22. To change this access status specification table TB2
The ROM 22 must be replaced and cannot be changed at the installation site.

In this embodiment, in such a case, the calculation status can be easily changed by simply inputting a simple change command from the keyboard 29 (see FIG. 6) without replacing the ROM 22.

Hereinafter, change commands from the keyboard 29 and their processing status will be explained with reference to FIGS. 6 to 8.

FIG. 6 is a block diagram showing the configuration of the control device, with a processor (hereinafter referred to as CPU) 21 at the center, ROM 22, RAM 23, and interfaces (hereinafter referred to as I/F) 24 to 26 arranged around it. These are connected by a bus bar 27.
The CPU 21 executes the control calculation processing program stored in the ROM 22 and generates the necessary data.
Control operations are performed while accessing RAM23,
A control output is obtained by control calculation based on input via I/F 24 and data received from transmission line 28 via I/F 25, and a control signal is sent via I/F 24 and transmitted via I/F 25. The transmission data is transmitted to the line 28.

In addition, the I/F 26 has a keyboard (hereinafter referred to as
KB) 29 and cathode ray tube display (hereinafter referred to as
CRT) 30 is connected. The CPU21 is
In response to the operation of KB29, a change command from KB29, which will be described later, is stored in RAM23, and then RAM2
Execute the control calculation processing program in 2,
Sends data to CRT30,
Displays 0.

The change command from KB29 is given as follows.

In Fig. 1, if you want to cut the part marked with an x and add the connection shown by the dotted line, when calculating subroutine F, input the output data D _C to the input terminal IN ₁ instead of the output data D _E. It turns out that it is sufficient to use it as data. That is, in the arithmetic processing file shown in FIG. 5, if output data D _C is stored in memory address 11-6,
Access status specification table TB2 shown in Figure 3
In the calculation of subroutine F with reference to , input data to input terminal IN ₁ is used as output data D _C .

Therefore, in this embodiment, the transfer source memory address is set to memory address 11-4, the transfer destination memory address is set to 11-6, and the KB 29 provides a change command in a form specifying these addresses. CPU21
stores this change instruction in the RAM 23 as a change instruction table TB4 (FIG. 7).

FIG. 8 is a flowchart of the main part of the control calculation processing program in the ROM 22. The CPU21 is
According to the control calculation processing program, subroutine A is first selected with reference to execution order table TB3. And regarding this subroutine A,
By referring to the access status specification table TB2, it is learned that no input data is required, and then the calculation is executed (step 101). Then, the calculation result in subroutine A is output data D _A1 ,
It obtains the data as D _A2 and refers to the pointer table TB1 to learn memory addresses 11-1 and 11-2 as the storage destinations for the output data D _A1 and D _A2 . Then, it is checked whether or not a prohibition code is added to these memory addresses 11-1 and 11-2 (step 102). In this case, no prohibition code is added, and the process proceeds to step 103 where the output data is sent to memory addresses 11-1 and 11-2.
Store D _A1 and D _A2 .

Then, the CPU 21 accesses the RAM 23 in accordance with the control calculation processing program, and in response to YES in the question "Is there a modification command?" (step 111), the CPU 21 stores the modification command table TB4 at the memory address 11-4 indicated by "FROM". The read data is read out (step 112), and the read stored data is stored with a prohibition code added to the memory address 11-6 indicated by "TO" (step 113). Similarly, the CPU 21 repeats the operations from step 101 onward for subroutines B to G in accordance with the control calculation processing program.

Now, assume that the CPU 21 has finished the calculations in subroutines A, B, C, and D, and has started the process of executing subroutine E, referring to the execution order table TB3 in accordance with the control calculation processing program. CPU2
1 uses the output data D _D and D _B stored in memory addresses 11-5 and 11-3 for this subroutine E according to the control calculation processing program by referring to the access status specification table TB2. , executes the calculation (step 101). Then, the calculation result in subroutine E is obtained as output data D _E , and the pointer table is
Referring to TB1, memory address 11-6 is known as the storage destination of output data _DE . Then, it is checked whether a prohibition code has been added to this memory address 11-6 (step 102).
In this case, a prohibition code has been added, which causes the process to proceed to step 104 and memory address 11-1.
Stop storing the output data _DE to 6.

Then, the CPU 21 accesses the RAM 23 in accordance with the control calculation processing program, and in response to YES in the question "Is there a modification command?" (step 111), the CPU 21 stores the modification command table TB4 at the memory address 11-4 indicated by "FROM". Read the data (output data D _C ) that is being read out, and transfer this read output data D _C to memory address 11-6 indicated by
Add a prohibition code to the file and store it (step
113). In other words, the output data stored in the transfer source memory address 11-4 specified by the change instruction
D _C is transferred to the transfer destination memory address 11-6 specified by the change instruction.

Therefore, in the execution process of subroutine F,
When calculating subroutine F that refers to access status specification table TB2, memory address 1
The stored data 1-6, that is, the output data D _C is used, and as a result, the calculation situation is changed as indicated by the broken line in FIG.

Figure 9 shows the results obtained by repeating the operations from step 101 onwards for subroutines A to G.
The calculation processing file in RAM23 is shown.

As explained above, according to this embodiment, by simply inputting a simple change command from KB29,
The overall calculation situation is changed, and changes in control conditions can be easily dealt with at the site where the device is installed, without replacing the ROM 22.

In addition, in FIG. 9, the upper or lower bits of memory addresses 11-1 to 11-8 may be used as the prohibition code, and the logical value "0" or "1" may be used to indicate the prohibition code x. good. Note that this prohibition code may be provided corresponding to a completely separate area.

However, memory addresses 11-1 to 1 in FIG.
1-8 may be provided according to the number of subroutines and the number of outputs, and the number of these bits may be determined according to the bit configuration of the data and the inhibition code x.

In addition, the configurations shown in FIGS. 1 and 6 can be arbitrarily selected depending on the situation, and other display devices may be used as the CRT 30, and can be applied not only to control calculations but also to various data processing, etc. Various modifications are possible.

Furthermore, although this embodiment has been described using a software subroutine as an example of a module, it goes without saying that the present invention can also be applied to a hardware calculation module.

〔Effect of the invention〕

As is clear from the above explanation, according to the present invention, equivalent connections between modules can be freely changed by simple operations without changing the control calculation processing program stored in the non-volatile memory. Since the overall calculation status can be easily changed, remarkable effects can be obtained in devices having various calculation functions.

[Brief explanation of drawings]

The figures show an embodiment of the present invention; Fig. 1 is a functional block diagram, Fig. 2 is a diagram showing a pointer table created by a program stored in ROM, and Fig. 3 is a diagram showing a pointer table created by this program. Figure 4 is a diagram showing the access status specification table, Figure 4 is a diagram showing the execution order table created by this program, Figure 5 is a diagram showing the calculation processing file in RAM (before the calculation status is changed), and Figure 6 is the control device. Figure 7 is a block diagram showing the configuration of
FIG. 9, which is a flowchart of the main part of the control calculation processing program stored in the ROM, is a diagram showing the calculation processing file in the RAM (after the calculation status has been changed). A to G...subroutine (module), 11
-1 to 11-8...Memory address, 21...
CPU, 22...ROM (non-volatile memory), 23...
...RAM (volatile memory), 24-26...I/
F, 29...KB, D _A ~ D _G ... Output data, ×...
...Prohibition code, TB1...Pointer table,
TB2...Access status specification table, TB3...
...Execution order table, TB4...Change instruction table.

Claims (1)

[Scope of Claims] 1. According to a control calculation processing program stored in a non-volatile memory, calculation modules with required functions from a plurality of calculation modules are called and executed in a predetermined order, and calculations in each calculation module are executed. Using the results as output data, refer to a non-rewritable pointer table that specifies each memory address in the volatile memory where each of these output data is stored, and store each of the output data at each memory address specified by this pointer table. and an unrewritable access status that specifies the memory address where input data is stored for each calculation module that requires input data when executing each calculation module. In an apparatus equipped with a processor that refers to a specified table and uses output data stored at the memory address specified by this access status specification table as input data, the processor has a transfer source memory address and a transfer destination memory address. When a command to change the calculation status is received in a format specifying the above, the change command is stored in the volatile memory, and each time the calculation module is executed according to the control calculation processing program, the calculation status in the calculation module is changed. Checks whether a prohibition code is added to the memory address where the calculation result is to be stored as output data,
If no prohibition code is added, output data is stored in that memory address, and if a prohibition code is added, storage of output data to that memory address is stopped, and storage of the change instruction in the volatile memory is stopped. Check the existence of the change command, and if a change instruction is stored, read the data stored in the transfer source memory address, and repeat the operation of storing the read data in the transfer destination memory address with the prohibition code added. A calculation status change method characterized by: