JPH05336448A - Sold-state image pickup device - Google Patents

Abstract

(57) [Abstract] [PROBLEMS] To provide a solid-state imaging device capable of performing an imaging operation by controlling an exposure period within a range of 1 field to 1 frame by an electronic shutter function. [Structure] Frame interline transfer type C
The electronic shutter control for discarding the image-capturing charges obtained by the photoelectric conversion elements 14 and 15 of the CD image sensor 10 to the overflow drain for each field is performed, and the image-capturing charge of each field is set to 1 immediately before being discarded to the overflow drain by the electronic shutter control. Alternately read every field to the vertical transfer register 18 of the imaging unit 11,
The electronic shutter control includes a timing signal generator 1 for controlling the photoelectric conversion element of each field so that the image pickup charge is added to the image pickup charge of one field previously read to the vertical transfer register 18 and read.

Description

Detailed Description of the Invention

[0001]

The present invention relates to a charge coupled device (CCD:
The present invention relates to a solid-state imaging device using a solid-state image sensor such as a CCD image sensor formed by a Charge Coupled Device, and particularly to a photoelectric conversion element corresponding to a first-field pixel arranged in a matrix and a second-field pixel. A frame interline transfer type in which the imaging charges of each field obtained by the corresponding photoelectric conversion element are transferred to the storage unit via the vertical transfer register, and the imaging charges are output line-sequentially from the storage unit via the horizontal transfer register. And a solid-state image sensor including the solid-state image sensor.

[0002]

2. Description of the Related Art Generally, in a solid-state image sensor having a discrete pixel structure in which a plurality of photoelectric conversion elements are arranged in a matrix, in order to correspond to an interlaced scanning system adopted in a normal television system. For example, as shown in FIG. 3, the photoelectric conversion elements 21 corresponding to the pixels of the first field and the photoelectric conversion elements 22 corresponding to the pixels of the second field are alternately arranged in the vertical direction, and a frame accumulation mode or The imaging charges obtained in the field storage mode are output line-sequentially.

In the frame accumulating mode, as shown in FIG. 4, the photoelectric conversion elements 21 and 22 in each field accumulate the image-capturing charges S _O and S _E for one frame period while being separated by one field period from each other. , The imaging charge S _O by the photoelectric conversion element 21 of the first field shown in FIG.
And the imaging charge S by the photoelectric conversion element 22 of the second field
During the vertical blanking period, _E is alternately read into the vertical transfer register 23 for each field and the horizontal transfer register 2 is read.
Output line-sequentially via 4. Further, in the field accumulation mode, as shown in FIG. 5, the photoelectric conversion elements 21 and 22 of each field accumulate the image-capturing charges S _O and S _E over one field period, respectively, and the first field shown in FIG. In the vertical transfer register 23, the image-capturing charge S _O by the photoelectric conversion element 21 and the image-capturing charge S _E by the photoelectric conversion element 22 in the second field are mixed in the vertical blanking period alternately in the vertical direction alternately. The data is read and output line-sequentially via the horizontal transfer register 24.

That is, in the solid-state image sensor operating in the frame accumulation mode, one frame period, that is, NT
SC system 1/30 seconds (PAL system 1/25
(2) is an exposure period (shutter speed), and an image pickup operation is performed in the field accumulation mode. In a solid-state image sensor, one field period, that is, 1/60 sec in the NTSC system (1/50 sec in the PAL system) Is performed as an exposure period (shutter speed).

Here, in the solid-state image sensor 20 shown in FIG. 3, the image pickup charges obtained by the photoelectric conversion elements 21 and 22 are transferred from the vertical transfer register 23 to the horizontal transfer register 2.
It has a structure in which line-sequential output is performed via 4, and is known as an interline transfer type solid-state image sensor. Further, conventionally, in addition to the above-mentioned interline transfer type solid-state image sensor, a vertical transfer register by a CCD, for example, is formed in the photoelectric conversion element portion, and a vertical transfer by the CCD is performed at the end side of this vertical transfer register. A frame transfer type CC, which is provided with an accumulating unit composed of a register, and outputs from this accumulating unit line-sequentially through a horizontal transfer register.
A D image sensor and a frame interline transfer type solid-state image sensor in which a storage unit is provided between a vertical transfer register and a horizontal transfer register in an interline transfer type solid-state image sensor are known.

Further, conventionally, in a solid-state image sensor such as a CCD image sensor, the effective charge accumulation period (exposure period) is controlled by discarding the imaging charges generated in the photoelectric conversion element to, for example, an overflow drain. An electronic shutter function based on the above is known. The electronic shutter function is realized by controlling the overflow drain potential with a voltage (shutter pulse) applied to the substrate.

[0007]

By the way, in the conventional solid-state image pickup device using the CCD image sensor having the electronic shutter function, when the exposure period is controlled by the electronic shutter function, the solid-state image pickup device operates in the field accumulation mode. In principle, the image sensor can control the exposure period only within one field period, and even if the solid-state image sensor operates in the frame accumulation mode, the shutter pulse is applied to the substrate. , The image pickup charges S _O and S _{E of} each field obtained by the photoelectric conversion element corresponding to the pixel of the first field and the photoelectric conversion element corresponding to the pixel of the second field are both discarded to the overflow drain, Even if the solid-state image sensor operates in the accumulation mode, Only within Rudo period there is a problem that it is impossible to control the exposure period.

Therefore, the present invention aims to solve the above-mentioned problems in the conventional solid-state image pickup device, and controls the exposure period within the range of 1 field period to 1 frame period by the electronic shutter function. A solid-state imaging device capable of performing an imaging operation.

[0009]

The present invention can be obtained by frame accumulation in the photoelectric conversion elements corresponding to the pixels of the first field and the photoelectric conversion elements corresponding to the pixels of the second field, which are arranged in a matrix. Solid-state imaging including a frame interline transfer type solid-state image sensor that transfers the imaging charges of each field to a storage unit via a vertical transfer register and outputs the imaging charges from the storage unit line-sequentially via a horizontal transfer register In the device, electronic shutter control is performed to discard the imaging charge obtained by the photoelectric conversion element to the overflow drain for each field, and the imaging charge of each field is alternately alternated for each field immediately before being discarded to the overflow drain by the electronic shutter control. Reads to the vertical transfer register of the image pickup unit Reads out an imaging charge accumulation period within one field are accumulated in the photoelectric conversion elements of each field by the electronic shutter control adds the imaging charges of one field read out earlier in the vertical transfer registers,
During the vertical blanking period, the imaging charges read by adding to the vertical transfer register of the image pickup unit are transferred at high speed from the vertical transfer register to the vertical transfer register of the storage unit,
A driving means for driving the frame interline transfer type solid-state image sensor is provided so that the imaging charges are output line-sequentially from the vertical transfer register of the storage section through the horizontal transfer register. Is.

[0010]

In the solid-state image pickup device according to the present invention, the electronic shutter control for discarding the image-pickup charge obtained by the photoelectric conversion element of the frame-interline-transfer type solid-state image sensor to the overflow drain for each field and the electronic shutter control described above Immediately before being discarded in the overflow drain, the image-capturing charges in each field are alternately read to the vertical transfer register of the image-capturing section for each field, and the accumulation period within one field is accumulated in the photoelectric conversion element of each field by the electronic shutter control. Image pickup charge of 1 field which is read out to the vertical transfer register and read out, and the image pickup charge read out by adding to the vertical transfer register of the image pickup unit is added to the vertical transfer period during the vertical blanking period. Vertical transfer of the above storage unit from the transfer register High speed transfer register, and sequentially outputs the line through the horizontal transfer register the imaging charge from the vertical transfer registers of the storage section.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the solid-state image pickup device according to the present invention will be described in detail below with reference to the drawings. The solid-state imaging device according to the present invention is configured, for example, as shown in FIG.

The solid-state image pickup device shown in FIG. 1 includes a CCD image sensor 10 driven by various timing signals generated by a timing signal generator 1.

The CCD image sensor 10 is a frame interline transfer type solid-state image sensor including an image pickup section 11, a storage section 12 and a horizontal transfer register 13.

The image pickup section 11 has a photoelectric conversion element 14 corresponding to the pixels of the first field arranged in a matrix.
And the photoelectric conversion element 15 corresponding to the pixel of the second field
And the vertical transfer register 18 having the number of transfer stages corresponding to the number of scanning lines for one field in which the imaging charges S _O and S _E obtained by the photoelectric conversion elements 14 and 15 are read out via the sensor gates 16 and 17, respectively. The photoelectric conversion elements 14 of the first field and the photoelectric conversion elements 15 of the second field are alternately arranged in the vertical direction. The storage unit 12 stores the image pickup charges of pixels for one field, and is configured by a vertical transfer register 19 having the same configuration as the vertical transfer register 18 of the image pickup unit 11. Further, the horizontal transfer register 13 has the number of transfer stages corresponding to the number of pixels in one line.

As shown in FIG. 2, the timing signal generator 1 also applies a shutter pulse P _SHT for electronic shutter control applied to the substrate of the CCD image sensor 10 and the image pickup of the CCD image sensor 10. First to open each sensor gate 16 and 17 of the part 11
And second sensor gate pulses SG _O , SG _E , a vertical transfer clock pulse φ _VIM for driving the vertical transfer register 18 of the image pickup unit 11, and a vertical transfer clock pulse φ _VST for driving the vertical transfer register 19 of the storage unit 12. , Various timing signals such as a horizontal transfer clock pulse φ _H for driving the horizontal transfer register 13 are generated.

The first sensor gate pulse SG _O for opening the sensor gate 16 of the first field is for each frame period in which the imaging charge S _O obtained by the photoelectric conversion element 14 corresponding to the pixel of the first field is to be read. It is generated during the vertical blanking period V _BLKO immediately before the video period and at the timing one horizontal scanning period (1H) before the shutter pulse P _SHT for controlling the electronic shutter of the second field. Further, the second sensor gate pulse SG _E for opening the sensor gate 17 of the second field is an image for each frame period in which the imaging charge S _E obtained by the photoelectric conversion element 14 corresponding to the pixel of the first field is to be read. It is generated during the vertical blanking period V _BLKE immediately before the period and is generated at the timing one horizontal scanning period (1H) before the shutter pulse P _SHT for electronic shutter control of the first field. That is, the first and second sensor gate pulses SG _O and SG _E are respectively 1
It is generated twice during the frame period.

The shutter pulse P _SHT for controlling the electronic shutter in the first field is within the range of 1 field period to 1 frame period before the first sensor gate pulse SG _{O in the} vertical blanking period V _BLKO . Is generated in. The shutter pulse P _SHT for electronic shutter control of the second field is generated within the second sensor gate pulse SG _E previous one field period to 1 frame period in the vertical blanking period V _BLKE It

Further, the vertical transfer clock pulse φ _VIM for driving the vertical transfer register 18 of the image pickup section 11 and the vertical transfer clock pulse φ _VST for driving the vertical transfer register 19 of the storage section 12 are generated in synchronization with each other. Therefore, as shown in FIG. 2, in the effective video periods T _O and T _E , a horizontal scanning period (1H) corresponding to the vertical pixel pitch of the CCD image sensor 10 is generated, and one field is generated. Output as a high-speed transfer pulse in the high-speed transfer period T _F provided immediately after the timing of the first and second sensor gate pulses SG _O and SG _E in the vertical blanking periods V _BLKO and V _BLKE for each period. To be done.

Further, the horizontal transfer clock pulse φ _H for driving the horizontal transfer register 13 is generated at a repeating cycle corresponding to the horizontal pixel pitch of the CCD image sensor 3.

Then, the CCD image sensor 10
Is the shutter pulse P _SHT generated by the timing signal generator 1 as described above, the first and second sensor gate pulses SG _O and SG _E , and the upper vertical transfer clock pulse φ.
_VIM, φ _VST, by various timing signals such as the horizontal transfer clock pulse phi _H, is driven as follows.

That is, the CCD image sensor 10
The imaging charges S _O and S _E generated by the photoelectric conversion elements 14 and 15 are discarded to the overflow drain each time the shutter pulse P _SHT is applied to the substrate substrate.

Then, the imaging charge S _O obtained by the photoelectric conversion element 14 corresponding to the pixel of the first field is the above described every time the sensor gate 16 of the first field is opened by the first sensor gate pulse SG _O. It is read to the vertical transfer register 18. In addition, the imaging charge S obtained by the photoelectric conversion element 15 corresponding to the pixel of the second field
_E is the second sensor gate pulse SG _E
Each time the field sensor gate 17 is opened, it is read to the vertical transfer register 18.

In the photoelectric conversion element 14 corresponding to the pixel in the first field, the image-capturing charge is discarded to the overflow drain by the shutter pulse P _SHT for controlling the electronic shutter in the first field, and the period T _{O1 is} about 1 field. The imaging charge S _O1 is accumulated over the _period . Then, the accumulated charge S _O1 in this period T _O1 is generated by the first sensor gate pulse SG _O 1H before the shutter pulse P _SHT for electronic shutter control of the second field by the vertical transfer register 1 described above.
8 is read. Further, in the photoelectric conversion element 14 corresponding to the pixel of the first field, the imaging charge is discarded to the overflow drain by the shutter pulse P _SHT for controlling the electronic shutter of the second field, and then the vertical blanking period V _BLKO is set. The imaging charge S _O2 is accumulated over the period T _O2 until the timing of the sensor gate pulse SG _O of the first field. Then, the accumulated charge S _O2 in this period T _O2 is read to the vertical transfer register 18 by the first sensor gate pulse SG _O 1H before the shutter pulse P _SHT for electronic shutter control in the second field. Thus, in the vertical transfer register 18, the period T _O1, T _O2 respective imaging charges accumulated in the S _O1, S _O2 is read out is added. That is, the vertical transfer register 18 _reads out the imaging charges S _O1 + S _O2 with T _O1 + T _O2 as the effective charge accumulation period T _EXP .

The imaging charges S _O1 + S _O2 read out to the vertical transfer register 18 are _supplied to the high speed transfer period T immediately after the timing of the first sensor gate pulse SG _{O in} the vertical blanking period V _BLKO. High-speed transfer is made from _F to the vertical transfer register 19 of the storage section 12 from the vertical transfer register 18 of the image pickup section 11.

Then, the vertical blanking period V _BLKO
In during video period T _O followed, the vertical transfer clock pulses phi _VIM of 1H period, the phi _VST by vertical transfer register 19 of the vertical transfer register 18 and the accumulator 12 of the imaging unit 11 is driven, the The image-capturing charge S _O of the first field in the vertical transfer register 19 of the storage section 12 is vertically transferred, and one horizontal scanning line at a time is obtained through the horizontal transfer register 13 driven by the horizontal transfer clock pulse φ _H. It is output line-sequentially.

Further, in the photoelectric conversion element 15 corresponding to the pixel in the second field, a period of about one field after the imaging charge is discarded to the overflow drain by the shutter pulse P _SHT for controlling the electronic shutter in the second field. The imaging charge S _E1 is accumulated over T _E1 . The accumulated charge S _E1 of the period T _E1 are read out to the vertical transfer register 18 by the first sensor gate pulse SG _E before 1H of the shutter pulse P _SHT for electronic shutter control of the first field. Further, in the photoelectric conversion element 15 corresponding to the pixel of the second field, the imaging charge is discarded in the overflow drain by the shutter pulse P _SHT for controlling the electronic shutter of the first field, and then the vertical blanking period V _BLKE is _reached . Period T until the timing of the sensor gate pulse SG _E of the second field
_The imaging charge S _O2 is accumulated over _E2 . Then, the accumulated charge S _E2 in this period T _E2 is read to the vertical transfer register 18 by the second sensor gate pulse SG _E 1H before the shutter pulse P _SHT for electronic shutter control in the first field. As a result, in the vertical transfer register 18, the imaging charges S _E1 and S _E1 accumulated in the periods T _E1 and T _E2 ,
S _E2 is added and read. That is, in the vertical transfer register 18, T _E1 + T _E2 is _added to the effective charge accumulation period T
_The imaging charge S _E1 + S _{E2 which} is _EXP is read.

The imaging charges S _E1 + S _E2 read out to the vertical transfer register 18 are _supplied to the high speed transfer period T immediately after the timing of the second sensor gate pulse SG _{E in} the vertical blanking period V _BLKE. High-speed transfer is made from _F to the vertical transfer register 19 of the storage section 12 from the vertical transfer register 18 of the image pickup section 11.

Then, the above vertical blanking period V _BLKO
In during video period T _O followed, the vertical transfer clock pulses phi _VIM of 1H period, the phi _VST by vertical transfer register 19 of the vertical transfer register 18 and the accumulator 12 of the imaging unit 11 is driven, the The image-capturing charge S _O of the second field in the vertical transfer register 19 of the storage section 12 is vertically transferred, and one horizontal scanning line at a time is obtained through the horizontal transfer register 13 driven by the horizontal transfer clock pulse φ _H. It is output line-sequentially.

As a result, the CCD image sensor 1 is
From 0, the imaging charge S _O1 + S _O2 / with the effective charge storage period T _EXP within the range of 1 field period to 1 frame period
S _E1 + S _E2 can be read alternately for each field, and the electronic shutter function controls the exposure period within the range of 1 field period to 1 frame period, and the image output that performs the image capturing operation by interlaced scanning Can be obtained.

[0030]

As described above, according to the present invention, the photoelectric conversion elements corresponding to the pixels of the first field and the photoelectric conversion elements corresponding to the pixels of the second field, which are arranged in a matrix, respectively accumulate the frames. A frame interline transfer type solid-state image sensor that transfers the imaging charges of each field obtained by the above to a storage unit via a vertical transfer register, and outputs the imaging charges line-sequentially from the storage unit via a horizontal transfer register. In a solid-state imaging device provided with the electronic shutter control, the imaging charge obtained by the photoelectric conversion element is discarded to the overflow drain for each field, and the imaging charge of each field is collected for each field immediately before being discarded to the overflow drain by the electronic shutter control. To the vertical transfer register of the imaging unit alternately The image pickup charge in the accumulation period within one field accumulated in the photoelectric conversion element of each field by the electronic shutter control is read out by adding the image pickup charge of one field previously read to the vertical transfer register to read the image pickup charge. Image pickup charges added to the vertical transfer register of the storage section are transferred at high speed from the vertical transfer register to the vertical transfer register of the storage section during the vertical blanking period, and the image pickup charge is transferred to the vertical transfer register of the storage section. Since the frame-interline-transfer type solid-state image sensor is driven so as to output the data line-sequentially through the horizontal transfer register, the exposure period is controlled by the electronic shutter function within the range of 1 field period to 1 frame period. Then, the imaging operation can be performed.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration example of a solid-state imaging device according to the present invention.

FIG. 2 is a timing chart showing the operation of the solid-state imaging device.

FIG. 3 is a block diagram showing a configuration of an interline transfer type CCD image sensor used in a conventional solid-state imaging device.

FIG. 4 is a waveform diagram for explaining an image pickup operation of the interline transfer CCD image sensor in a frame accumulation mode.

FIG. 5 is a waveform diagram for explaining an image pickup operation in a field storage mode of the interline transfer CCD image sensor.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Timing signal generator 10 ... CCD image sensor 11 ... Imaging part 12 ... Storage part 13 ... Horizontal transfer register 14 ... 1st field photoelectric conversion element 15 ... Second field photoelectric conversion element 18 ... Vertical transfer register

Claims (1)

[Claims] 1. Vertical transfer of image pickup charges of each field obtained by frame accumulation in a photoelectric conversion element corresponding to pixels of a first field and a photoelectric conversion element corresponding to pixels of a second field, which are arranged in a matrix. In a solid-state imaging device including a frame interline transfer type solid-state image sensor that transfers the imaging charges to the storage unit via a register and outputs the imaging charges from the storage unit in a line-sequential manner via a horizontal transfer register The electronic shutter control for discarding the captured image charge to the overflow drain for each field is performed, and the image capture charge for each field is alternately stored in the vertical transfer register of the image capturing unit for each field immediately before being discarded to the overflow drain by the electronic shutter control. Read out, electronic shutter control Further, the image pickup charges in the accumulation period within one field accumulated in the photoelectric conversion element of each field are read out by adding the image pickup charges of one field previously read to the vertical transfer register, and added to the vertical transfer register of the image pickup unit. The image-capturing charges thus read out are transferred at high speed from the vertical transfer register to the vertical transfer register of the storage section during the vertical blanking period, and the image-capturing charge is transferred from the vertical transfer register of the storage section to the horizontal transfer register. A solid-state image pickup device comprising drive means for driving the frame interline transfer type solid-state image sensor so as to output the image sequentially in line.