JPH0561659B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a microprogram control device for a computer controlled by a microprogram.

[Technical background of the invention]

The control memory devices in conventional microprogram control computers include a control memory that stores microprograms, and a WCS that is open to the user.
(Wratable Control Storage). Control memory is usually ROS (Read Only
However, in recent years, RAM has been used to make it easier to patch microprograms. control memory RAM
In this case, when the CPU is powered on, the microprogram is initially rotated from the floppy disk or EP-ROM to the RAM.

FIG. 1 is a block diagram showing an example of a conventional microprogram control device. Reference numeral 1 is a destination bus, and reference numeral 2 is a driver used to take in data from this bus 1. Reference numeral 3 is a control memory in which basic microprograms (microinstructions) are stored, and reference numeral 4 is a writable control memory (WCS) that is open to the user.
It is. Reference numeral 5 is a register (CDR) into which a microinstruction immediately before execution read from the control memory 3 or WCS 4 is loaded. Reference numeral 6 denotes an address control circuit that decodes the microinstruction and reads out the next microinstruction to be executed from the control memory 3 or WCS 4. Reference numeral 7 is an address register (WAR) that holds an address sent from the destination bus 1, and reference numeral 8 is a multiplexer that selects an address from the address register 7 or the address control circuit 6.

If the control memory 3 is not configured with ROS, microinstructions are sent to the control memory 3 from a floppy disk (not shown) or a separate ROM when the power is turned on.
will be forwarded to. Normal instructions (machine language) are executed by sequentially reading microinstructions stored in the control memory 3. The operation at this time is to transfer micro instructions from control memory 3 to register 5.
This is read out and decoded to control other circuits for executing instructions. A part of the microinstruction held in the register 5 is input to the address control circuit 6 as address information. Address control circuit 6
Now, output the address where the next microinstruction to be executed is stored to the control memory 3 or WCS,
Access control memory 3.

The write operation to WCS4 is performed as follows. That is, after loading the write address of the WCS 4 into the register 7 through the destination bus 1 and driver 2, the multiplexer 8 is switched to select the register 7 side. after that
Pass the data (microinstructions) to be written to WCS4 through destination bus 1 and driver 2.
The microinstruction is sent to the WCS 4 and the microinstruction is written to the WCS 4 according to the address specified from the register 7 through the multiplexer 8. The above operations are executed by microinstructions. At this time, the data transmitted by the destination bus 1 is mainly data from a main memory (not shown), and data transfer from the main memory to the WCS 4 is executed. Furthermore, when executing microinstructions on WCS4,
After setting the multiplexer 8 to the address control circuit 6 side and inhibiting the output of the control memory 3, the microinstruction in the WCS 4 is read out according to the address output from the address control circuit 6 through the multiplexer 8, and this is loaded into the register 5. be done.

In this way, in conventional microprogram control devices, only WCS4 can rewrite data using microinstructions themselves. Therefore, the contents of the control memory 3 have not been rewritten while the CPU is operating. For this reason, microprograms were patched by rewriting the contents of a floppy disk or EP-ROM.

[Problems with background technology]

As mentioned above, in conventional microprogram control devices, only WCS can rewrite the microprogram while the CPU is operating.
Since the microprogram of basic instructions stored in the control memory cannot be rewritten, it is not possible to easily patch microinstructions, and it is not possible to dynamically optimize microinstructions. It was hot.

[Purpose of the invention]

SUMMARY OF THE INVENTION In view of the above drawbacks, an object of the present invention is to provide a microprogram control device in which a microprogram can be rewritten by microinstructions themselves.

[Summary of the invention]

In the present invention, the microprogram control device includes:
A rewritable control memory in which a microprogram consisting of microinstructions is stored, a destination bus that becomes a data transfer path by executing the microinstructions in the control memory, and a destination bus connected to the destination bus, a buffer memory that temporarily holds microinstructions to be transferred to the control memory; a first register connected to the destination bus and in which an address for accessing the buffer memory is set;
a second register connected to the destination bus, in which a transfer destination address in the control memory of a microinstruction read from the buffer memory is set; a transfer control circuit that controls data transfer from the buffer memory to the control memory based on the number of transfer data loaded via the transfer bus; and a transfer control circuit that controls data transfer from the buffer memory to the control memory based on the number of transfer data loaded via the transfer bus; Select and apply to the control memory an address control circuit to output, the output of the second register when rewriting the contents of the control memory, and the output of the address control circuit when executing a microprogram in the control memory. be equipped with a multiplexer,
This aims to achieve the above objectives.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings, in which the same parts as those of the conventional example are given the same reference numerals. Second
The figure is a configuration diagram showing an embodiment of the microprogram control device of the present invention. Reference numeral 1 is a destination bus, and reference numeral 2 is a driver used to take in data from this bus 1. Reference numeral 3 is a rewritable control memory (RAM) in which microinstructions are stored, and reference numeral 5 is a register (CDR) into which the microinstruction immediately before execution output from the control memory 3 is loaded. Reference numeral 6 is an address control circuit for the control memory 3. Reference numeral 9 is a buffer memory for temporarily storing data to be transferred to the control memory 3 via the destination bus 1, and reference numeral 10 is a buffer memory activated by a microinstruction to control the transfer of the contents of the buffer memory 9 to the control memory 3. Further, reference numeral 11 is a register (AR) that holds a read/write address of the buffer memory 9. code 12
When data is transferred to control memory, control memory 3
A register (WAR) that holds the write address of
Reference numeral 13 reads the address from the register 12 from the control memory 3 when transferring data to the control memory 3, and when executing the microinstruction, selects an address from the address control circuit 6 and outputs it to the control memory 3. Multiplexer (MPX)
It is. Symbol 14 indicates the control memory 3 immediately after the power is turned on.
15 is a memory (ROS) that stores micro instructions (micro programs) to be transferred to
This is an initial transfer control circuit that controls ROS 14 and control memory 3 when transferring microinstructions from ROS 14 to control memory 3. Register 11 above is the first register, register 12
constitutes the second register.

Next, the operation of this embodiment will be explained. When the power is turned on, the initial transfer control circuit 15 controls the ROS14.
The microinstructions (microprograms) within are transferred to the control memory 3 and written in order. After this transfer is completed, the microinstructions in the control memory 3 are read out by the address control circuit 6 and loaded into the register 5, and the microinstructions are executed one after another. That is,
Execution of normal microinstructions is controlled by a loop of register 5, address control circuit 6, multiplexer 13, control memory 3, and register 5.

Next, rewriting of the control memory 3 will be explained.
To rewrite the microprogram in the control memory 3, data (microprogram) sent from the main memory (not shown) through the destination bus 1 is temporarily stored in the buffer memory 9 via the driver 2, and then the data (microprogram) is stored from the buffer memory 9. This is done by transferring the microprogram to the control memory 3. That is, in response to a microinstruction read from the control memory 3, the driver 2 determines the data storage destination address of the buffer memory 9 to be transferred via the destination bus 1.
After setting the data (microprogram) read from the main memory (not shown) to the register 11 through the destination bus 1 and the driver 2, data (microprogram) is sequentially stored into the buffer memory 9 through the destination bus 1 and the driver 2. After this data transfer is completed, the read start address of the buffer memory 9, the transfer destination start address of the control memory 3, and the number of transferred data are loaded into the register 11, the register 12, and the transfer control circuit 10, respectively. Next, the transfer control circuit 10 that controls data transfer from the buffer memory 9 to the control memory 3 is activated. When this activation occurs, the contents held in the register 5 become invalid, and the address control circuit 6 holds the address of the microinstruction to be executed next to the activated microinstruction. Transfer control circuit 10 reads data from the address of buffer memory 9 indicated by register 11 and writes this data to the address of control memory 3 indicated by register 12. The transfer control circuit 10 determines whether the number of data to be transferred has been transferred from the buffer memory 9 to the control memory 3 based on the number of previously loaded transfer data and the actual number of transfers counted by itself. If it is detected that the number of transfer data loaded earlier has not been transferred, registers 11 and 12 are controlled to update their contents to the next read address and transfer destination address, and further data transfer is performed. Read and line. In addition, the transfer control circuit 1
0 determines that the data transfer is complete when it is detected that data equal to the number of transferred data has been transferred from the buffer memory 9 to the control memory 3 based on the number of previously loaded transfer data and the actual number of transfers. do. When a predetermined amount of data has been transferred from the buffer memory 9 to the control memory 3, the multiplexer 13 is switched to take in the data from the address control circuit 6, and the address control circuit 6
The microinstruction in the control memory 3 is read out according to the read address sent from the control memory 3, and is loaded into the register 5. At this time, the contents of register 5 become valid, and the aforementioned microinstruction is executed.

〔Effect of the invention〕

According to the present invention, it is possible to rewrite the entire microprogram in the control memory using microinstructions, making it easy to patch microinstructions, and furthermore allowing the computer itself to dynamically change the microprogram. It is possible to easily optimize microinstructions. Furthermore, the control memory has an area where basic control data is stored and an area (WCS) where data that can be used freely by the user is stored, eliminating the boundary between the basic control data storage area and the WCS capacity. , it is possible to improve the usage efficiency of control memory.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a conventional microprogram control device, and FIG. 2 is a block diagram showing an embodiment of the microprogram control device of the present invention. 3... Control memory, 4, 11, 12... Register,
6...Address control circuit, 9...Buffer memory, 1
0... Transfer control circuit, 13... Multiplexer, 14
...Memory, 15...Initial transfer control circuit.

Claims (1)

[Scope of Claims] 1. A rewritable control memory in which a microprogram consisting of microinstructions is stored; a destination bus that becomes a data transfer path by executing the microinstructions in the control memory; a buffer memory connected to the destination bus and temporarily holding microinstructions to be transferred to the control memory; and a first register connected to the destination bus and having an address for accessing the buffer memory set. , a second register connected to the destination bus, in which a transfer destination address in the control memory of a microinstruction read from the buffer memory is set; a transfer control circuit that controls data transfer from the buffer memory to the control memory based on the number of transfer data loaded via the nation bus; and an address of a microinstruction to be read next from the control memory based on the microinstruction of the control memory. an address control circuit that outputs an address control circuit, and selects an output of the second register when rewriting the contents of the control memory, and selects an output of the address control circuit when executing a microprogram in the control memory, and sends the output to the control memory. A microprogram control device characterized in that it comprises a multiplexer for providing.