JPH0583890B2 - - Google Patents

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Publication number
JPH0583890B2
JPH0583890B2 JP59018036A JP1803684A JPH0583890B2 JP H0583890 B2 JPH0583890 B2 JP H0583890B2 JP 59018036 A JP59018036 A JP 59018036A JP 1803684 A JP1803684 A JP 1803684A JP H0583890 B2 JPH0583890 B2 JP H0583890B2
Authority
JP
Japan
Prior art keywords
voltage
signal
liquid crystal
electrodes
scanning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59018036A
Other languages
Japanese (ja)
Other versions
JPS60163020A (en
Inventor
Sadao Masubuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Watch Co Ltd
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP1803684A priority Critical patent/JPS60163020A/en
Publication of JPS60163020A publication Critical patent/JPS60163020A/en
Publication of JPH0583890B2 publication Critical patent/JPH0583890B2/ja
Granted legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Liquid Crystal Display Device Control (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、非線形素子と液晶光スイツチで構成
される液晶表示装置に関するもので、特に駆動方
式に係るものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a liquid crystal display device composed of a nonlinear element and a liquid crystal optical switch, and particularly relates to a driving method.

画素を2次元的に配列した、マトリクス型液晶
表示パネルの画素ごとに、2端子素子を設けた2
端子型アクテイブマトリクス方式は、製造プロセ
スが簡単であり、低コスト高品質表示装置として
有望である。
A 2-terminal element is provided for each pixel of a matrix type liquid crystal display panel in which pixels are arranged two-dimensionally.
The terminal type active matrix method has a simple manufacturing process and is promising as a low-cost, high-quality display device.

〔従来技術と問題点〕[Conventional technology and problems]

第1図に従来の2端子型アクテイブマトリクス
液晶表示装置の構成を示す。1は入力信号、2は
制御部で、走査電極駆動部4および信号電極駆動
部3に入力信号に従つて制御信号を送出する。5
は走査電極、6は信号電極である。走査電極と信
号電極の各交点に非線形素子7と液晶素子8を配
設する。非線形素子7は、第2図に示すような非
線形の電圧−電流特性11,12を有する素子で
9は電圧軸、10は電流軸を示す。該素子はpn
接合ダイオード、金属−絶縁体−金属ダイオード
等で形成される。
FIG. 1 shows the configuration of a conventional two-terminal active matrix liquid crystal display device. Reference numeral 1 denotes an input signal, and 2 a control section, which sends a control signal to the scanning electrode drive section 4 and the signal electrode drive section 3 in accordance with the input signal. 5
6 is a scanning electrode, and 6 is a signal electrode. A nonlinear element 7 and a liquid crystal element 8 are arranged at each intersection of the scanning electrode and the signal electrode. The nonlinear element 7 is an element having nonlinear voltage-current characteristics 11 and 12 as shown in FIG. 2, where 9 indicates a voltage axis and 10 indicates a current axis. The element is pn
It is formed by a junction diode, a metal-insulator-metal diode, etc.

従来の駆動波形を第3図に示す。実線241が
走査電極電圧波形、点線241が信号電極電圧波
形である。駆動は正選択期間16、負選択期間1
8、正バイアス期間17、負バイアス期間19で
構成される。20は正選択電圧、21は正バイア
ス電圧、22は負選択電圧、23は負バイアス電
圧である。24の信号電極電圧波形は、オフ電圧
25またはオン電圧26または両者の中間の電圧
で構成される。
A conventional drive waveform is shown in FIG. A solid line 241 is a scanning electrode voltage waveform, and a dotted line 241 is a signal electrode voltage waveform. Drive is positive selection period 16, negative selection period 1
8, a positive bias period 17 and a negative bias period 19. 20 is a positive selection voltage, 21 is a positive bias voltage, 22 is a negative selection voltage, and 23 is a negative bias voltage. The signal electrode voltage waveform 24 is composed of an off voltage 25, an on voltage 26, or an intermediate voltage between the two.

表示動作は以下のとうりである。正選択期間1
6で第2図の15に対応する電圧が、非線形素子
7に印加され、非線形素子が低抵抗化して、液晶
素子に表示内容に依存した正電荷が蓄積される。
続く正バイアス期間17では、非線形素子7に第
2図の13−14間に対応する電圧が印加され、
非線形素子が高抵抗化して、液晶素子の正電荷の
流出を防止する。次の負選択期間18で第2図の
16に対応する電圧が、非線形素子に印加され、
液晶素子に表示内容に依存した負電荷が蓄積され
る。続く負バイアス期間23では、正バイアス期
間と同様に、非線形素子7には、第2図の13−
14間に対応する電圧が印加され、液晶素子の負
電荷を保持する。正選択期間と負選択期間で、互
いに逆符号の電荷を液晶素子に注入して交流駆動
化し、選択期間以外では液晶素子の電荷を保持さ
せることにより、液晶素子のスタチツク駆動並み
の表示特性を保証する。
The display operation is as follows. Positive selection period 1
At 6, a voltage corresponding to 15 in FIG. 2 is applied to the nonlinear element 7, the resistance of the nonlinear element is reduced, and positive charges depending on the display content are accumulated in the liquid crystal element.
In the subsequent positive bias period 17, a voltage corresponding to 13-14 in FIG. 2 is applied to the nonlinear element 7,
The nonlinear element has a high resistance and prevents positive charges from flowing out of the liquid crystal element. In the next negative selection period 18, a voltage corresponding to 16 in FIG. 2 is applied to the nonlinear element,
Negative charges depending on the displayed content are accumulated in the liquid crystal element. In the subsequent negative bias period 23, as in the positive bias period, the nonlinear element 7 has a voltage 13- in FIG.
A corresponding voltage is applied between 14 and 14 to maintain the negative charge of the liquid crystal element. During the positive selection period and negative selection period, charges of opposite signs are injected into the liquid crystal element to create AC drive, and by holding the charge in the liquid crystal element during periods other than the selection period, display characteristics comparable to static drive of the liquid crystal element are guaranteed. do.

第3図で示した従来の駆動波形の欠点は電圧振
幅が大きい事である。非線形素子としてタンタル
−五酸化タンタル−クロム構成のMiMダイオー
ドを用いた場合、正選択期間20は10ボルト、負
選択電圧22は−10ボルトである。走査電極電圧
振幅は10−(−10)=20ボルトとなり、通常のicの
耐圧15ボルトを越えてしまい、高コストでチツプ
面積の大きな高耐圧icを用いる必要があつた。
A drawback of the conventional drive waveform shown in FIG. 3 is that the voltage amplitude is large. When a MiM diode with a tantalum-tantalum pentoxide-chromium configuration is used as the nonlinear element, the positive selection period 20 is 10 volts and the negative selection voltage 22 is -10 volts. The scan electrode voltage amplitude was 10 - (-10) = 20 volts, which exceeded the 15 volt breakdown voltage of normal ICs, necessitating the use of high-cost, high-voltage ICs with large chip areas.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、上記電圧振幅を低減化するこ
とにより、小型、低コストの液晶表示装置を提供
することである。
An object of the present invention is to provide a small, low-cost liquid crystal display device by reducing the voltage amplitude.

〔発明の構成〕[Structure of the invention]

本発明においては、走査電極電圧波形と信号電
極電圧波形を同時に電位変動させることにより、
駆動電圧振幅の低減化を行なう。
In the present invention, by simultaneously varying the potential of the scanning electrode voltage waveform and the signal electrode voltage waveform,
Reduce the drive voltage amplitude.

〔発明の実施例〕[Embodiments of the invention]

(実施例 1) 本発明の駆動波形を第4図に示す。実線は走査
電極電圧波形、点線が信号電極電圧波形である。
30は同期信号であり、TV表示の場合には垂直
同期信号である。27は走査電極5−1,28は
走査電極5−2,29は走査電極5−Nに印加す
る波形である。第4図のハツチ部分(311,3
12,313,331,332,333など)が
走査電極選択期間である。一定時間毎に順次選択
電極が変化する。TV表示の場合には水平同期信
号に対応した時間毎である。311は正選択電
圧、32は正バイアス電圧、331は負選択電
圧、34は負バイアス電圧、39は負帰線区間電
圧、40は正帰線区間電圧である。35,37は
信号電極のオフ電圧、36,38は信号電極のオ
ン電圧である。41,42は信号電極の帰線区間
電圧である。
(Example 1) FIG. 4 shows the drive waveform of the present invention. The solid line is the scanning electrode voltage waveform, and the dotted line is the signal electrode voltage waveform.
30 is a synchronization signal, which is a vertical synchronization signal in the case of TV display. 27 is a waveform applied to the scan electrode 5-1, 28 is a waveform applied to the scan electrode 5-2, and 29 is a waveform applied to the scan electrode 5-N. The hatch part in Figure 4 (311, 3
12, 313, 331, 332, 333, etc.) is the scan electrode selection period. The selection electrode changes sequentially at fixed time intervals. In the case of TV display, it is every time corresponding to the horizontal synchronization signal. 311 is a positive selection voltage, 32 is a positive bias voltage, 331 is a negative selection voltage, 34 is a negative bias voltage, 39 is a negative retrace interval voltage, and 40 is a positive retrace interval voltage. 35 and 37 are off voltages of the signal electrodes, and 36 and 38 are on voltages of the signal electrodes. 41 and 42 are retrace section voltages of the signal electrodes.

各電圧レベルは以下のとうりである。液晶素子
8のしきい値電圧をVT、飽和電圧をVSとする。
39,331を零レベルとする。36はほぼVT
35はほぼVS、32はVS+VTである。311,
40の電圧レベルをVMとすると、38はVM
VT、37はVM−VS、34はVM−(VS+VT)であ
る。典型的な数値は、液晶素子8がゲスト−ホス
ト型の場合VT=1ボルト、VS=4ボルトである。
VMは典型的なMiM素子を用いた場合VM=10ボル
トである。41は35と36間の電圧、42は3
7と38間の電圧が望ましい。
Each voltage level is as follows. Let V T be the threshold voltage of the liquid crystal element 8, and V S be the saturation voltage.
Let 39,331 be the zero level. 36 is almost V T ,
35 is approximately V S and 32 is V S +V T . 311,
If the voltage level of 40 is V M , then 38 is V M
V T , 37 is V M −V S , and 34 is V M −(V S +V T ). Typical values are V T =1 volt and V S =4 volt if the liquid crystal element 8 is of the guest-host type.
V M is V M =10 volts using a typical MiM device. 41 is the voltage between 35 and 36, 42 is 3
A voltage between 7 and 38 is desirable.

本実施例の特徴は一定時間毎に(TV表示の場
合には、垂直同期信号ごと)、走査電極電圧と信
号電極電圧をほぼ同時に、両者の電圧差をほぼ保
つて変動することである。本実施例では、駆動に
必要な電圧振幅は、従来の約1/2である。
The feature of this embodiment is that the scan electrode voltage and the signal electrode voltage are changed at regular intervals (in the case of TV display, every vertical synchronization signal) almost simultaneously, while maintaining almost the voltage difference between the two. In this embodiment, the voltage amplitude required for driving is approximately 1/2 that of the conventional one.

(実施例 2) 本発明の駆動波形を第5図に示す。68,69
は同期信号であり、TV表示の場合には、68は
垂直同期信号、69は水平同期信号である。電圧
波形43,44,45の実線431は走査電極5
−1,5−2,5−Nに印加する走査電極電圧波
形である。43,44,45の点線は信号電極電
圧波形である。短点線がオフ電圧、長点線がオン
電圧である。右さがりハツチ部分101および左
さがりハツチ部分102が走査電極選択期間であ
る。一定時間毎に順次選択電極が移動する。TV
表示の場合には水平同期信号に対応した時間毎で
ある。左さがりハツチ部分は、液晶素子8に正電
荷を充電する正選択期間である。右さがりハツチ
部分は、液晶素子8に負電荷を充電する負選択期
間である。正選択期間から負選択期間の間の期間
は正バイアス期間である。
(Example 2) The drive waveform of the present invention is shown in FIG. 68, 69
is a synchronization signal; in the case of TV display, 68 is a vertical synchronization signal, and 69 is a horizontal synchronization signal. A solid line 431 of the voltage waveforms 43, 44, 45 indicates the scanning electrode 5.
-1, 5-2, 5-N scanning electrode voltage waveforms. Dotted lines 43, 44, and 45 are signal electrode voltage waveforms. The short dotted line is the off voltage, and the long dotted line is the on voltage. The rightward hatching portion 101 and the leftward hatching portion 102 are scanning electrode selection periods. The selection electrodes are sequentially moved at regular intervals. TV
In the case of display, it is for each time corresponding to the horizontal synchronization signal. The left hatched portion is a positive selection period in which the liquid crystal element 8 is charged with positive charges. The rightward hatched portion is a negative selection period in which the liquid crystal element 8 is charged with negative charge. The period between the positive selection period and the negative selection period is a positive bias period.

また負選択期間から正選択期間の間の期間は負
バイアス期間である。クロスハツチ部分は帰線区
間である。本実施例の特徴は選択電極が移動する
ごとに、正選択状態と負選択状態を交互にとるこ
とにより、信号電極電圧レベルを平均化し、クロ
ストークを減少し、かつ選択電極が移動するごと
に、走査電極電圧と信号電極電圧を、両者の差を
ほぼ保つて、同時に変動し、駆動電圧低減化を計
る。
Further, the period between the negative selection period and the positive selection period is a negative bias period. The crosshatch area is the retrace section. The feature of this embodiment is that each time the selection electrode moves, it alternates between a positive selection state and a negative selection state, thereby averaging the signal electrode voltage level and reducing crosstalk. , the scanning electrode voltage and the signal electrode voltage are varied simultaneously while maintaining almost the difference between the two, thereby reducing the driving voltage.

46は正選択電圧、47,48は正バイアス電
圧、49は負選択電圧、50,51は負バイアス
電圧である。55,57は信号電極のオフ電圧、
54,56は信号電極のオン電圧である。階調表
示の場合は、オフ電圧とオン電圧の間の電圧を表
示内容に依存して信号電極に印加する。60,6
1,62,63,64,65,66,67は帰線
期間での走査電極電圧である。52,53,5
8,59は帰線期間での信号電極電圧である。電
圧レベルとしては各番号の電圧が60=49,6
1=51,62=46,63=48,64=4
8,65=46,66=51,67=49である
ことが望ましい。電圧52,59は電圧54と5
5の間の電圧レベル、電圧53,58は56と5
7の間の電圧レベルが望ましい。各電圧値は実施
例1と同様である。本実施例でも実施例1と同様
に、駆動に必要な電圧振幅は従来の約1/2である。
46 is a positive selection voltage, 47 and 48 are positive bias voltages, 49 is a negative selection voltage, and 50 and 51 are negative bias voltages. 55, 57 are the off voltages of the signal electrodes,
54 and 56 are on-voltages of the signal electrodes. In the case of gradation display, a voltage between an off voltage and an on voltage is applied to the signal electrodes depending on the display content. 60,6
1, 62, 63, 64, 65, 66, and 67 are scan electrode voltages during the retrace period. 52,53,5
8 and 59 are signal electrode voltages during the retrace period. As for the voltage level, the voltage of each number is 60 = 49,6
1=51, 62=46, 63=48, 64=4
It is desirable that 8,65=46,66=51,67=49. Voltages 52 and 59 are voltages 54 and 5
Voltage level between 5, voltage 53, 58 is 56 and 5
Voltage levels between 7 and 7 are desirable. Each voltage value is the same as in Example 1. In this embodiment, as in the first embodiment, the voltage amplitude required for driving is approximately 1/2 that of the conventional one.

〔発明の効果〕〔Effect of the invention〕

以上述べたように、本発明では走査電極電圧と
信号電極電圧を、ほぼ同時に、両者の電圧差をほ
ぼ保つて変動することにより、表示パネルの駆動
電圧振幅を従来の約1/2とし、通常のic耐圧で充
分とした。その結果、高コストで、チツプ面積の
大きな高耐圧icが不要な、小型、低コストな液晶
表示装置を提供する。
As described above, in the present invention, by changing the scan electrode voltage and the signal electrode voltage almost simultaneously while maintaining the voltage difference between the two, the drive voltage amplitude of the display panel can be reduced to about half that of the conventional one. The IC withstand voltage was sufficient. As a result, a small, low-cost liquid crystal display device that does not require a high-cost, high-voltage IC with a large chip area is provided.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は液晶表示装置の構成を示す回路図。第
2図はMiMダイオードの電圧−電流特性図。第
3図は従来の駆動波形図。第4図、第5図は本発
明による駆動波形図。 7……非線形素子、8……液晶素子。
FIG. 1 is a circuit diagram showing the configuration of a liquid crystal display device. Figure 2 is a voltage-current characteristic diagram of the MiM diode. FIG. 3 is a conventional drive waveform diagram. 4 and 5 are drive waveform diagrams according to the present invention. 7...Nonlinear element, 8...Liquid crystal element.

Claims (1)

【特許請求の範囲】 1 複数の走査電極、該走査電極にほぼ直交する
複数の信号電極、両電極の交点毎に配設した非線
形素子と液晶素子の直列回路で両電極を交点毎に
結合したパネルを、正電荷が充電される液晶素子
に対応する走査電極を第1の一定時間毎に順次選
択する正選択期間駆動波形、該正選択期間に続
く、走査電極電圧が信号電極のオン電圧とオフ電
圧の2つの電圧の中間値より大なる値である正バ
イアス期間駆動波形、負電荷が充電される液晶素
子に対応する走査電極を第1の一定時間毎に順次
選択する負選択期間駆動波形、負選択期間に続
く、前記走査電極電圧が信号電極のオン電圧とオ
フ電圧の2つの電圧の中間値より小なる値である
負バイアス期間駆動波形およびすべての走査電
極、信号電極に共通に第2の一定時間毎に設定さ
れる帰線期間駆動波形で構成される駆動波形で駆
動する液晶表示装置において、第3の一定時間毎
に走査電極電圧と信号電極電圧を、ほぼ同時に、
両者の電圧差をほぼ保つて変動させることを特徴
とする液晶表示装置。 2 第1の一定時間がTV信号の水平走査時間の
整数倍、第2および第3の一定時間がTV信号の
垂直走査時間であることを特徴とする特許請求の
範囲第1項記載の液晶表示装置。 3 第1の一定時間がTV信号の水平走査時間の
整数倍、第2の一定時間がTV信号の垂直走査時
間、第3の一定時間が第1の一定時間の整数倍で
あることを特徴とする特許請求の範囲第1項記載
の液晶表示装置。
[Scope of Claims] 1. A plurality of scanning electrodes, a plurality of signal electrodes substantially perpendicular to the scanning electrodes, and a series circuit of a nonlinear element and a liquid crystal element arranged at each intersection of both electrodes, and the two electrodes are coupled at each intersection. A positive selection period driving waveform that sequentially selects the scanning electrodes corresponding to the liquid crystal elements to be charged with positive charge at a first constant time interval, and following the positive selection period, the scanning electrode voltage is equal to the ON voltage of the signal electrode. a positive bias period drive waveform having a value greater than the intermediate value of two off-voltages; and a negative selection period drive waveform that sequentially selects scan electrodes corresponding to liquid crystal elements charged with negative charges at first fixed time intervals. , following the negative selection period, a negative bias period drive waveform in which the scan electrode voltage is smaller than the intermediate value of the two voltages of the on voltage and off voltage of the signal electrode, and a negative bias period common to all scan electrodes and signal electrodes. In a liquid crystal display device driven by a drive waveform consisting of a retrace period drive waveform set at every second constant time, the scanning electrode voltage and the signal electrode voltage are applied almost simultaneously at every third constant time.
A liquid crystal display device characterized in that the voltage difference between the two is substantially maintained and varied. 2. The liquid crystal display according to claim 1, wherein the first fixed time is an integral multiple of the horizontal scanning time of the TV signal, and the second and third fixed times are the vertical scanning time of the TV signal. Device. 3. The first fixed time is an integral multiple of the horizontal scanning time of the TV signal, the second fixed time is the vertical scanning time of the TV signal, and the third fixed time is an integral multiple of the first fixed time. A liquid crystal display device according to claim 1.
JP1803684A 1984-02-03 1984-02-03 Liquid crystal display device Granted JPS60163020A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1803684A JPS60163020A (en) 1984-02-03 1984-02-03 Liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1803684A JPS60163020A (en) 1984-02-03 1984-02-03 Liquid crystal display device

Publications (2)

Publication Number Publication Date
JPS60163020A JPS60163020A (en) 1985-08-24
JPH0583890B2 true JPH0583890B2 (en) 1993-11-30

Family

ID=11960441

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1803684A Granted JPS60163020A (en) 1984-02-03 1984-02-03 Liquid crystal display device

Country Status (1)

Country Link
JP (1) JPS60163020A (en)

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JP3437448B2 (en) * 1998-06-09 2003-08-18 株式会社ユアサコーポレーション Sealed battery separator
JP2002216566A (en) 2001-01-22 2002-08-02 Sony Corp Submersion electric switch and method of manufacturing the same

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JPS5891499A (en) * 1981-11-26 1983-05-31 セイコーエプソン株式会社 Driving system of liquid crystal display
JPS58106595A (en) * 1981-12-21 1983-06-24 セイコーエプソン株式会社 Scale display signal waveform
JPS58181088A (en) * 1982-04-19 1983-10-22 セイコーエプソン株式会社 Driving of liquid crystal electrooptic apparatus
JPS5917782A (en) * 1982-07-20 1984-01-30 Seiko Epson Corp LCD display type receiver
JPS59107328A (en) * 1982-12-13 1984-06-21 Seiko Epson Corp Driving method of liquid crystal display type image receiver
JP3371431B2 (en) * 1991-09-10 2003-01-27 株式会社デンソー Fatigue recovery device

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