JPH06310309A - Chip-type variable resistor - Google Patents
Chip-type variable resistorInfo
- Publication number
- JPH06310309A JPH06310309A JP9974793A JP9974793A JPH06310309A JP H06310309 A JPH06310309 A JP H06310309A JP 9974793 A JP9974793 A JP 9974793A JP 9974793 A JP9974793 A JP 9974793A JP H06310309 A JPH06310309 A JP H06310309A
- Authority
- JP
- Japan
- Prior art keywords
- resistance film
- resistance
- electrode terminals
- electrically connected
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Adjustable Resistors (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、抵抗値を任意に調節で
きるように構成したチップ型の可変抵抗器の改良に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a chip type variable resistor constructed so that its resistance value can be adjusted arbitrarily.
【0002】[0002]
【従来の技術】一般に、この種のチップ型可変抵抗器
は、例えば、実開昭58−44805号等に記載され、
且つ、図11及び図12に示すように、絶縁基板1の上
面に、円弧状の抵抗膜2を、当該抵抗膜2の両端が前記
絶縁基板1の一側面における一対の接続用電極端子3,
4に電気的に接続するように形成し、この円弧状抵抗膜
2に対して、前記絶縁基板1に回転可能に枢着した摺動
子5を、摺動自在に接触することにより、この摺動子5
における適宜回転角度θ′の範囲内での回転により、前
記両接続用電極端子3,4のうち一方の電極端子と、当
該摺動子5に電気的に接続する中間端子6との間におけ
る抵抗値を、r1′からr2′の範囲について調節する
ように構成している。2. Description of the Related Art Generally, a chip type variable resistor of this type is described in, for example, Japanese Utility Model Laid-Open No. 58-44805.
In addition, as shown in FIGS. 11 and 12, an arc-shaped resistance film 2 is provided on the upper surface of the insulating substrate 1, and both ends of the resistance film 2 have a pair of connection electrode terminals 3 on one side surface of the insulating substrate 1.
4 is formed so as to be electrically connected to the arc-shaped resistance film 2, and a slider 5 rotatably pivotally attached to the insulating substrate 1 is slidably contacted with the arc-shaped resistance film 2 so that the slider 5 is slidable. Pendulum 5
By rotating within the range of the appropriate rotation angle θ ′ in FIG. 1, the resistance between one of the connection electrode terminals 3 and 4 and the intermediate terminal 6 electrically connected to the slider 5 is increased. The values are arranged to be adjusted over the range r1 'to r2'.
【0003】[0003]
【発明が解決しようとする課題】しかし、この従来のチ
ップ型可変抵抗器においては、両接続用電極端子3,4
の間における円弧状抵抗膜2における幅寸法及び厚さ寸
法を、当該抵抗膜2の長さ方向の全長にわたって略一様
な寸法に構成しているから、前記両接続用電極端子3,
4のうち一方の電極端子と中間端子6との間における抵
抗値の可変特性は、図13に示すように、抵抗値零の点
と、前記両接続用電極端子3,4の相互間における公称
全抵抗値Rとの間を結ぶ大きい傾斜角度の略一直線にな
るのである。However, in this conventional chip-type variable resistor, both connection electrode terminals 3 and 4 are used.
Since the width dimension and the thickness dimension of the arc-shaped resistance film 2 between the two are configured to be substantially uniform over the entire length of the resistance film 2 in the length direction, the both connection electrode terminals 3, 3.
13, the variable characteristic of the resistance value between one of the electrode terminals and the intermediate terminal 6 is, as shown in FIG. 13, the point of zero resistance value and the nominal value between the two connection electrode terminals 3 and 4. That is, a straight line with a large inclination angle connecting the total resistance value R is formed.
【0004】すなわち、従来のチップ型可変抵抗器にお
ける抵抗値の可変特性は、図13に示すように、比較的
大きく傾斜する略一直線であることにより、摺動子5に
おける単位回転角度δθによる抵抗値の変化値δr′が
大きく、換言すると、摺動子5の回転角度に対する抵抗
値の変化割合が大きいから、前記両接続用電極端子3,
4のうち一方の電極端子と中間端子6との間における抵
抗値を、微細に、且つ、精密に調節することができない
と言う問題があった。That is, as shown in FIG. 13, the variable characteristic of the resistance value in the conventional chip-type variable resistor is a substantially straight line that is relatively inclined, so that the resistance by the unit rotation angle δθ of the slider 5 is increased. Since the change value δr ′ of the value is large, in other words, the change rate of the resistance value with respect to the rotation angle of the slider 5 is large, the both connecting electrode terminals 3,
There is a problem that the resistance value between one of the electrode terminals of No. 4 and the intermediate terminal 6 cannot be finely and precisely adjusted.
【0005】本発明は、この問題を解消し、抵抗値を、
微細に、且つ、精密に調節できるようにした可変抵抗器
を提供することを技術的課題とするものである。The present invention solves this problem and reduces the resistance value to
It is a technical object to provide a variable resistor that can be finely and precisely adjusted.
【0006】[0006]
【課題を解決するための手段】この技術的課題を達成す
るため本発明は、絶縁基板に、円弧状の抵抗膜を当該抵
抗膜の両端が前記絶縁基板に設けた両接続用電極端子に
各々電気的に接続するように形成すると共に、中間端子
に電気的に接続する摺動子を前記抵抗膜に対して摺動自
在に接触するように回転可能に装着して成るチップ型可
変抵抗器において、前記円弧状抵抗膜を、両端が前記両
接続用電極端子に対して電気的に接続するようにした第
1の抵抗膜と、両端が前記両接続用電極端子に対して電
気的に接続しないようにした第2の抵抗膜との二層構造
にすると言う構成にした。In order to achieve this technical object, the present invention provides an insulating substrate with arc-shaped resistance films at both ends of the resistance film on both connection electrode terminals provided on the insulation substrate. In a chip type variable resistor formed so as to be electrically connected and rotatably mounted so that a slider electrically connected to an intermediate terminal is slidably in contact with the resistance film. , A first resistance film whose both ends are electrically connected to both the connecting electrode terminals, and both ends are not electrically connected to the both connecting electrode terminals A two-layer structure with the second resistance film thus formed is adopted.
【0007】[0007]
【作 用】このように、円弧状抵抗膜を、両端が両接
続用電極端子に対して電気的に接続するようにした第1
の抵抗膜と、両端が両接続用電極端子に対して電気的に
接続しないようにした第2の抵抗膜との二層構造にする
ことにより、この二層構造の部分における単位長さ当た
りの抵抗値を、小さくすることができる一方、前記第1
の抵抗膜のうち第2の抵抗膜との二層構造になっていな
い部分における抵抗値を大きくすることができる。[Operation] In this way, the arc-shaped resistance film is configured so that both ends thereof are electrically connected to both connection electrode terminals.
By using a two-layer structure of a resistance film of No. 2 and a second resistance film of which both ends are not electrically connected to both connection electrode terminals, While the resistance value can be reduced, the first
It is possible to increase the resistance value of the portion of the resistance film of No. 2 which does not have a two-layer structure with the second resistance film.
【0008】その結果、両接続用電極端子のうち一方の
電極端子と中間端子との間における抵抗値の可変特性の
傾きを、緩やかに、換言すると、摺動子の回転角度に対
する抵抗値の変化割合を小さくことができるものであり
ながら、前記両接続用電極端子の相互間における抵抗値
を、第1の抵抗膜のうち二層構造になっていない部分に
おける抵抗値によって所定の公称全抵抗値にすることが
できるのである。As a result, the slope of the variable characteristic of the resistance value between one of the connecting electrode terminals and the intermediate terminal is made gentle, in other words, the change of the resistance value with respect to the rotation angle of the slider. Although the ratio can be reduced, the resistance value between the two connection electrode terminals is determined by the resistance value in a portion of the first resistance film that does not have a two-layer structure to have a predetermined nominal total resistance value. It can be
【0009】[0009]
【発明の効果】従って、本発明によると、チップ型可変
抵抗器における抵抗値を、当該チップ型可変抵抗器にお
ける公称全抵抗値を所定値に確保したままで、高い精度
で微細に調節することができる効果を有する。特に、前
記絶縁基板に、抵抗膜のうち二層構造の部分における両
端の各々に対して電気的に接続する補助導体パターンを
設けることにより、前記二層構造の部分における抵抗
値、及び第1の抵抗膜のうち第2の抵抗膜との二層構造
になっていない部分における抵抗値を、この両補助導体
パターン及び両接続用電極端子に対して抵抗値測定用の
プローブを接触することで、それぞれ容易に、且つ、確
実に測定することができるから、チップ型可変抵抗器の
製造工程中において、前記各抵抗値が、その各々におけ
る所定値内に入っているか否かの検査を、至極簡単に行
うことができるのである。Therefore, according to the present invention, the resistance value of the chip type variable resistor can be finely adjusted with high accuracy while keeping the nominal total resistance value of the chip type variable resistor at a predetermined value. It has the effect that In particular, by providing the insulating substrate with auxiliary conductor patterns that are electrically connected to both ends of the resistance film in the two-layer structure portion, the resistance value in the two-layer structure portion and The resistance value of a portion of the resistance film that does not form a two-layer structure with the second resistance film is brought into contact with both auxiliary conductor patterns and both connection electrode terminals by a probe for resistance value measurement, Since each can be measured easily and surely, during the manufacturing process of the chip type variable resistor, it is extremely easy to inspect whether or not each of the resistance values is within the predetermined value for each. It can be done.
【0010】[0010]
【実施例】以下、本発明の実施例を、図1〜図10の図
面について説明する。図1〜図3は、第1の実施例を示
すもので、この図において符号11は、チップ型に形成
したセラミック製の絶縁基板を示し、この絶縁基板11
の上面には、抵抗膜12が、当該絶縁基板11の略中心
に穿設した貫通孔11aを中心とする円弧状に形成さ
れ、また、前記絶縁基板における一側面には、前記円弧
状抵抗膜12の両端に対する接続用電極端子13,14
が形成されている。Embodiments of the present invention will be described below with reference to the drawings of FIGS. 1 to 3 show the first embodiment, in which reference numeral 11 denotes a ceramic insulating substrate formed in a chip type.
A resistance film 12 is formed on the upper surface of the insulating substrate 11 in an arc shape centered on a through hole 11a formed substantially in the center of the insulation substrate 11, and on one side surface of the insulation substrate, the arc resistance film 12 is formed. Electrode terminals 13 and 14 for connection to both ends of 12
Are formed.
【0011】なお、この両接続用電極端子13,14
は、上面電極13a,14aと、下面電極13b,14
bと、側面電極13c,14cとによって構成されてい
る。符号16は、前記絶縁基板11の下面側に配設した
金属板製の中間端子を示し、この中間端子16には、前
記絶縁基板11における貫通孔11a内に嵌まる中空軸
16aが一体的に造形されている。The electrode terminals 13 and 14 for both connections are
Is the upper surface electrodes 13a, 14a and the lower surface electrodes 13b, 14
b and side electrodes 13c and 14c. Reference numeral 16 denotes an intermediate terminal made of a metal plate arranged on the lower surface side of the insulating substrate 11. The intermediate terminal 16 is integrally formed with a hollow shaft 16a fitted in the through hole 11a of the insulating substrate 11. It is shaped.
【0012】また、符号15は、前記絶縁基板11の上
面側に配設した金属板製の摺動子を示し、この摺動子1
5は、これを前記中空軸16aの上端に対して回転自在
に被嵌したのち、中空軸16aの上端をかしめ広げるこ
とによって、絶縁基板11に対して回転可能に取付けら
れ、且つ、この摺動子15には、前記円弧状抵抗膜12
に対して摺動自在に接触する摺動接点15aが設けられ
ている。Further, reference numeral 15 indicates a slider made of a metal plate, which is disposed on the upper surface side of the insulating substrate 11, and this slider 1
5 is rotatably fitted to the upper end of the hollow shaft 16a, and then caulked the upper end of the hollow shaft 16a to rotatably attach it to the insulating substrate 11. The circular resistive film 12 is formed on the child 15.
There is provided a sliding contact 15a that slidably contacts with.
【0013】そして、前記円弧状の抵抗膜12を、両端
を両接続用電極端子13,14における上面電極13
a,14aに対して電気的に接続するようにした第1の
抵抗膜12aと、両端を両接続用電極端子13,14に
おける上面電極13a,14aに対して適宜寸法L1,
L2だけ離すことによって電気的に接続しないようにし
た第2の抵抗膜12bとの二層構造にするのである。The arc-shaped resistance film 12 is formed on both ends of the upper surface electrode 13 of the connecting electrode terminals 13 and 14.
The first resistance film 12a that is electrically connected to a and 14a and both ends of the upper surface electrodes 13a and 14a of both connection electrode terminals 13 and 14 are appropriately dimensioned L1.
A two-layer structure is formed with the second resistance film 12b so as not to be electrically connected by separating only L2.
【0014】なお、円弧状抵抗膜12を、第1の抵抗膜
12aと、第2の抵抗膜12bとの二層構造にするに際
しては、先づ、絶縁基板11の上面に、第1の抵抗膜1
2aを、その両端を両接続用電極端子13,14におけ
る上面電極13a,14aに対して適宜寸法L1,L2
だけ離すことによって電気的に接続しないようにして形
成し、次いで、この第1の抵抗膜12aの上面に、第2
の抵抗膜12bを、その両端を両接続用電極端子13,
14における上面電極13a,14aに対して電気的に
接続するようにして形成し構成しても良い。When the arc-shaped resistance film 12 has a two-layer structure of the first resistance film 12a and the second resistance film 12b, first, the first resistance is formed on the upper surface of the insulating substrate 11. Membrane 1
2a, both ends of which are appropriately dimensioned L1 and L2 with respect to the upper surface electrodes 13a and 14a of the connecting electrode terminals 13 and 14, respectively.
Formed so that they are not electrically connected to each other, and then the second resistance film 12a is formed on the upper surface of the first resistance film 12a.
The resistance film 12b of the both ends of the connecting electrode terminal 13,
It may be formed and configured so as to be electrically connected to the upper surface electrodes 13a and 14a in 14.
【0015】この構成において、両接続用電極端子1
3,14のうち一方の電極端子13と、中間端子16と
の間における抵抗値を、摺動子15における適宜回転角
度θの範囲内での回転により、r1からr2の範囲につ
いて調節することができるのである。この場合におい
て、円弧状の抵抗膜12を、両端を両接続用電極端子1
3,14における上面電極13a,14aに対して電気
的に接続するようにした第1の抵抗膜12aと、両端を
両接続用電極端子13,14における上面電極13a,
14aに対して適宜寸法L1,L2だけ離すことによっ
て電気的に接続しないようにした第2の抵抗膜12bと
の二層構造にしたことにより、この二層構造の部分にお
ける単位長さ当たりの抵抗値を、小さくすることができ
る一方、前記第1の抵抗膜12aのうち第2の抵抗膜1
2bとの二層構造になっていない長さL1,L2の部分
における抵抗値を大きくすることができる。In this structure, both connection electrode terminals 1
It is possible to adjust the resistance value between one of the electrode terminals 13 and 3 and the intermediate terminal 16 in the range of r1 to r2 by rotating the slider 15 within a range of an appropriate rotation angle θ. You can do it. In this case, the arc-shaped resistance film 12 is provided on both ends of the connecting electrode terminal 1
The first resistance film 12a electrically connected to the upper surface electrodes 13a and 14a of the electrodes 3 and 14, and the upper surface electrodes 13a of both connection electrode terminals 13 and 14 at both ends.
14a has a two-layer structure with the second resistance film 12b which is appropriately separated from each other by the dimensions L1 and L2 so that the resistance per unit length in the two-layer structure is reduced. While the value can be reduced, the second resistance film 1 of the first resistance film 12a is
It is possible to increase the resistance value in the portions of lengths L1 and L2 that do not form a two-layer structure with 2b.
【0016】その結果、抵抗特性は、図4に示すように
なり、両接続用電極端子13,14のうち一方の電極端
子13と中間端子16との間における抵抗値の可変特性
の傾きを、緩やかに、換言すると、摺動子15の単位回
転角度δθに対する抵抗値の変化割合δrを小さくこと
ができる一方、前記両接続用電極端子13,14の相互
間における抵抗値を、第1の抵抗膜12aのうち二層構
造になっていない長さL1,L2の部分における抵抗値
によって所定の公称全抵抗値Rにすることができるので
ある。As a result, the resistance characteristic becomes as shown in FIG. 4, and the inclination of the variable characteristic of the resistance value between one of the connecting electrode terminals 13 and 14 and the intermediate terminal 16 is expressed by Slowly, in other words, the rate of change δr of the resistance value with respect to the unit rotation angle δθ of the slider 15 can be reduced, while the resistance value between the connection electrode terminals 13 and 14 is set to the first resistance. A predetermined nominal total resistance value R can be obtained by the resistance values of the portions of the lengths L1 and L2 of the film 12a that do not form the two-layer structure.
【0017】ところで、前記円弧状抵抗膜12を、前記
のように、両端を両接続用電極端子13,14における
上面電極13a,14aに対して電気的に接続するよう
にした第1の抵抗膜12aと、両端を両接続用電極端子
13,14における上面電極13a,14aに対して電
気的に接続しないようにした第2の抵抗膜12bとの二
層構造にする場合、この二層構造の部分における抵抗
値、及び前記第1の抵抗膜12aのうち第2の抵抗膜1
2bとの二層構造になっていない長さL1,L2の部分
における抵抗値には、第1の抵抗膜12a,第2の抵抗
膜12bとの間におけるずれによって、バラツキが発生
することになる。By the way, as described above, the arc-shaped resistance film 12 has its both ends electrically connected to the upper surface electrodes 13a and 14a of the connection electrode terminals 13 and 14, respectively. 12a and a second resistance film 12b of which both ends are not electrically connected to the upper surface electrodes 13a and 14a of the connection electrode terminals 13 and 14, the two-layer structure of this two-layer structure is used. The resistance value in the portion and the second resistance film 1 of the first resistance film 12a.
The resistance values at the portions of the lengths L1 and L2 that do not form a two-layer structure with 2b will vary due to the deviation between the first resistance film 12a and the second resistance film 12b. .
【0018】そこで、前記絶縁基板11の上面に、抵抗
膜12のうち二層構造の部分における両端の各々に対し
て電気的に接続する補助導体パターン17,18を設け
ることにより、前記二層構造の部分における抵抗値、及
び第1の抵抗膜のうち第2の抵抗膜との二層構造になっ
ていない長さL1,L2の部分における抵抗値を、この
両補助導体パターン17,18及び両接続用電極端子1
3,14に対して抵抗値測定用のプローブを接触するこ
とで、それぞれ容易に、且つ、確実に測定することがで
きるから、チップ型可変抵抗器の製造工程中において、
前記各抵抗値が、その各々における所定値内に入ってい
るか否かの検査を、至極簡単に行うことができるのであ
る。Therefore, by providing auxiliary conductor patterns 17 and 18 on the upper surface of the insulating substrate 11 to electrically connect to both ends of the resistance film 12 in the two-layer structure portion, the two-layer structure is formed. And the resistance value in the portion of lengths L1 and L2 of the first resistance film that does not form a two-layer structure with the second resistance film. Connection electrode terminal 1
By contacting the probes for measuring the resistance value to the electrodes 3 and 14, it is possible to easily and surely measure them, respectively. Therefore, during the manufacturing process of the chip type variable resistor,
The inspection as to whether or not each of the resistance values is within the predetermined value can be performed extremely easily.
【0019】また、前記二層構造になっていない長さL
1,L2の部分のうち一方の長さL1の部分を、図9に
示す第2の実施例のように、他方の長さL2の部分より
も長くすることにより、摺動子15の回転によって調節
できる抵抗値を、図10に実線で示すように高い側に移
行することができ、また、他方の長さL2の部分を、一
方の長さL1の部分よりも長くすることにより、摺動子
15の回転によって調節できる抵抗値を、図10に二点
鎖線で示すように低い側に移行することができると言う
ように、抵抗値の可変特性を、前記二層構造になってい
ない長さL1,L2の部分における長さの調整によっ
て、任意に設定できるのである。The length L not having the double-layered structure
One of the lengths L1 and L2 is made longer than the other length L2 as in the second embodiment shown in FIG. 9, so that the slider 15 is rotated. The adjustable resistance value can be shifted to the higher side as shown by the solid line in FIG. 10, and sliding can be achieved by making the other length L2 portion longer than the one length L1 portion. As shown in FIG. 10, the resistance value that can be adjusted by the rotation of the child 15 can be shifted to the lower side, as shown by the chain double-dashed line. The length can be arbitrarily set by adjusting the lengths of the portions L1 and L2.
【0020】更にまた、図5に示す絶縁基板11に対し
て、円弧状抵抗膜12、両接続用電極端子13,14、
及び両補助導体パターン17,18を形成するに際して
は、先づ、図6に示すように、当該絶縁基板11の下面
に、両接続用電極端子13,14における下面電極13
b,14bを形成したのち、絶縁基板11の上面に、両
接続用電極端子13,14における上面電極13a,1
4aと両補助導体パターン17,18とを形成し、次い
で、前記絶縁基板11における上面に、第1の抵抗膜1
2aを、図7に示すように、その両端が前記上面電極1
3a,14aに一部重なるようにして形成したのち、こ
の第1の抵抗膜12aの上面に、第2の抵抗膜12b
を、図8に示すように、その両端を上面電極13a,1
4aに対して適宜寸法L1,L2だけ離すことによって
電気的に接続しないようにして形成する(なお、この場
合、絶縁基板11の上面に、第1の抵抗膜12aを、そ
の両端を両接続用電極端子13,14における上面電極
13a,14aに対して適宜寸法L1,L2だけ離すこ
とによって電気的に接続しないようにして形成したの
ち、この第1の抵抗膜12aの上面に、第2の抵抗膜1
2bを、その両端を両接続用電極端子13,14におけ
る上面電極13a,14aに対して電気的に接続するよ
うにして形成しても良い)。Furthermore, with respect to the insulating substrate 11 shown in FIG. 5, an arcuate resistance film 12, both connection electrode terminals 13 and 14,
When forming both auxiliary conductor patterns 17 and 18, first, as shown in FIG. 6, the lower surface electrodes 13 of both connection electrode terminals 13 and 14 are formed on the lower surface of the insulating substrate 11.
After forming b and 14b, the upper surface electrodes 13a and 1 of both connection electrode terminals 13 and 14 are formed on the upper surface of the insulating substrate 11.
4a and both auxiliary conductor patterns 17 and 18 are formed, and then the first resistance film 1 is formed on the upper surface of the insulating substrate 11.
2a, as shown in FIG.
After being formed so as to partially overlap 3a and 14a, the second resistance film 12b is formed on the upper surface of the first resistance film 12a.
As shown in FIG. 8, both ends of the upper surface electrodes 13a, 1a
4a is formed so as not to be electrically connected to each other by appropriately separating the dimensions L1 and L2 from each other (in this case, the first resistance film 12a is formed on the upper surface of the insulating substrate 11 and both ends thereof are for both connections). After being formed so as not to be electrically connected to the upper surface electrodes 13a and 14a of the electrode terminals 13 and 14 by appropriate distances L1 and L2, the second resistance is formed on the upper surface of the first resistance film 12a. Membrane 1
2b may be formed such that both ends thereof are electrically connected to the upper surface electrodes 13a and 14a of the connecting electrode terminals 13 and 14, respectively.
【0021】そして、前記絶縁基板11における一側面
に、両接続用電極端子13,14における側面電極13
c,14cを形成するのである。勿論、前記絶縁基板1
1に対する下面電極13b,14b、上面電極13a,
14a、補助導体パターン17,18、第1の抵抗膜1
2a及び第2の抵抗膜12bの形成は、例えば、本発明
者が先に提案した特許出願(特願昭63−292096
号、特開平2−137201号)の場合と同様に、前記
絶縁基板11の複数個を縦横に並べて一体化をした素材
板を使用して、この素材板における各絶縁基板11に対
して行い、次いで、前記素材板を棒状に分割し、この棒
状の状態で、各絶縁基板11に対して側面電極13c,
14cを形成したのち、各絶縁基板11ごとに分割する
のである。Then, on one side surface of the insulating substrate 11, the side surface electrode 13 of each of the connecting electrode terminals 13 and 14 is formed.
c and 14c are formed. Of course, the insulating substrate 1
1, lower surface electrodes 13b and 14b, upper surface electrode 13a,
14a, auxiliary conductor patterns 17 and 18, first resistance film 1
The formation of the second resistance film 12a and the second resistance film 12b is performed, for example, in a patent application previously proposed by the present inventor (Japanese Patent Application No. 63-292096).
As in the case of Japanese Patent Laid-Open No. 2-137201), a raw material plate obtained by arranging a plurality of the insulating substrates 11 vertically and horizontally and integrating them is used for each insulating substrate 11 in the raw material plate. Next, the material plate is divided into rods, and in this rod-like state, side electrodes 13c,
After forming 14c, each insulating substrate 11 is divided.
【図1】本発明における第1の実施例によるチップ型可
変抵抗器の縦断正面図である。FIG. 1 is a vertical sectional front view of a chip type variable resistor according to a first embodiment of the present invention.
【図2】図1の一部切欠平面図である。FIG. 2 is a partially cutaway plan view of FIG.
【図3】図1における絶縁基板の斜視図である。FIG. 3 is a perspective view of the insulating substrate in FIG.
【図4】第1の実施例における抵抗値の可変特性を示す
図である。FIG. 4 is a diagram showing a variable characteristic of a resistance value in the first embodiment.
【図5】絶縁基板の斜視図である。FIG. 5 is a perspective view of an insulating substrate.
【図6】図5の絶縁基板に対して下面電極、上面電極及
び補助導体パターンを形成した状態の斜視図である。6 is a perspective view showing a state where a lower surface electrode, an upper surface electrode and an auxiliary conductor pattern are formed on the insulating substrate of FIG.
【図7】図5の絶縁基板に対して第1の抵抗膜を形成し
た状態の斜視図である。7 is a perspective view showing a state in which a first resistance film is formed on the insulating substrate of FIG.
【図8】図5の絶縁基板に対して第2の抵抗膜を形成し
た状態の斜視図である。8 is a perspective view showing a state in which a second resistance film is formed on the insulating substrate of FIG.
【図9】第2の実施例における絶縁基板の斜視図であ
る。FIG. 9 is a perspective view of an insulating substrate according to a second embodiment.
【図10】第2の実施例における抵抗値の可変特性を示
す図である。FIG. 10 is a diagram showing variable characteristics of resistance values in the second embodiment.
【図11】従来におけるチップ型可変抵抗器の縦断正面
図である。FIG. 11 is a vertical sectional front view of a conventional chip type variable resistor.
【図12】図11の一部切欠平面図である。12 is a partially cutaway plan view of FIG. 11. FIG.
【図13】従来のチップ型可変抵抗器の可変特性を示す
図である。FIG. 13 is a diagram showing variable characteristics of a conventional chip variable resistor.
11 絶縁基板 12 円弧状抵抗膜 12a 第1の抵抗膜 12b 第2の抵抗膜 13,14 接続用電極端子 15 摺動子 16 中間端子 17,18 補助導体パターン 11 Insulating Substrate 12 Arc Resistive Film 12a First Resistive Film 12b Second Resistive Film 13,14 Connection Electrode Terminal 15 Slider 16 Intermediate Terminal 17,18 Auxiliary Conductor Pattern
Claims (2)
の両端が前記絶縁基板に設けた両接続用電極端子に各々
電気的に接続するように形成すると共に、中間端子に電
気的に接続する摺動子を前記抵抗膜に対して摺動自在に
接触するように回転可能に装着して成るチップ型可変抵
抗器において、前記円弧状抵抗膜を、両端が前記両接続
用電極端子に対して電気的に接続するようにした第1の
抵抗膜と、両端が前記両接続用電極端子に対して電気的
に接続しないようにした第2の抵抗膜との二層構造にし
たことを特徴とするチップ型可変抵抗器。1. An insulating substrate is provided with arc-shaped resistive films such that both ends of the resistive film are electrically connected to both connection electrode terminals provided on the insulating substrate, and an intermediate terminal is electrically connected. In a chip type variable resistor, which is rotatably mounted so as to be slidably contacted with the resistance film, the arc-shaped resistance film is provided with both ends of the connecting electrode terminals. A two-layer structure of a first resistance film electrically connected to the first resistance film and a second resistance film both ends of which are not electrically connected to the connection electrode terminals. Chip type variable resistor characterized by.
の両端が前記絶縁基板に設けた両接続用電極端子に各々
電気的に接続するように形成すると共に、中間端子に電
気的に接続する摺動子を前記抵抗膜に対して摺動自在に
接触するように回転可能に装着して成るチップ型可変抵
抗器において、前記円弧状抵抗膜を、両端が前記両接続
用電極端子に対して電気的に接続するようにした第1の
抵抗膜と、両端が前記両接続用電極端子に対して電気的
に接続しないようにした第2の抵抗膜との二層構造にす
る一方、前記絶縁基板に、抵抗膜のうち二層構造の部分
における両端の各々に対して電気的に接続する補助導体
パターンを設けたことを特徴とするチップ型可変抵抗
器。2. An arc-shaped resistive film is formed on an insulating substrate such that both ends of the resistive film are electrically connected to both connecting electrode terminals provided on the insulating substrate, and an electrical resistance is provided on an intermediate terminal. In a chip type variable resistor, which is rotatably mounted so as to be slidably contacted with the resistance film, the arc-shaped resistance film is provided with both ends of the connecting electrode terminals. A first resistance film electrically connected to the first resistance film and a second resistance film having both ends not electrically connected to the connection electrode terminals. A chip-type variable resistor, wherein the insulating substrate is provided with auxiliary conductor patterns electrically connected to both ends of a two-layer structure portion of the resistance film.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9974793A JPH06310309A (en) | 1993-04-26 | 1993-04-26 | Chip-type variable resistor |
| US08/618,089 US5631623A (en) | 1993-04-26 | 1996-03-19 | Chip-type variable resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9974793A JPH06310309A (en) | 1993-04-26 | 1993-04-26 | Chip-type variable resistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06310309A true JPH06310309A (en) | 1994-11-04 |
Family
ID=14255598
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9974793A Pending JPH06310309A (en) | 1993-04-26 | 1993-04-26 | Chip-type variable resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06310309A (en) |
-
1993
- 1993-04-26 JP JP9974793A patent/JPH06310309A/en active Pending
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