JPH0749415Y2 - Mapping analyzer device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a mapping analyzer device using an electron beam and an X-ray.

[Conventional technology]

When displaying a mapping image of an element on a color CRT with a mapping analyzer device, after operating the MCA circuit for a certain period of time, the value stored in the MCA channel corresponding to the energy of the element to be analyzed is read using software and required. The ROi value was calculated by performing additions across different channels.

[Problems to be solved by the device]

The time required for detailed analysis of a large-area sample to create an elemental mapping image is very large in the conventional technique using the MCA circuit. The invention is
The purpose is to reduce this measurement time.

[Means for Solving the Problems]

The above object of the present invention is achieved by a mapping analyzer device whose configuration is shown in FIG. The main means is the MCA circuit equipped with the ROi counter for mapping and the memory for ROi counter which controls it.

[Action]

According to the present invention, a pulse signal detected by a proportional counter or a semiconductor detector is amplified by the amplifier and waveform-shaped,
It is input to the MCA circuit with ROi counter of the present invention. The peak value of this input signal is A / D converted by the MCA circuit, the value of the MCA channel corresponding to the peak value is increased by +1, and the fact that one pulse at that peak value has arrived is stored in the memory of the MCA circuit. Remember. At the same time as this operation, the value of the ROi counter selected in the ROi memory is also incremented by +1. After that, these two operations simultaneously proceed with each arrival of the pulse.

Thus, the ROi value of the selected ROi counter can be read out immediately after the measurement for a certain period of time, which contributes to the shortening of the measurement time.

〔Example〕

FIG. 1 is a block diagram of the present invention. FIG. 2 is a diagram showing the relationship between the ROi memory and the ROi counter in FIG. Reference numeral 1 is an amplifier for input impedance conversion. The output signal of this amplifier is compared with LLD (Low level Detect) level comparator 2 and ULD (Upper level Det level).
ect) is input to the comparator 3 for comparison and the signal level is higher than LLD and lower than ULD, the peak hold circuit 4 operates. The maximum amplitude of the input signal is 5
The peak detect circuit of 6 detects and operates the 12-bit A / D converter of 6. During this period, the input signal is controlled so as not to be input to the peak hold circuit. When the selector circuit 7 receives the A / D converted END signal, the A / D converted value is selected and given as an address of the MCA memory 8 and the ROi memory 9. The address of this memory is called the MCA channel.

The contents of the MCA memory of the selected channel are read into 11 16-bit up counter via 10 gate circuits, and +1
The value of the counter is incremented by +1 with the UP clock, and then written again in the MCA memory of the same channel.

At the same time with this operation, the same address as the address (channel) given to the MCA memory is given as an address signal of the ROi memory.

The ROi memory 9 is pre-written with data from the CPU via the gate 12. As shown in Fig. 2, ROi
The 16-bit data bit of the memory is the same ROi
Corresponds to counter 14. Write "1" to the bit of the number you want to use as the ROi counter, and set the other bits to "φ". The contents of the ROi memory are temporarily held in 13 latch circuits at the same timing as the data load signal of 11 UP counters. Thirteen latch outputs are connected to one input of each of the 16 NAND circuits. The input of the ROi counter corresponding to the bit written in “φ” is forcibly set to “1” according to the contents of the ROi memory. Apply + 1UP clock to the other input of 16 NAND circuit. This signal is 11
It is the same as the signal given to the UP counter of. As a result, the + 1UP clock is input only to the ROi counter in which the content of the ROi memory is written as "1", and the content of the ROi counter of the selected number is incremented by +1. For the correspondence between the MCA channel and the ROi counter used, write "1" in any bit of the corresponding channel of this ROi memory. This allows the RCA to operate simultaneously with the operation of the MCA circuit.
It is possible to operate the Oi counter. After measuring for a certain period of time, the ROi value can be read out through the gate 15 corresponding to the number of each ROi counter. Using this value,
A mapping image of elements can be drawn at high speed.

[Effect of device]

With the above-described configuration, the present invention can draw an element mapping image faster than a device using a conventional MCA circuit, and can contribute to shortening the analysis time.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing the correspondence between the contents of the ROi memory and the ROi counter in FIG. 4 …… Peak hold circuit 5 …… Peak detect circuit 6 …… A / D converter 7 …… Selector 8 …… MCA memory 9 …… ROi memory 11 …… Up counter 14 …… ROi counter 15 …… ROi counter reading gate Circuit 16 …… NAND gate circuit

Claims (4)

[Scope of utility model registration request] 1. A mapping analyzer device for elemental analysis, comprising a memory having an address corresponding to the energy of an element to be analyzed, and binary data of selected / unselected is written in a data bit corresponding to each address in advance.
A plurality of counters connected to each bit of the memory are provided, and each time the pulse of the energy arrives, the counter corresponding to the bit in which the binary data of the selection is written is operated. Then, after the measurement, the count value of each counter is read, and a mapping image of the element is displayed from the count value. 2. A mapping analyzer for elemental analysis, comprising: a first memory having an address corresponding to energy of an element to be analyzed, and storing a count number of pulses having the energy at the address; A second memory having the same address as the memory, in which binary data of selection / non-selection is written in advance;
A plurality of counters connected to correspond to each bit of the memory of the second memory are provided.
The counter corresponding to the bit in which the selected binary data is written in the memory is operated, the count value of each counter is read out after the measurement, and the mapping image of each element is displayed from the count value. Mapping analyzer device. 3. An X-ray or an electron beam for irradiating a sample, a detection means for detecting the energy generated by the irradiation, and an A / D for A / D converting the peak value of an input signal based on the detected energy. A converter, a first memory having an address corresponding to the peak value and storing the number of pulses at the peak value in the address, and counting pulses at the peak value, and counting the pulses in the first memory. A first counter that writes a number to a corresponding address; a second memory that has the same address as the first memory and that writes any one of binary information to the bit of the number to be counted; A plurality of second counters, which are respectively connected to correspond to the data bits of the memory, and are connected between the second memory and the second counter,
And means for sending the same clock as the clock sent to the first counter to the corresponding counter of the plurality of second counters when the value information is obtained, and each counter of the second counter after measurement A mapping analyzer device which reads the value of and obtains a mapping image of the element. 4. A mapping analyzer for elemental analysis, comprising a memory having an address corresponding to the energy of an element to be analyzed, and binary data selected in advance for any data bit of the address, and the memory. Is provided with a plurality of counters connected corresponding to the respective bits, and each time the pulse of the energy arrives, the counter corresponding to the bit in which the binary data of the selection is written is operated, After the measurement, the count value of each counter is read, and a mapping image of the element is displayed from the count value.