JPH08250989A - Load drive - Google Patents

Abstract

(57) [Summary] [Configuration] The current value detected by the current detection resistor 2 is A / D.
The converter converts the signal into a digital signal, inputs the digital signal to the calculator, and the calculator calculates or controls. [Effect] The current value detected by the current detection resistor is converted into a digital signal by the A / D converter, and the current value is monitored by the arithmetic unit. Therefore, when the load is abnormal, that is, open or short-circuited continuously. When it is detected, the driving of the load is forcibly stopped by the arithmetic unit, so that the short-circuit protection circuit becomes unnecessary.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a load failure detection device and a load drive circuit protection device.

[0002]

2. Description of the Related Art In a load driving device, there is a problem that when a load is short-circuited, an overcurrent flows in a load driving portion of the load driving device and burns.

In order to solve such a problem, Japanese Patent Laid-Open No.
In the conventional technique described in Japanese Patent Laid-Open No. 106114, a short circuit protection circuit is provided, and when a short circuit is detected, the output of the load is stopped by hardware.

[0004]

The prior art disclosed in Japanese Patent Laid-Open No. 3-106114 has a problem that a short-circuit protection circuit is required to protect the load drive unit from an overcurrent due to a short circuit of the load. It was

An object of the present invention is to provide a device which protects a load driving unit from an overcurrent due to a short circuit without using a short circuit protection circuit.

[0006]

In order to achieve the above object, in the present invention, the current value detected by the current detection resistor is set to A
The digital signal is converted into a digital signal by the / D converter, the digital signal is input to the arithmetic unit, and arithmetic and control are performed by the arithmetic unit.

[0007]

A short circuit protection circuit is unnecessary by converting the current value detected by the current detection resistor into a digital signal by the A / D converter, inputting the digital signal into the arithmetic unit, and performing arithmetic operation and control by the arithmetic unit. Become.

[0008]

Embodiments of the present invention will now be described in detail with reference to the accompanying drawings. FIG. 1 is a circuit diagram of a load drive device according to the upstream control of this embodiment.

In this circuit diagram, the DC power supply 5 is connected to the load 4 via the current detection resistor 2 and the output transistor 3. On the other hand, a control signal from the CPU 1 is applied to the base terminal of the output transistor 3 from the CPU 1 incorporating the A / D converter via the buffer 6.

To the A / D converter of the CPU 1, the voltage VB of the DC power supply 5 and the voltage VC at the point through the current detection resistor 2 are input from the DC power supply 5 and converted into digital values.
The CPU 1 determines the load abnormality based on the digital value. Furthermore, if the CPU 1 determines that the load is abnormal, the CP
When the output signal VA from U1 outputs low, the output transistor 3 is turned off and the supply of current to the load 4 is stopped.

FIG. 3 is a flowchart showing load abnormality detection and load drive device protection operation in the circuit configuration of FIG.

The short judgment value is α and the open judgment value is β
And the load abnormality detection counter is set to N, the voltage BV of the DC power supply 5 and the voltage VC at the point from the DC power supply 5 via the current detection resistor 2 are converted into digital values by the A / D converter of the CPU 1. After conversion, the difference between VB and VC is calculated and the value is set as γ. The difference γ between VB and VC is compared with the preset short-circuit judgment value α, and if the short-circuit judgment value α is larger, the difference γ between VB and VC and the preset open judgment value β are compared. In comparison, if the difference γ between VB and VC is larger, the load abnormality detection counter N is cleared. When the difference γ between VB and VC and the short-circuit judgment value α are compared, and the difference γ between VB and VC is larger, the value of the load abnormality detection counter N is confirmed and the load abnormality detection counter N is checked.
When the value of is less than 3, 1 is added to the value of the load abnormality detection counter N. When the value of the load abnormality detection counter N is larger than 3, the load drive signal is stopped, the short flag is set, and the load abnormality detection counter N is cleared. V
When the difference γ between B and VC and the open judgment value β are compared,
When the difference γ between VB and VC is smaller, the value of the load abnormality detection counter N is confirmed, and when the value of the load abnormality detection counter N is smaller than 3, 1 is added to the value of the load abnormality detection counter N. When the value of the load abnormality detection counter N is larger than 3, the load drive signal is stopped, the open flag is set, and the load abnormality detection counter N is cleared.

Another embodiment of the present invention will be described below with reference to the accompanying FIGS. FIG. 2 is a circuit diagram of a load drive device by downstream control.

In this circuit diagram, the DC power source 5 has a load 4,
It is grounded through the output transistor 3 and the current detection resistor 2. On the other hand, a control signal from the CPU 1 is applied to the base terminal of the output transistor 3 from the CPU 1 incorporating the A / D converter via the buffer 6.

The A / D converter of the CPU 1 has a DC power source 5
From the voltage V through the load 4 and the output transistor 3
Input B and convert it to a digital value. By digital value
The CPU 1 determines a load abnormality. Further, when the CPU 1 determines that the load is abnormal, the output signal VA from the CPU 1 is output.
Outputs low, the output transistor 3 is turned off, and the supply of current to the load 4 is stopped.

FIG. 4 is a flowchart showing load abnormality detection and load drive device protection operation in the circuit configuration of FIG.

The short judgment value is α and the open judgment value is β
And the load abnormality detection counter is set to N, the voltage VB at the point from the DC power source 5 via the load 4 and the output transistor 3 is converted into a digital value by the A / D converter of the CPU 1, and the value is γ. And

The digital conversion value γ of VB is compared with the preset short-circuit judgment value α, and when the short-circuit judgment value α is larger, the digital conversion value γ of VB and the preset open judgment. Compare the value β, VB
When the digital conversion value γ of is larger, the load abnormality detection counter N is cleared. If the digital conversion value γ of VB is larger than the digital conversion value γ of VB when the digital conversion value γ of VB is larger, the value of the load abnormality detection counter N is confirmed and the value of the load abnormality detection counter N is 3 If it is smaller, 1 is added to the value of the load abnormality detection counter N. When the value of the load abnormality detection counter N is larger than 3, the load drive signal is stopped, the short flag is set, and the load abnormality detection counter N is cleared. When comparing the digital conversion value γ of VB and the open determination value β, if the digital conversion value γ of VB is smaller, the value of the load abnormality detection counter N is confirmed and the value of the load abnormality detection counter N is 3 If it is smaller, 1 is added to the value of the load abnormality detection counter N. When the value of the load abnormality detection counter N is larger than 3, the load drive signal is stopped, the open flag is set, and the load abnormality detection counter N is cleared.

[0019]

According to the present invention, the current value detected by the current detection resistor is converted into a digital signal by the A / D converter and the current value is monitored by the arithmetic unit. When open or short circuit is continuously detected, the driving of the load is forcibly stopped by the arithmetic unit, so that the short circuit protection circuit becomes unnecessary.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a load drive device by upstream control that is an embodiment of the present invention.

2 is a diagram illustrating a load abnormality detection in the circuit configuration of FIG. 1;
The circuit diagram showing the protection operation of the load drive device with the flow.

FIG. 3 is a circuit diagram of a load driving device by downstream control according to another embodiment of the present invention.

FIG. 4 is an abnormality detection of a load in the circuit configuration of FIG.
The flowchart of the protection operation of the load driving device.

[Explanation of symbols]

1 ... CPU with built-in A / D converter, 2 ... Current detection resistor, 3 ...
Output transistor, 4 ... Load, 5 ... DC power supply, 6 ... Buffer.

Claims (4)

[Claims] 1. A load comprising a drive unit for driving a load, an A / D converter for converting an analog signal into a digital signal, a current detection resistor for detecting a current flowing through the load, and an arithmetic unit for performing an arithmetic operation. In a drive circuit, a load drive device, wherein an analog signal generated in the current detection resistor is converted into a digital signal by the A / D converter, and a current flowing through a load is monitored by the arithmetic unit. 2. The load drive device according to claim 1, wherein the arithmetic unit determines a load disconnection and a short circuit based on a digital value of the A / D converter. 3. The load driving device according to claim 1, wherein when the computing unit determines a load disconnection or a short circuit, the load driving is forcibly stopped. 4. The load driving device according to claim 1, wherein when the arithmetic unit continuously determines a load disconnection and a short circuit a plurality of times, driving of the load is forcibly stopped.