JPH0864966A - Multilayer printed circuit board and manufacturing method - Google Patents
Multilayer printed circuit board and manufacturing methodInfo
- Publication number
- JPH0864966A JPH0864966A JP22581494A JP22581494A JPH0864966A JP H0864966 A JPH0864966 A JP H0864966A JP 22581494 A JP22581494 A JP 22581494A JP 22581494 A JP22581494 A JP 22581494A JP H0864966 A JPH0864966 A JP H0864966A
- Authority
- JP
- Japan
- Prior art keywords
- hole
- circuit pattern
- insulating layer
- circuit board
- printed circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 239000011248 coating agent Substances 0.000 claims abstract description 7
- 238000000576 coating method Methods 0.000 claims abstract description 7
- 239000000463 material Substances 0.000 claims abstract description 7
- 229920005989 resin Polymers 0.000 claims description 34
- 239000011347 resin Substances 0.000 claims description 34
- 239000003973 paint Substances 0.000 claims description 32
- 238000000034 method Methods 0.000 claims description 13
- 238000009413 insulation Methods 0.000 claims description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 239000004332 silver Substances 0.000 description 5
- 239000011889 copper foil Substances 0.000 description 4
- 230000003014 reinforcing effect Effects 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 238000005553 drilling Methods 0.000 description 3
- 239000006260 foam Substances 0.000 description 3
- 238000004080 punching Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 229910002012 Aerosil® Inorganic materials 0.000 description 2
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- PPBRXRYQALVLMV-UHFFFAOYSA-N Styrene Chemical compound C=CC1=CC=CC=C1 PPBRXRYQALVLMV-UHFFFAOYSA-N 0.000 description 2
- BZHJMEDXRYGGRV-UHFFFAOYSA-N Vinyl chloride Chemical compound ClC=C BZHJMEDXRYGGRV-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 239000000945 filler Substances 0.000 description 2
- 238000005187 foaming Methods 0.000 description 2
- 229920002050 silicone resin Polymers 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000004743 Polypropylene Substances 0.000 description 1
- 239000010425 asbestos Substances 0.000 description 1
- 238000009835 boiling Methods 0.000 description 1
- 239000006229 carbon black Substances 0.000 description 1
- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 229920003020 cross-linked polyethylene Polymers 0.000 description 1
- 239000004703 cross-linked polyethylene Substances 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000004794 expanded polystyrene Substances 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 239000004088 foaming agent Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001225 polyester resin Polymers 0.000 description 1
- 239000004645 polyester resin Substances 0.000 description 1
- 229920013716 polyethylene resin Polymers 0.000 description 1
- 229920005672 polyolefin resin Polymers 0.000 description 1
- -1 polypropylene Polymers 0.000 description 1
- 229920001155 polypropylene Polymers 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 229910052895 riebeckite Inorganic materials 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000002904 solvent Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 230000009974 thixotropic effect Effects 0.000 description 1
- 229920006337 unsaturated polyester resin Polymers 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】この発明は、絶縁性の基板表面に
銅箔等の回路パターンが複数の層に積層された多層プリ
ント基板とその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed circuit board in which a circuit pattern such as a copper foil is laminated in a plurality of layers on the surface of an insulating substrate and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】従来、特公平３−３７８７９号公報に開
示されているように、基板表面に絶縁層を介して複数の
プリント配線が形成された多層プリント基板において、
そのプリント配線のスルーホール形成部に、補強ランド
を設けたものがあった。この補強ランドは、基板とプリ
ント配線との間に設けられ、その密着強度の向上等のた
めに設けられたものであった。2. Description of the Related Art Conventionally, as disclosed in Japanese Patent Publication No. 3-37879, in a multilayer printed circuit board having a plurality of printed wirings formed on the surface of the board with an insulating layer interposed therebetween,
Some of the printed wirings have a reinforcing land at the through hole forming portion. The reinforcing land is provided between the substrate and the printed wiring and is provided to improve the adhesion strength.
【０００３】[0003]
【発明が解決しようとする課題】上記従来の技術の場
合、単に印刷配線のスルーホール形成部の下層に銅箔等
の補強ランドを形成しただけであり、スルーホール内の
導電体部分との接触部は、プリント配線及び補強ランド
のスルーホール端面のみであり、せいぜい数十μｍ程度
の幅で接触面積が小さく電気的接続部の信頼性が低いも
のであった。In the case of the above-mentioned conventional technique, a reinforcing land such as a copper foil is simply formed in the lower layer of the through-hole forming portion of the printed wiring, and the contact with the conductor portion in the through-hole is made. The portion was only the end face of the through hole of the printed wiring and the reinforcing land, and the width was at most about several tens of μm, the contact area was small, and the reliability of the electrical connection portion was low.
【０００４】この発明は、上記従来の技術に鑑みて成さ
れたもので、絶縁層を介して多層に積層された回路パタ
ーン間を接続するスルーホールの電気的接続部の信頼性
が高い多層プリント基板とその製造方法を提供すること
を目的とする。The present invention has been made in view of the above-mentioned conventional technique, and has a highly reliable multi-layer printing of an electrical connection portion of a through hole connecting circuit patterns laminated in multiple layers via an insulating layer. It is an object to provide a substrate and a manufacturing method thereof.
【０００５】[0005]
【課題を解決するための手段】この発明は、絶縁層を介
して複数の回路パターンが積層され、この複数の回路パ
ターンを貫通してスルーホールが形成され、このスルー
ホールが形成された各絶縁層と回路パターンとが接して
いる部分の絶縁層に、その回路パターンに面して開口し
た凹部が形成され、上記スルーホール及びこの凹部に導
電性塗料が充填されている多層プリント基板である。According to the present invention, a plurality of circuit patterns are laminated via an insulating layer, a through hole is formed so as to penetrate the plurality of circuit patterns, and each insulation having the through hole is formed. A multilayer printed circuit board is provided, in which a concave portion opened to face the circuit pattern is formed in an insulating layer in a portion where the layer and the circuit pattern are in contact, and the through hole and the concave portion are filled with a conductive paint.
【０００６】さらにこの発明は、上記回路パターンのス
ールホール形成部分は、その回路パターンの他の部分よ
り厚く形成されているものである。また、上記凹部に
は、上記スルーホールに充填される導電性塗料が浸入可
能な多孔質樹脂が充填されているものである。Further, according to the present invention, the part where the hole is formed in the circuit pattern is formed thicker than the other parts of the circuit pattern. Further, the concave portion is filled with a porous resin into which the conductive paint filled in the through hole can enter.
【０００７】またこの発明は、絶縁層上に回路パターン
を形成し、その絶縁層のスルーホール形成部分であって
上記回路パターンと接する部分に凹部を形成し、この絶
縁層を複数積層し、この積層した絶縁層を加熱して接合
し、上記スルーホール形成部分にスルーホールを形成
し、そのスルーホール及び上記凹部に導電性塗料を流し
込み固化させる多層プリント基板の製造方法である。Further, according to the present invention, a circuit pattern is formed on an insulating layer, a recess is formed in a portion of the insulating layer where a through hole is formed and is in contact with the circuit pattern, and a plurality of the insulating layers are laminated. This is a method for manufacturing a multilayer printed circuit board, in which laminated insulating layers are heated and bonded to form a through hole in the through hole forming portion, and a conductive coating material is poured into the through hole and the recess to solidify.
【０００８】またこの発明は、絶縁層上に回路パターン
を形成し、その絶縁層のスルーホール形成部分であって
上記回路パターンと接する部分に凹部を形成して熱収縮
性樹脂を積層し、この絶縁層を複数積層し、この積層し
た絶縁層を加熱して接合し、上記熱収縮性樹脂により上
記凹部による空隙を形成し、この後上記スルーホール形
成部分にスルーホールを形成し、そのスルーホール及び
上記凹部に導電性塗料を流し込み固化させる多層プリン
ト基板の製造方法である。Further, according to the present invention, a circuit pattern is formed on an insulating layer, a recess is formed in a portion of the insulating layer where a through hole is formed and which is in contact with the circuit pattern, and a heat-shrinkable resin is laminated. A plurality of insulating layers are laminated, the laminated insulating layers are heated and joined together, a void is formed by the recess by the heat shrinkable resin, and then a through hole is formed in the through hole forming portion, and the through hole is formed. And a method for manufacturing a multilayer printed circuit board, in which a conductive coating material is poured into the recesses and solidified.
【０００９】[0009]
【作用】この発明の多層プリント基板は、スルーホール
形成部分の絶縁層に、回路パターンの形成面に開口した
凹部を設け、この凹部に導電性塗料を流入させ、スルー
ホール内の導電性塗料と回路パターンとが広い面積で接
続するようにしたものである。In the multilayer printed circuit board of the present invention, the insulating layer in the through-hole forming portion is provided with a concave portion opened on the surface on which the circuit pattern is formed, and the conductive paint is made to flow into the concave portion to form the conductive paint in the through-hole. The circuit pattern is connected in a large area.
【００１０】[0010]
【実施例】以下、この発明の実施例について図面に基づ
いて説明する。図１はこの発明の第一実施例を示すもの
で、この実施例の多層プリント基板１は、ガラスエポキ
シ樹脂やフェノール系樹脂を用いた絶縁性の樹脂フィル
ムであるプリプレグ２に、銅箔の回路パターン３を形成
したもので、プリプレグ２の厚さは、例えば０．３ｍｍ
程度であり、銅箔の厚さは数十μ程度である。この回路
パターン３の所定のランド部５には、スルーホール６が
形成される。また、回路パターン３が形成されたプリプ
レグ２は、複数枚積層され、その最下層のプリプレグ２
の裏面にも回路パターン４が形成されている。その積層
されたプリプレグ２のランド部５に、スルーホール６が
形成され、そのスルーホール６には、銀塗料等の導電性
塗料７が充填される。さらに、スルーホール６が形成さ
れた部分のプリプレグ２には、ランド部５の面方向に広
がった凹部８が形成されている。凹部８は、ランド部５
の表面が露出し、スルーホール６に連通している。Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a first embodiment of the present invention. A multilayer printed circuit board 1 of this embodiment has a circuit of copper foil on a prepreg 2 which is an insulating resin film using a glass epoxy resin or a phenol resin. The pattern 3 is formed, and the thickness of the prepreg 2 is 0.3 mm, for example.
The thickness of the copper foil is about several tens of μ. Through holes 6 are formed in predetermined land portions 5 of the circuit pattern 3. Further, a plurality of prepregs 2 having the circuit pattern 3 formed thereon are laminated, and the prepreg 2 at the lowermost layer is laminated.
The circuit pattern 4 is also formed on the back surface of the. Through holes 6 are formed in the land portions 5 of the laminated prepregs 2, and the through holes 6 are filled with a conductive paint 7 such as silver paint. Further, the prepreg 2 at the portion where the through hole 6 is formed is provided with a concave portion 8 which is widened in the surface direction of the land portion 5. The recess 8 is the land 5
Is exposed and communicates with the through hole 6.
【００１１】この実施例の多層プリント基板の製造方法
は、周知の方法によりプリプレグ２の表面に回路パター
ン３を形成する。また、その前または後で、プリプレグ
２のスルーホール形成部分に凹部８を形成する。この
後、各プリプレグ２を位置合わせして積層し、加熱して
貼り合わせる。そして、所定のスルーホール形成部分に
スルーホール６を、パンチまたはドリル等により形成す
る。この後、スルーホール６に導電性塗料７を充填し、
硬化させる。充填方法は、吸引または導電性塗料７を付
着させたピンにより塗布する方法等周知の方法で良い。
この時、スルーホール６から凹部８に導電性塗料７が流
入し、ランド部５に導電性塗料が付着し、スルーホール
６内の導電性塗料７と電気的に接続する。In the method of manufacturing the multilayer printed circuit board of this embodiment, the circuit pattern 3 is formed on the surface of the prepreg 2 by a known method. Further, before or after that, the recess 8 is formed in the through-hole forming portion of the prepreg 2. After that, the respective prepregs 2 are aligned and laminated, and heated to bond them. Then, the through hole 6 is formed in a predetermined through hole forming portion by punching or drilling. After that, the through hole 6 is filled with the conductive paint 7,
Let it cure. The filling method may be a known method such as a suction method or a method of applying with a pin to which the conductive paint 7 is attached.
At this time, the conductive paint 7 flows into the recess 8 from the through hole 6, the conductive paint adheres to the land 5 and is electrically connected to the conductive paint 7 in the through hole 6.
【００１２】この実施例の多層プリント基板によれば、
プリプレグ２を複数積層し回路パターン３の厚さも薄い
多層プリント基板であっても、スルーホール６と中間層
の回路パターン３との電気的接続を確実にすることがで
きるものである。According to the multilayer printed circuit board of this embodiment,
Even in the case of a multilayer printed circuit board in which a plurality of prepregs 2 are laminated and the thickness of the circuit pattern 3 is thin, the electrical connection between the through hole 6 and the circuit pattern 3 in the intermediate layer can be ensured.
【００１３】次に、この発明の多層プリント基板の第二
実施例について、図２〜図４を基にして説明する。この
実施例は、プリプレグ２の所定のスルーホール形成部分
に、ポリエステル系樹脂等の熱収縮性樹脂１０を金型成
形して挟み込んだり又は塗布により、プリプレグ２の加
熱接着時にその熱収縮性樹脂１０を収縮させ、ランド部
５に凹部１８を形成したものである。なお、用いる熱収
縮製樹脂１０は、塩化ビニルや、架橋ポリエチレン、シ
リコン樹脂であっても良い。また、この実施例では、回
路パターン３の表面にさらに銀塗料等の導電性塗料１２
を塗布し、ランド部５上の導電性塗料１２の厚みを厚く
したものである。特に、導電性塗料１２を印刷する場
合、導電性塗料１２中の不飽和ポリエステル樹脂に微粒
子シリカを充填材として付与し、チクソトロピー性を与
えて印刷する。充填材としては、Ａｅｒｏｓｉｌ（日本
アエロジル社製）が有名であり、他に短繊維アスベスト
系も用いることができる。Next, a second embodiment of the multilayer printed board according to the present invention will be described with reference to FIGS. In this embodiment, a heat-shrinkable resin 10 such as a polyester resin is molded and sandwiched or applied to a predetermined through-hole forming portion of the prepreg 2 when the prepreg 2 is heat-bonded. Is contracted to form a recess 18 in the land portion 5. The heat-shrinkable resin 10 used may be vinyl chloride, crosslinked polyethylene, or silicone resin. Further, in this embodiment, the surface of the circuit pattern 3 is further coated with a conductive paint 12 such as silver paint.
Is applied to increase the thickness of the conductive paint 12 on the land portion 5. In particular, when the conductive paint 12 is printed, finely divided silica is added as a filler to the unsaturated polyester resin in the conductive paint 12 to give thixotropic properties for printing. Aerosil (manufactured by Nippon Aerosil Co., Ltd.) is famous as a filler, and short fiber asbestos can also be used.
【００１４】この実施例の多層プリント基板の製造方法
は、第一実施例と同様に、周知の方法によりプリプレグ
２の表面に回路パターン３を形成する。また、回路パタ
ーン３の表面にさらに銀塗料等の導電性塗料１２を印刷
する。そして、プリプレグ２のスルーホール形成部分に
熱収縮性樹脂１０を塗布または貼り付ける。この後、図
２に示すように、各プリプレグ２を位置合わせして積層
し、加熱して貼り合わせる。この時、熱収縮性樹脂１０
が収縮し凹部１８が形成される。そして、図３に示すよ
うに、所定のスルーホール形成部分に、スルーホール６
をパンチまたはドリル等により形成する。この後、図４
に示すように、スルーホール６に導電性塗料７を充填
し、硬化させる。充填方法も上記実施例と同様である。
そして、スルーホール６から凹部１８に導電性塗料７が
流入し、ランド部５に導電性塗料７が付着し、スルーホ
ール６内の導電性塗料７と電気的に接続する。In the method for manufacturing the multilayer printed circuit board of this embodiment, the circuit pattern 3 is formed on the surface of the prepreg 2 by a known method as in the first embodiment. Further, a conductive paint 12 such as silver paint is printed on the surface of the circuit pattern 3. Then, the heat-shrinkable resin 10 is applied or attached to the through-hole forming portion of the prepreg 2. After that, as shown in FIG. 2, the prepregs 2 are aligned and laminated, and heated to bond them. At this time, the heat-shrinkable resin 10
Shrinks to form the recess 18. Then, as shown in FIG. 3, the through hole 6 is formed at a predetermined through hole forming portion.
Are formed by punching or drilling. After this,
As shown in, the through hole 6 is filled with the conductive paint 7 and cured. The filling method is the same as in the above embodiment.
Then, the conductive paint 7 flows from the through hole 6 into the concave portion 18, the conductive paint 7 is attached to the land portion 5, and electrically connected to the conductive paint 7 in the through hole 6.
【００１５】この実施例の多層プリント基板によれば、
凹部１８を形成する際に、熱収縮性樹脂１０を所定位置
に設けるだけで良く、凹部１８の形成工数を大幅に削減
することができる。また、回路パターン３の表面に導電
性塗料１２が塗布され、特にランド部５上で厚くなって
いるので、スルーホール６に充填された導電性樹脂７と
確実に接続し、凹部１８内でも確実に接続され、電気的
信頼性が高いものとすることができる。According to the multilayer printed circuit board of this embodiment,
When forming the concave portion 18, it is sufficient to provide the heat-shrinkable resin 10 at a predetermined position, and the number of steps for forming the concave portion 18 can be significantly reduced. Further, since the conductive paint 12 is applied to the surface of the circuit pattern 3 and is thick especially on the land portion 5, it is surely connected to the conductive resin 7 filled in the through hole 6 and also securely in the concave portion 18. Can be connected to, and have high electrical reliability.
【００１６】次に、この発明の多層プリント基板の第三
実施例について、図５を基にして説明する。この実施例
は、プリプレグ２の所定のスルーホール形成部分に、ス
チレン系樹脂例えば発泡ポリスチレン等の多孔質樹脂１
４を金型成形して挟み込んだり塗布し、プリプレグ２の
加熱接着時にその多孔質樹脂１４を硬化させたものや、
シート状の多孔質樹脂１４を挟み込んだものである。ま
た、この実施例でも、回路パターン３の表面にさらに銀
塗料等の導電性塗料１２を塗布し、ランド部５上の導電
性塗料１２の厚みを厚くしたものである。さらに、多孔
質樹脂１４自体に導電性物質を混合して、導電性樹脂と
することも可能であり、これにより、より確実な電気的
接続が可能となる。また、メッキにより、ランド部５や
多孔質樹脂１４の表面に導電層を形成しても良い。Next, a third embodiment of the multilayer printed board according to the present invention will be described with reference to FIG. In this embodiment, a styrene resin, for example, a porous resin 1 such as expanded polystyrene is provided in a predetermined through hole forming portion of the prepreg 2.
4 which is molded and sandwiched or applied, and the porous resin 14 is cured when the prepreg 2 is heat-bonded,
The sheet-shaped porous resin 14 is sandwiched. Also in this embodiment, the surface of the circuit pattern 3 is further coated with a conductive paint 12 such as silver paint to increase the thickness of the conductive paint 12 on the land portion 5. Furthermore, it is also possible to mix the porous resin 14 itself with a conductive substance to form a conductive resin, which enables more reliable electrical connection. Further, a conductive layer may be formed on the surface of the land portion 5 or the porous resin 14 by plating.
【００１７】この実施例の多層プリント基板の製造方法
は、第二実施例と同様であり、プリプレグ２のスルーホ
ール形成部分には、多孔質樹脂１４を塗布またはシート
状にして貼り付ける。この後、図５に示すように、各プ
リプレグ２を位置合わせして積層し、加熱して貼り合わ
せ、多孔質樹脂１４による凹部１８が形成され、多孔質
樹脂１４が硬化する。そして、図５に示すように、所定
のスルーホール形成位置にスルーホール６をパンチまた
はドリル等により形成し、導電性塗料７を充填し、硬化
させる。充填方法も上記実施例と同様である。そして、
スルーホール６から多孔質樹脂１４の孔部に導電性塗料
７が浸入し、ランド部５に導電性塗料が付着し、スルー
ホール６内の導電性塗料７と電気的に接続する。The method of manufacturing the multilayer printed circuit board of this embodiment is the same as that of the second embodiment, and the porous resin 14 is applied or sheet-shaped to the through hole forming portion of the prepreg 2. After that, as shown in FIG. 5, the prepregs 2 are aligned and laminated, heated and bonded to form a concave portion 18 of the porous resin 14, and the porous resin 14 is cured. Then, as shown in FIG. 5, through holes 6 are formed at predetermined through hole forming positions by punching or drilling, and the conductive coating material 7 is filled and cured. The filling method is the same as in the above embodiment. And
The conductive paint 7 infiltrates into the hole of the porous resin 14 from the through hole 6, the conductive paint adheres to the land portion 5, and is electrically connected to the conductive paint 7 in the through hole 6.
【００１８】尚、この発明の多層プリント基板は、積層
された回路パターンのスルーホール形成部分に回路パタ
ーンの面方向の凹部や多孔質樹脂の孔部が形成さたもの
であれば良く、その凹部の形状は問わない。また、多孔
質樹脂１４を形成する発泡体は、高温で分解してガスを
出す発泡体を使用するか、低沸点溶媒を溶解させてお
き、熱硬化時に気化することを利用するものでも良い。
さらに多孔質樹脂としては、シリコン樹脂、ポリエチレ
ン樹脂、ポリオレフィン樹脂、塩化ビニル樹脂、ポリプ
ロピレン樹脂、等を用い炭酸ガス等の気体や化学発泡剤
により発泡させた発泡体でも良く、さらにこれらの発泡
樹脂に、カーボンブラックや銀、銅等の導電製物質を添
加して、導電性発泡樹脂を形成しても良い。The multilayer printed circuit board of the present invention may be any one as long as a through hole forming portion of a laminated circuit pattern is formed with a concave portion in the surface direction of the circuit pattern or a hole portion of a porous resin, and the concave portion is formed. The shape does not matter. The foam forming the porous resin 14 may be a foam that decomposes at high temperature to generate a gas, or may be one in which a low boiling point solvent is dissolved and vaporized during thermosetting.
Further, as the porous resin, a silicone resin, a polyethylene resin, a polyolefin resin, a vinyl chloride resin, a polypropylene resin, or the like may be used as a foam made by foaming with a gas such as carbon dioxide gas or a chemical foaming agent. Alternatively, a conductive foaming resin may be formed by adding a conductive material such as carbon black, silver, or copper.
【００１９】[0019]
【発明の効果】この発明の多層プリント基板は、回路パ
ターンのスルーホール形成部分に、回路パターンに面し
た凹部が形成され、スルーホールに導電性樹脂を注入す
ることにより、積層された中間部の回路パターンの表面
に開口した凹部にや多孔質中に導電性樹脂が浸入し、ス
ルーホールと回路パターンの電気的接続の信頼性を、き
わめて高いものにすることができる。また、その導電性
も良好であり、電子機器の小型軽量化に大きく寄与す
る。さらに、この多層プリント基板の製造も容易であ
り、量産性が高いものである。According to the multilayer printed circuit board of the present invention, a concave portion facing the circuit pattern is formed in the through hole forming portion of the circuit pattern, and a conductive resin is injected into the through hole to form a laminated intermediate portion. The conductive resin infiltrates into the concave portion opened on the surface of the circuit pattern or into the porous material, and the reliability of the electrical connection between the through hole and the circuit pattern can be made extremely high. Further, its conductivity is also good, which greatly contributes to downsizing and weight saving of electronic devices. Further, this multilayer printed circuit board is easy to manufacture and has high mass productivity.
【図１】この発明の多層プリント基板の第一実施例の縦
断面図である。FIG. 1 is a vertical sectional view of a first embodiment of a multilayer printed circuit board according to the present invention.
【図２】この発明の多層プリント基板の第二実施例の製
造工程途中の縦断面図である。FIG. 2 is a vertical sectional view in the middle of a manufacturing process of a second embodiment of the multilayer printed circuit board according to the present invention.
【図３】この発明の多層プリント基板の第二実施例の次
の製造工程の縦断面図である。FIG. 3 is a vertical cross-sectional view of the next manufacturing process of the second embodiment of the multilayer printed circuit board according to the present invention.
【図４】この発明の多層プリント基板の第二実施例のス
ルーホール形成後の縦断面図である。FIG. 4 is a vertical cross-sectional view of a second embodiment of a multilayer printed board according to the present invention after through holes are formed.
【図５】この発明の多層プリント基板の第三実施例の次
の縦断面図である。FIG. 5 is a vertical cross-sectional view showing a third embodiment of the multilayer printed circuit board according to the present invention.
１ 多層プリント基板 ２ プリプレグ（絶縁層） ３ 回路パターン ５ ランド部 ６ スルーホール ８ 凹部 1 Multilayer printed circuit board 2 Prepreg (insulating layer) 3 Circuit pattern 5 Land part 6 Through hole 8 Recessed part
フロントページの続き (72)発明者 嘉藤 雅記 富山県上新川郡大沢野町下大久保3158番地 北陸電気工業株式会社内 (72)発明者 流 一郎 富山県上新川郡大沢野町下大久保3158番地 北陸電気工業株式会社内 (72)発明者 黒川 寛幸 富山県上新川郡大沢野町下大久保3158番地 北陸電気工業株式会社内Front page continued (72) Inventor Masaki Kato 3158 Shimookubo, Osawano-cho, Kamishinagawa-gun, Toyama Prefecture Hokuriku Electric Industry Co., Ltd. (72) Inventor Hiroyuki Kurokawa 3158 Shimookubo, Osawano-cho, Kamishinagawa-gun, Toyama Prefecture Hokuriku Electric Industry Co., Ltd.
Claims (6)
層され、この複数の回路パターンを貫通してスルーホー
ルが形成され、このスルーホールが形成された各絶縁層
と回路パターンとが接している部分の絶縁層に、その回
路パターン表面に開口した凹部が形成され、上記スルー
ホール及びこの凹部に導電性塗料が充填されている多層
プリント基板。1. A plurality of circuit patterns are laminated via an insulating layer, a through hole is formed through the plurality of circuit patterns, and each insulating layer having the through hole is in contact with the circuit pattern. A multi-layered printed circuit board, in which a concave portion opened on the surface of the circuit pattern is formed in the insulating layer in the existing portion, and the through hole and the concave portion are filled with a conductive paint.
分は、その回路パターンの他の部分より厚く形成されて
いる請求項１記載のプリント基板。2. The printed circuit board according to claim 1, wherein a portion of the circuit pattern where the hole is formed is thicker than other portions of the circuit pattern.
される導電性塗料が浸入可能な多孔質樹脂が充填されて
いる請求項１記載のプリント基板。3. The printed circuit board according to claim 1, wherein the concave portion is filled with a porous resin into which the conductive paint filling the through hole can enter.
もに、その絶縁層のスルーホール形成部分であって上記
回路パターンと接する部分に凹部を形成し、この絶縁層
を複数積層し、この積層した絶縁層を加熱して接合し、
上記スルーホール形成部分にスルーホールを形成し、そ
のスルーホール及び上記凹部に導電性塗料を流し込み固
化させる多層プリント基板の製造方法。4. A circuit pattern is formed on an insulating layer, and a concave portion is formed in a portion of the insulating layer where a through hole is formed and which is in contact with the circuit pattern. Heat the insulation layers to bond them together,
A method of manufacturing a multilayer printed circuit board, wherein a through hole is formed in the through hole forming portion, and a conductive coating material is poured into the through hole and the recess to solidify.
絶縁層のスルーホール形成部分であって上記回路パター
ンと接する部分に熱収縮性樹脂を積層し、この絶縁層を
複数積層し、この積層した絶縁層を加熱して接合し、上
記熱収縮性樹脂により凹部を形成し、この後上記スルー
ホール形成部分にスルーホールを形成し、そのスルーホ
ール及び上記凹部に導電性塗料を流し込み固化させる多
層プリント基板の製造方法。5. A circuit pattern is formed on an insulating layer, a heat-shrinkable resin is laminated on a portion of the insulating layer where a through hole is formed and which is in contact with the circuit pattern, and a plurality of the insulating layers are laminated. The laminated insulating layers are heated and bonded to form a recess by the heat shrinkable resin, and then a through hole is formed in the through hole forming portion, and a conductive paint is poured into the through hole and the recess to solidify. Manufacturing method of multilayer printed circuit board.
絶縁層のスルーホール形成部分であって上記回路パター
ンと接する部分に多孔質樹脂を積層し、この絶縁層を複
数積層し、この積層した絶縁層を加熱して接合し、この
後上記スルーホール形成部分にスルーホールを形成し、
そのスルーホール及び上記多孔質樹脂中に導電性塗料を
流し込み固化させる多層プリント基板の製造方法。6. A circuit pattern is formed on an insulating layer, a porous resin is laminated on a portion of the insulating layer where a through hole is formed and which is in contact with the circuit pattern, and a plurality of the insulating layers are laminated. The insulating layers are heated and bonded together, and then a through hole is formed in the above through hole forming portion,
A method for manufacturing a multilayer printed circuit board, comprising pouring a conductive coating material into the through hole and the porous resin to solidify the coating material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22581494A JPH0864966A (en) | 1994-08-25 | 1994-08-25 | Multilayer printed circuit board and manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22581494A JPH0864966A (en) | 1994-08-25 | 1994-08-25 | Multilayer printed circuit board and manufacturing method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0864966A true JPH0864966A (en) | 1996-03-08 |
Family
ID=16835220
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22581494A Pending JPH0864966A (en) | 1994-08-25 | 1994-08-25 | Multilayer printed circuit board and manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0864966A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6083340A (en) * | 1997-02-28 | 2000-07-04 | Hokuriku Electric Industry Co., Ltd. | Process for manufacturing a multi-layer circuit board |
| JP2010021269A (en) * | 2008-07-09 | 2010-01-28 | Fujikura Ltd | Through wiring board and method of manufacturing the same |
| KR20170084826A (en) * | 2016-01-13 | 2017-07-21 | 삼원액트 주식회사 | A Circuit Board |
-
1994
- 1994-08-25 JP JP22581494A patent/JPH0864966A/en active Pending
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6083340A (en) * | 1997-02-28 | 2000-07-04 | Hokuriku Electric Industry Co., Ltd. | Process for manufacturing a multi-layer circuit board |
| JP2010021269A (en) * | 2008-07-09 | 2010-01-28 | Fujikura Ltd | Through wiring board and method of manufacturing the same |
| KR20170084826A (en) * | 2016-01-13 | 2017-07-21 | 삼원액트 주식회사 | A Circuit Board |
| WO2017122974A3 (en) * | 2016-01-13 | 2018-08-02 | 삼원액트 주식회사 | Circuit board |
| US11291123B2 (en) | 2016-01-13 | 2022-03-29 | Samwon Act Co., Ltd. | Circuit board |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6645607B2 (en) | Method and structure for producing Z-axis interconnection assembly of printed wiring board elements | |
| JP2002359470A (en) | Printed circuit board and method of manufacturing the same | |
| KR970707709A (en) | METHOD OF MANUFACTURING MULTILAYER PRINTED CIRCUIT BOARD AND MULTILAYER PRINTED CIRCUIT BOARD AND METHOD OF PRODUCING MULTILAYER PRINTED CIRCUIT BOARD | |
| JP4742485B2 (en) | Multilayer printed wiring board and manufacturing method thereof | |
| JPH10284841A (en) | Manufacturing method of multilayer printed wiring board | |
| JP2000058986A (en) | Wiring board and method of manufacturing the same | |
| JPH0864966A (en) | Multilayer printed circuit board and manufacturing method | |
| WO2006118141A1 (en) | Multilayer wiring board and method for producing same | |
| JP3705370B2 (en) | Manufacturing method of multilayer printed wiring board | |
| JPS63241995A (en) | Multilayer printed circuit board and manufacture of the same | |
| JP2002185139A (en) | Printed wiring board and its manufacturing method | |
| TWI412313B (en) | Multilayer printing wire board and method for producting the same | |
| JP4803918B2 (en) | Manufacturing method of multilayer wiring board | |
| JP4199957B2 (en) | Manufacturing method of multilayer wiring board | |
| JPH05259600A (en) | Wiring board and manufacture thereof | |
| JP4803919B2 (en) | Manufacturing method of multilayer wiring board | |
| JP2001257470A (en) | Build-up multilayer printed wiring board and its manufacturing method | |
| JP2002314244A (en) | Core board, its manufacturing method, method for manufacturing multilayer core board using the same, and method for manufacturing multilayer laminated board | |
| JPH09199854A (en) | Multilayer interconnection board and manufacture thereof | |
| JP2621293B2 (en) | Printed circuit board manufacturing method | |
| JP5077801B2 (en) | Manufacturing method of multilayer printed wiring board | |
| JPH07221458A (en) | Multilayer printed wiring board | |
| JPH0129078B2 (en) | ||
| JP2002185134A (en) | Printed circuit board and its manufacturing method | |
| JPS6347158B2 (en) |