JPH09219499A - Method for manufacturing semiconductor memory device - Google Patents

Abstract

(57) Abstract: A semiconductor memory device having a high withstand voltage of a capacitor insulating film, high reliability, and a large capacity can be manufactured. A sidewall spacer composed of a SiO ₂ film 57 and a SiN film 56 is formed inside a polycrystalline Si film 55, and S
The iN film 62 covers the inside of the polycrystalline Si film 61. And
The SiN films 56 and 62 are made oxidation resistant films, and the polycrystalline Si films 55 and 61 outside the recess 16 are made SiO ₂ films 64 and 65.
The O ₂ films 64 and 65 and the SiN films 56 and 62 are removed by wet etching. As a result, a cylindrical storage node electrode made of the polycrystalline Si films 55 and 61 having a smooth surface and completely exposed is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor memory device called a DRAM and having a cylinder type storage node electrode.

[0002]

2. Description of the Related Art FIGS. 8 and 9 show a method of forming a storage node electrode in a conventional example of a method of manufacturing a DRAM in which a capacitor forming a memory cell has a double cylinder type storage node electrode. ing. In this conventional example, as shown in FIG. 8, a SiN film 12 is deposited on a base 11 such as an interlayer insulating film, and contact holes 13 for storage node electrodes are formed in the SiN film 12 and the base 11.

After that, the contact hole 13 is filled with a polycrystalline Si plug 14 and a SiO ₂ film 15 is deposited.
A portion of the O ₂ film 15 where the storage node electrode is to be formed is removed to form a recess 16. Then, the polycrystalline Si film 17 containing impurities and the SiO ₂ film 21 are sequentially deposited on the entire surface, and the entire surface of the SiO ₂ film 21 is etched back,
A side wall spacer made of this SiO ₂ film 21 is formed on the inner peripheral surface of the recess 16.

After that, the polycrystalline Si film 2 containing impurities
2 and SiO ₂ film 23 are sequentially deposited on the entire surface,
The entire surface of the ₂ film 23 is etched back to leave the SiO ₂ film 23 only inside the polycrystalline Si film 22 in the recess 16.

Next, using the SiO ₂ film 23 as a mask and the SiO ₂ films 15 and 21 as stoppers, polycrystalline Si is used.
RIE is performed on the films 22 and 17, and the SiN film 1
Using 2 as a stopper, the SiO ₂ films 15, 21 and 23 are wet-etched with dilute hydrofluoric acid. As a result, as shown in FIG. 9, a double cylinder type storage node electrode composed of the polycrystalline Si films 17 and 22 is formed.

[0006]

However, in the above-mentioned conventional example, since RIE which is anisotropic etching is performed on the polycrystalline Si films 22 and 17, the deposition is performed as shown in FIG. Roughness of the surface of the polycrystalline Si films 22 and 17, which is considered to be caused by the unevenness of the surface of the polycrystalline Si film 22 and the RIE itself, which are sometimes formed, is a double cylinder type storage node composed of the polycrystalline Si films 17 and 22. It was directly transferred to the tip of the electrode.

When the surface of the storage node electrode is thus roughened, electric field concentration occurs in the capacitor insulating film (not shown) covering the storage node electrode, making it difficult to reduce the thickness of the capacitor insulating film and ensure the dielectric strength. . Therefore, in the above-described conventional example, it is difficult to manufacture a large-capacity DRAM or a highly reliable DRAM by securing a necessary memory cell capacity even with a small memory cell area.

[0008]

A method of manufacturing a semiconductor memory device according to claim 1, wherein a memory cell is formed by using a capacitor, and a storage node electrode of the capacitor is a cylinder type. In the step of forming a first semiconductor oxide film having a recess in a portion where the storage node electrode is to be formed, a step of forming a semiconductor film over the entire surface after forming the semiconductor oxide film, And a step of covering the portion in the recess with an oxidation resistant film,
Oxidizing the semiconductor film using the oxidation resistant film as a mask,
A step of forming a portion of the semiconductor film other than the concave portion into a second semiconductor oxide film; and a step of removing the first and second semiconductor oxide films and the oxidation resistant film by wet etching. Is characterized by.

A method of manufacturing a semiconductor memory device according to claim 2 is
Forming a sidewall spacer made of a third semiconductor oxide film and the oxidation resistant film on the inner peripheral surface of the semiconductor film in the recess; and forming a plurality of layers of the semiconductor film via the sidewall spacer. And a step of removing the third semiconductor oxide film by the wet etching.

In the method of manufacturing a semiconductor memory device according to the first aspect, the semiconductor film outside the recess is made into a semiconductor oxide film by oxidation using the oxidation resistant film as a mask, and the semiconductor film is isotropically and well controlled. Therefore, the oxidation proceeds without roughening the surface of the semiconductor film, leaving a semiconductor film having a smooth interface with the semiconductor oxide film.

Moreover, the semiconductor oxide film and the oxidation resistant film are removed by wet etching, and the wet etching can increase the etching selection ratio between the semiconductor film and the semiconductor oxide film and the oxidation resistant film, and is narrow. Since it is possible to perform etching on the gap,
The semiconductor oxide film and the oxidation resistant film can be reliably removed.

Therefore, a cylindrical storage node electrode made of a semiconductor film having a smooth surface and completely exposed is formed corresponding to the shape of the recess formed in the portion where the storage node electrode is to be formed. You can

In the method of manufacturing a semiconductor memory device according to the second aspect of the present invention, since a plurality of layers of semiconductor films are formed through the side wall spacers composed of the semiconductor oxide film and the oxidation resistant film, the portion where the storage node electrode is to be formed. It is possible to form a multi-cylinder type storage node electrode made of a semiconductor film having a smooth surface and being completely exposed, corresponding to the shape of the recess formed in the above.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of the present invention applied to the manufacture of a DRAM in which a capacitor forming a memory cell has a double cylinder type storage node electrode will be described below.
This will be described with reference to FIGS. However, FIGS.
Only the method of forming the storage node electrode is shown, and FIG.
The whole memory cell and a part of peripheral circuit are shown.

In this embodiment, as shown in FIG. 7, a SiO ₂ film 32 is formed on the surface of a Si substrate 31 by the LOCOS method to determine an element isolation region, and an element surrounded by this SiO ₂ film 32 is formed. Si as a gate oxide film on the surface of the active region
The O ₂ film 33 is formed by thermal oxidation.

[0016] Then, a tungsten polycide layer 34 and the SiO ₂ film 35 are sequentially deposited, these SiO ₂
The film 35 and the tungsten polycide layer 34 are processed into patterns of word lines of the memory cell array section 36 and gate electrodes of the peripheral circuit section 37. The word line of the memory cell array section 36 also serves as the gate electrode of the transistor that constitutes the memory cell.

Then, using the SiO ₂ films 35 and 32 as a mask, impurities are ion-implanted into the Si substrate 31, and the transistor 4 having a diffusion layer 38 as a source / drain is formed.
After manufacturing 1, the SiO ₂ film 42 is deposited on the entire surface.

After that, the entire surface of the SiO ₂ film 42 is etched back to form the tungsten polycide layer 34 and the SiO ₂ film.
A sidewall spacer made of a SiO ₂ film 42 is formed on the side surface of the film 35, and the diffusion layer 3 is formed in the memory cell array portion 36.
The contact hole 43 reaching 8 is formed in self-alignment with the tungsten polycide layer 34.

After that, the contact hole 43 is filled with a polycrystalline Si plug 44, a polycrystalline Si film 45 containing impurities is deposited on the entire surface, and then the polycrystalline Si film 45 is left only on the polycrystalline Si plug 44. I do. Then, a flat interlayer insulating film 46 is formed, and a contact hole 47 for a bit line is opened in the interlayer insulating film 46.

After that, a tungsten polycide layer 51 and a SiO ₂ film 52 are sequentially deposited, and a contact hole 47 is formed.
The SiO ₂ film 52 and the tungsten polycide layer 51 are formed on the pattern of the bit line connected to the polycrystalline Si film 45 via the
And are processed. Then, the SiO ₂ film 53 is deposited on the entire surface, and the entire surface of the SiO ₂ film 53 is etched back to form sidewall spacers made of the SiO ₂ film 53 on the side surfaces of the tungsten polycide layer 51 and the SiO ₂ film 52.

Thereafter, a flat interlayer insulating film 54 is formed,
As shown in FIG. 1, the SiN film 12 is deposited on the interlayer insulating film 54. Then, the contact hole 13 for the storage node electrode is opened in the base 11 such as the interlayer insulating film 54, and the contact hole 13 is filled with the polycrystalline Si plug 14.

Then, a SiO ₂ film 15 is deposited, and a portion of the SiO ₂ film 15 where the storage node electrode is to be formed is removed by RIE to form a recess 16. The thickness of the SiO ₂ film 15 is determined by the required memory cell capacity,
It is about 300 to 700 nm.

Then, a polycrystalline Si film 55 having a film thickness of about 50 to 100 nm and containing impurities is deposited by a low pressure CVD method, and a SiN film 56 having a film thickness of 10 nm or less is formed on the polycrystalline Si film.
A SiO ₂ film 5 deposited on the film 55 and further having a film thickness of about 50 to 100 nm by a low pressure CVD method using TEOS as a raw material.
7 is deposited on the SiN film 56.

Next, by etching back the entire surface of the SiO ₂ film 57 and the SiN film 56, as shown in FIG. 2, the inner peripheral surface of the polycrystalline Si film 55 in the recess 16, the SiO ₂ film 57 and S
A sidewall spacer made of the iN film 56 is formed. On this occasion,
The SiN film 56 is surely removed so that the SiN film 56 is not left on the polycrystalline Si film 55 outside the recess 16. Then, a polycrystalline Si film 61 and a SiN film 62 similar to the polycrystalline Si film 55 and the SiN film 56 are sequentially deposited, and further,
The SiO ₂ film 63 is deposited.

Next, the entire surfaces of the SiO ₂ film 63 and the SiN film 62 are etched back, and as shown in FIG. 3, only the inside of the polycrystalline Si film 61 in the recess 16 is covered with the SiO ₂ film 63 and the S.
The iN film 62 is left. Also in this case, the polycrystalline Si outside the recess 16
The SiN film 62 is surely removed so that the SiN film 62 is not left on the film 61.

Next, as shown in FIG. 4, each of the polycrystalline Si films 55 and 61 is changed into SiO ₂ films 64 and 65 by pyrogenic oxidation, respectively. At this time, the portions of the polycrystalline Si films 55, 61 which are in contact with the SiN films 56, 62 are hardly oxidized due to the oxidation resistance of the SiN films 56, 62 and are in contact with the SiN films 56, 62. Even if not, the portion inside the recess 16 is not oxidized until the portion outside the recess 16 is oxidized.

Since Si is isotropically oxidized with good controllability, the oxidation proceeds without roughening the surfaces of the polycrystalline Si films 55 and 61, and the interfaces with the SiO ₂ films 64 and 65 are smooth. Polycrystalline Si films 55 and 61 remain. In addition, the transistor 41 and the polycrystalline Si film 55, which have already been manufactured,
Since the SiN film 12 having oxidation resistance is formed between the SiN film 61 and the like, the pyrogenic oxidation for forming the SiO ₂ films 64 and 65 does not affect the transistor 41.

However, in order to suppress re-diffusion of the diffusion layer 38, it is necessary to perform pyrogenic oxidation at a low temperature for a short time. Therefore, it is necessary to select a condition with a high oxidation rate even at a low temperature. By increasing the number and increasing the pressure, the SiO ₂ films 64 and 65 can be sufficiently formed even by pyrogenic oxidation at 850 ° C. for about 30 minutes.

Next, by wet etching with dilute hydrofluoric acid, as shown in FIG. 5, SiO ₂ films 57, 63, ₆ are formed.
4, 65 are removed, and the SiN films 56, 62 are removed by wet etching with hot phosphoric acid at about 160 to 180 ° C. as shown in FIG.

As a result, a double cylinder type storage node electrode composed of polycrystalline Si films 55 and 61 having a smooth surface and being completely exposed is formed. Since the film thickness of the SiN film 12 is much thicker than the film thickness of the SiN films 56 and 62, the SiN film is wet-etched with hot phosphoric acid.
The membrane 12 does not disappear.

Next, as shown in FIG. 7 again, an ONO film 66 as a capacitor insulating film and a polycrystalline S containing impurities are used.
The i film 67 and the polycrystalline Si film 67 and the ONO film are sequentially formed.
The film 71 and the SiN film 12 are processed into a plate electrode pattern to manufacture a capacitor 71.

Thereafter, a flat interlayer insulating film 72 is formed,
Contact hole 73 reaching diffusion layer 38 of peripheral circuit portion 37
Are opened in the interlayer insulating films 72, 54 and 46. Then, the contact hole 73 is filled with the barrier metal film 74 and the tungsten plug 75 formed by the blanket CVD method.

After that, a barrier metal film 76 and a first-layer Al film 77 are sequentially formed, and the Al film 77 and the barrier metal film 76 are processed into a wiring pattern. Then, an Al film (not shown) and a surface protective film on the second and subsequent layers are further formed to complete this DRAM.

The DRAM manufactured in the above embodiment
In the above, although the capacitor 71 forming the memory cell has a double cylinder type storage node electrode, the storage node electrode does not need to be a double cylinder type, and may be a single cylinder type or a triple or more cylinder type. It may be a storage node electrode.

[0035]

According to the method of manufacturing a semiconductor memory device of the first aspect of the present invention, a cylinder type storage node electrode made of a semiconductor film having a smooth surface and completely exposed can be formed. It is possible to prevent local electric field concentration, obtain a wide charge storage area, and thin the capacitor insulating film.

Therefore, a semiconductor memory device having a high withstand voltage of the capacitor insulating film and high reliability, a small memory cell area for obtaining a required memory cell capacity, and a large capacity can be manufactured. You can

In the method of manufacturing a semiconductor memory device according to a second aspect of the present invention, since a multi-cylinder type storage node electrode made of a semiconductor film having a smooth surface and completely exposed can be formed, the capacity can be further increased. A possible semiconductor memory device can be manufactured.

[Brief description of drawings]

FIG. 1 is a side sectional view showing a first step for forming a storage node electrode according to an embodiment of the present invention.

FIG. 2 is a side sectional view showing a step that follows FIG.

FIG. 3 is a side sectional view showing a step following FIG. 2;

FIG. 4 is a side sectional view showing a step following FIG. 3;

FIG. 5 is a side sectional view showing a step following FIG. 4;

FIG. 6 is a side sectional view showing a step following FIG. 5;

FIG. 7 is a side sectional view of a DRAM manufactured in one embodiment.

FIG. 8 is a side sectional view showing a first step for forming a storage node electrode in the conventional example of the present invention.

9 is a side sectional view showing a step that follows FIG.

[Explanation of symbols]

15 SiO ₂ Film 16 Recess 55 Polycrystalline Si Film 56 SiN Film 57 SiO ₂ Film 61 Polycrystalline Si Film 62 SiN Film 64 SiO ₂ Film 65 SiO ₂ Film 71 Capacitor

Claims (2)

[Claims] 1. A method for manufacturing a semiconductor memory device, wherein a memory cell is formed by using a capacitor, and a storage node electrode of the capacitor is a cylinder type, wherein a recess is provided in a portion where the storage node electrode is to be formed. Forming a semiconductor oxide film, forming a semiconductor oxide film on the entire surface after forming the semiconductor oxide film, covering a portion of the semiconductor film in the recess with an oxidation resistant film, Oxidizing the semiconductor film using the oxidation resistant film as a mask,
A step of forming a portion of the semiconductor film other than the concave portion as a second semiconductor oxide film; and a step of removing the first and second semiconductor oxide films and the oxidation resistant film by wet etching. And a method for manufacturing a semiconductor memory device. 2. The inner peripheral surface of the semiconductor film in the recess,
A step of forming a sidewall spacer made of a third semiconductor oxide film and the oxidation resistant film; a step of forming a plurality of layers of the semiconductor film via the sidewall spacer; and a step of forming the third semiconductor oxide film in the wet state. The method of manufacturing a semiconductor memory device according to claim 1, further comprising a step of removing by etching.