JPS5210087A - Structure of semiconductor integrated circuit - Google Patents

Structure of semiconductor integrated circuit

Info

Publication number
JPS5210087A
JPS5210087A JP50086408A JP8640875A JPS5210087A JP S5210087 A JPS5210087 A JP S5210087A JP 50086408 A JP50086408 A JP 50086408A JP 8640875 A JP8640875 A JP 8640875A JP S5210087 A JPS5210087 A JP S5210087A
Authority
JP
Japan
Prior art keywords
integrated circuit
semiconductor integrated
pnp
fet
charged carrier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP50086408A
Other languages
English (en)
Other versions
JPS5845827B2 (ja
Inventor
Satoru Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP50086408A priority Critical patent/JPS5845827B2/ja
Publication of JPS5210087A publication Critical patent/JPS5210087A/ja
Publication of JPS5845827B2 publication Critical patent/JPS5845827B2/ja
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic
    • H10D84/655—Integrated injection logic using field effect injector structures

Landscapes

  • Bipolar Integrated Circuits (AREA)
  • Logic Circuits (AREA)
JP50086408A 1975-07-15 1975-07-15 半導体集積回路 Expired JPS5845827B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP50086408A JPS5845827B2 (ja) 1975-07-15 1975-07-15 半導体集積回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50086408A JPS5845827B2 (ja) 1975-07-15 1975-07-15 半導体集積回路

Publications (2)

Publication Number Publication Date
JPS5210087A true JPS5210087A (en) 1977-01-26
JPS5845827B2 JPS5845827B2 (ja) 1983-10-12

Family

ID=13886026

Family Applications (1)

Application Number Title Priority Date Filing Date
JP50086408A Expired JPS5845827B2 (ja) 1975-07-15 1975-07-15 半導体集積回路

Country Status (1)

Country Link
JP (1) JPS5845827B2 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57118664A (en) * 1981-01-16 1982-07-23 Fuji Xerox Co Ltd Semiconductor device
US4395723A (en) * 1980-05-27 1983-07-26 Eliyahou Harari Floating substrate dynamic RAM cell with lower punch-through means
JPS6478624A (en) * 1987-06-29 1989-03-24 Tsubakimoto Chain Co Storing and carrying device for heavy object

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4395723A (en) * 1980-05-27 1983-07-26 Eliyahou Harari Floating substrate dynamic RAM cell with lower punch-through means
JPS57118664A (en) * 1981-01-16 1982-07-23 Fuji Xerox Co Ltd Semiconductor device
JPS6478624A (en) * 1987-06-29 1989-03-24 Tsubakimoto Chain Co Storing and carrying device for heavy object

Also Published As

Publication number Publication date
JPS5845827B2 (ja) 1983-10-12

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