JPS5294704A - Channel network - Google Patents

Channel network

Info

Publication number
JPS5294704A
JPS5294704A JP1034976A JP1034976A JPS5294704A JP S5294704 A JPS5294704 A JP S5294704A JP 1034976 A JP1034976 A JP 1034976A JP 1034976 A JP1034976 A JP 1034976A JP S5294704 A JPS5294704 A JP S5294704A
Authority
JP
Japan
Prior art keywords
channel network
channel
restraining
output voltage
driver circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1034976A
Other languages
Japanese (ja)
Inventor
Toshiaki Toyama
Takuji Mukaemachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1034976A priority Critical patent/JPS5294704A/en
Publication of JPS5294704A publication Critical patent/JPS5294704A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/52—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements
    • H04Q3/521—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements using semiconductors in the switching stages

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To realize low-noise channel network by increasing gradually the output voltage of driver circuit at closing time of the channel and then by restraining the spike current.
JP1034976A 1976-02-04 1976-02-04 Channel network Pending JPS5294704A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1034976A JPS5294704A (en) 1976-02-04 1976-02-04 Channel network

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1034976A JPS5294704A (en) 1976-02-04 1976-02-04 Channel network

Publications (1)

Publication Number Publication Date
JPS5294704A true JPS5294704A (en) 1977-08-09

Family

ID=11747702

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1034976A Pending JPS5294704A (en) 1976-02-04 1976-02-04 Channel network

Country Status (1)

Country Link
JP (1) JPS5294704A (en)

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