JPS5492026A - Memory access processing method - Google Patents

Memory access processing method

Info

Publication number
JPS5492026A
JPS5492026A JP15890977A JP15890977A JPS5492026A JP S5492026 A JPS5492026 A JP S5492026A JP 15890977 A JP15890977 A JP 15890977A JP 15890977 A JP15890977 A JP 15890977A JP S5492026 A JPS5492026 A JP S5492026A
Authority
JP
Japan
Prior art keywords
memory
address
constitution
floating
processing method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15890977A
Other languages
Japanese (ja)
Other versions
JPS5847783B2 (en
Inventor
Akira Hattori
Yukio Soma
Takamitsu Tsuchimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP52158909A priority Critical patent/JPS5847783B2/en
Publication of JPS5492026A publication Critical patent/JPS5492026A/en
Publication of JPS5847783B2 publication Critical patent/JPS5847783B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To simplify the constitution of hardware and facilitate changing of constitution of memory system by executing the corresponding process by the floating memory address converting memory in the floating memory address method. CONSTITUTION:This method is provided with memory modules 2-0.2-1...2-n with plural number of memory banks 5-00-5-03 that are independently accessible each other, selects banks 5-00-5-03 according to the bit data in the address information given from address register 1 and is provided with a floating memory address conversion memory 6 by the processing method with which the matching of bit information and bank 5-00-5-03 is made variable. Then, an address position matching to the bit information in the ratio 1:1 is given to this memory 6 and the designated information which designates one of the memory unit is stored in this address position in the re-writing form. The contents that have been read out from memory 6 are decoded by decoder 7 and bands 5-00-5-03 are selected according to the contents.
JP52158909A 1977-12-29 1977-12-29 Memory access processing method Expired JPS5847783B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52158909A JPS5847783B2 (en) 1977-12-29 1977-12-29 Memory access processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52158909A JPS5847783B2 (en) 1977-12-29 1977-12-29 Memory access processing method

Publications (2)

Publication Number Publication Date
JPS5492026A true JPS5492026A (en) 1979-07-20
JPS5847783B2 JPS5847783B2 (en) 1983-10-25

Family

ID=15681990

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52158909A Expired JPS5847783B2 (en) 1977-12-29 1977-12-29 Memory access processing method

Country Status (1)

Country Link
JP (1) JPS5847783B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58213361A (en) * 1982-06-07 1983-12-12 Hitachi Ltd Storage controller

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5177141A (en) * 1974-12-27 1976-07-03 Nippon Electric Co

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5177141A (en) * 1974-12-27 1976-07-03 Nippon Electric Co

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58213361A (en) * 1982-06-07 1983-12-12 Hitachi Ltd Storage controller

Also Published As

Publication number Publication date
JPS5847783B2 (en) 1983-10-25

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