JPS55107328A - Binary system for analogous signal - Google Patents

Binary system for analogous signal

Info

Publication number
JPS55107328A
JPS55107328A JP1366779A JP1366779A JPS55107328A JP S55107328 A JPS55107328 A JP S55107328A JP 1366779 A JP1366779 A JP 1366779A JP 1366779 A JP1366779 A JP 1366779A JP S55107328 A JPS55107328 A JP S55107328A
Authority
JP
Japan
Prior art keywords
signal
circuit
binary
level
discrimination
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1366779A
Other languages
Japanese (ja)
Inventor
Kenji Kurihara
Kunio Saito
Bunjiro Tsujiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP1366779A priority Critical patent/JPS55107328A/en
Publication of JPS55107328A publication Critical patent/JPS55107328A/en
Pending legal-status Critical Current

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Abstract

PURPOSE: To obtain a stable binary signal, by constituting the system with the circuit binarizing analogous signal with a plurality of scheduled levels through discrimination, the circuit judging pattern in response to the change in level, and circuit selecting the binary signal.
CONSTITUTION: The analogous signal S from the analogous signal source 1 is discriminated for the level with the set signals of the set signal sources J-, J0, J+ different respectively in the level to output the binary signals Q-, Q0, Q+. The binary signal Q0 discriminated at the center level of the signal S is inputted to the discrimination circuit M. The circuit M discriminates the level change pattern of the signal S based on the binary signal Q0 to output the discrimination output signals X-, inversion X-, X+, inversion X + to the selection circuit D, where the binary signal in response to the discrimination output of the circuit M is selected among the binary signals Q-, Q0, Q+ and the binary signal Q of the signal S is outputted to the terminal K in stable state.
COPYRIGHT: (C)1980,JPO&Japio
JP1366779A 1979-02-08 1979-02-08 Binary system for analogous signal Pending JPS55107328A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1366779A JPS55107328A (en) 1979-02-08 1979-02-08 Binary system for analogous signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1366779A JPS55107328A (en) 1979-02-08 1979-02-08 Binary system for analogous signal

Publications (1)

Publication Number Publication Date
JPS55107328A true JPS55107328A (en) 1980-08-18

Family

ID=11839536

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1366779A Pending JPS55107328A (en) 1979-02-08 1979-02-08 Binary system for analogous signal

Country Status (1)

Country Link
JP (1) JPS55107328A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60176324A (en) * 1984-02-22 1985-09-10 Pioneer Electronic Corp Waveform shaping circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5246748A (en) * 1975-10-09 1977-04-13 Mitsubishi Electric Corp Schmidt circuit
JPS5372419A (en) * 1976-12-09 1978-06-27 Matsushita Graphic Communic Binary discriminator

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5246748A (en) * 1975-10-09 1977-04-13 Mitsubishi Electric Corp Schmidt circuit
JPS5372419A (en) * 1976-12-09 1978-06-27 Matsushita Graphic Communic Binary discriminator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60176324A (en) * 1984-02-22 1985-09-10 Pioneer Electronic Corp Waveform shaping circuit

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