JPS5526681A - Semiconductor device and its manufacturing method - Google Patents

Semiconductor device and its manufacturing method

Info

Publication number
JPS5526681A
JPS5526681A JP10023478A JP10023478A JPS5526681A JP S5526681 A JPS5526681 A JP S5526681A JP 10023478 A JP10023478 A JP 10023478A JP 10023478 A JP10023478 A JP 10023478A JP S5526681 A JPS5526681 A JP S5526681A
Authority
JP
Japan
Prior art keywords
wiring
layer
region
alloy layer
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10023478A
Other languages
Japanese (ja)
Inventor
Makoto Uehara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10023478A priority Critical patent/JPS5526681A/en
Publication of JPS5526681A publication Critical patent/JPS5526681A/en
Pending legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE: To avoid a junction-penetration due to Al-Si alloy layer by forming a Si layer by a plasma CVD process at a low temperature less than 400°C in covering an Al-Si wiring layer over a diffusion layer formed in a semiconductor substrate.
CONSTITUTION: A junction region 12 having an opposite conduction mode is formed on a semiconductor substrate 11 to cover the full surface with a SiO2 film 13, an opening is provided on the region 12 to mount an Al wiring electrode 14 over the full surface in contact with the region 12. Subsequently, a lamination is given to the wiring 14 to grow a multi-crystal Si wiring 17, and a wiring having a two- layer construction is formed. In this case, in order to form the wiring 17, a SiH4 gas is activated into a plasma state at a low temperature under 400°C, the wiring 17 is grown on the wiring 14 by using the gas activated. According to such a method, no substantial Al-Si alloy layer 15 is formed between the region 12 and wiring 14 and a penetration of the junction 12 due to the alloy layer 15 can be avoided. Also, an Al-Si alloy layer 16 formed on the wiring 17 can be uniform thickness.
COPYRIGHT: (C)1980,JPO&Japio
JP10023478A 1978-08-16 1978-08-16 Semiconductor device and its manufacturing method Pending JPS5526681A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10023478A JPS5526681A (en) 1978-08-16 1978-08-16 Semiconductor device and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10023478A JPS5526681A (en) 1978-08-16 1978-08-16 Semiconductor device and its manufacturing method

Publications (1)

Publication Number Publication Date
JPS5526681A true JPS5526681A (en) 1980-02-26

Family

ID=14268570

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10023478A Pending JPS5526681A (en) 1978-08-16 1978-08-16 Semiconductor device and its manufacturing method

Country Status (1)

Country Link
JP (1) JPS5526681A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63159113A (en) * 1986-12-22 1988-07-02 Yokohama Rubber Co Ltd:The Pneumatic tire

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63159113A (en) * 1986-12-22 1988-07-02 Yokohama Rubber Co Ltd:The Pneumatic tire

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