JPS5529170A - Both-side exposing apparatus for semiconductor wafer - Google Patents
Both-side exposing apparatus for semiconductor waferInfo
- Publication number
- JPS5529170A JPS5529170A JP10306578A JP10306578A JPS5529170A JP S5529170 A JPS5529170 A JP S5529170A JP 10306578 A JP10306578 A JP 10306578A JP 10306578 A JP10306578 A JP 10306578A JP S5529170 A JPS5529170 A JP S5529170A
- Authority
- JP
- Japan
- Prior art keywords
- masks
- wafer
- vertical
- space
- semiconductor wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
PURPOSE: To reduce the amout of dust adhering on the photosensitive emulsion coated on the surface of a wafer by disposing the first and second masks comprising the exposing apparatus in vertical and with a space from each other and then inserting the semiconductor wafer between these two masks in vertical too.
CONSTITUTION: First and second masks 1 and 2 held on mask holders 3 and 4 respectively, are disposed in vertical and with a predetermined space from each other, and further first and second lamps 5 and 6 are placed at each outerside of the mask holders. Next, a slide block 10 loading an alignment plate to line up semiconductor wafers 13 along either side of the holders 3 and 4 is provided. Between the block 10 and the masks 1 and 2 mounted is a rail 14 for sliding each wafer 13. In this arrangement, each wafer 13 coated with photosensitive emulsion on both sides is pushed out on the rail 14 in turn and then moved into the space between the masks 1 and 2 by means of feeding claws 18 and 19 held on a fixed cam plate 24.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10306578A JPS5529170A (en) | 1978-08-23 | 1978-08-23 | Both-side exposing apparatus for semiconductor wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10306578A JPS5529170A (en) | 1978-08-23 | 1978-08-23 | Both-side exposing apparatus for semiconductor wafer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5529170A true JPS5529170A (en) | 1980-03-01 |
Family
ID=14344259
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10306578A Pending JPS5529170A (en) | 1978-08-23 | 1978-08-23 | Both-side exposing apparatus for semiconductor wafer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5529170A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60214530A (en) * | 1984-04-10 | 1985-10-26 | Matsushita Electric Ind Co Ltd | Double exposure method |
-
1978
- 1978-08-23 JP JP10306578A patent/JPS5529170A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60214530A (en) * | 1984-04-10 | 1985-10-26 | Matsushita Electric Ind Co Ltd | Double exposure method |
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