JPS5531387A - Muting circuit of fm receiver - Google Patents

Muting circuit of fm receiver

Info

Publication number
JPS5531387A
JPS5531387A JP10539078A JP10539078A JPS5531387A JP S5531387 A JPS5531387 A JP S5531387A JP 10539078 A JP10539078 A JP 10539078A JP 10539078 A JP10539078 A JP 10539078A JP S5531387 A JPS5531387 A JP S5531387A
Authority
JP
Japan
Prior art keywords
signal
direct
generating circuit
level
vca3
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10539078A
Other languages
Japanese (ja)
Inventor
Junichi Shibata
Hiroki Aizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pioneer Corp
Original Assignee
Pioneer Electronic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pioneer Electronic Corp filed Critical Pioneer Electronic Corp
Priority to JP10539078A priority Critical patent/JPS5531387A/en
Publication of JPS5531387A publication Critical patent/JPS5531387A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/34—Muting amplifier when no signal is present
    • H03G3/341—Muting when no signals or only weak signals are present

Landscapes

  • Noise Elimination (AREA)

Abstract

PURPOSE:To reduce noises without letting a listener feel a physical disorder due to muting by making a signal attenuation value in muting operation correspond to a demodulation level right before an electric field becomes slight. CONSTITUTION:Intermediate frequency signal A is inputted to direct-current voltage generating circuit 1 via capacitor C1. On detecting the level of signal A, circuit 1 develops a direct-current voltage across control voltage generating circuit 2 in proportion to signal A. Demodulated signal B, on the other hand, is inputted to voltage control attenuator CVA3 via capacitor C2. The output of VCA3 is led out via capacitor C3 and also inputted to direct-current voltage generating circuit 4, which outputs direct-current voltage E in proportion to the level. Control voltage generating circuit 2 adds applied voltages C and E and applies control voltage G, corresponding to the addition output, to VCA3. In inverse proportion of voltage G, VCA3 increases in attenuation value; when the level of signal B is large, the attenuation value is small and when small, it is large, so that demodulated signal F will be outputted.
JP10539078A 1978-08-29 1978-08-29 Muting circuit of fm receiver Pending JPS5531387A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10539078A JPS5531387A (en) 1978-08-29 1978-08-29 Muting circuit of fm receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10539078A JPS5531387A (en) 1978-08-29 1978-08-29 Muting circuit of fm receiver

Publications (1)

Publication Number Publication Date
JPS5531387A true JPS5531387A (en) 1980-03-05

Family

ID=14406310

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10539078A Pending JPS5531387A (en) 1978-08-29 1978-08-29 Muting circuit of fm receiver

Country Status (1)

Country Link
JP (1) JPS5531387A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5711539A (en) * 1980-06-24 1982-01-21 Toa Tokushu Denki Kk Squelch circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5711539A (en) * 1980-06-24 1982-01-21 Toa Tokushu Denki Kk Squelch circuit

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