JPS5611552A - Measuring unit for number of event produced - Google Patents

Measuring unit for number of event produced

Info

Publication number
JPS5611552A
JPS5611552A JP8665779A JP8665779A JPS5611552A JP S5611552 A JPS5611552 A JP S5611552A JP 8665779 A JP8665779 A JP 8665779A JP 8665779 A JP8665779 A JP 8665779A JP S5611552 A JPS5611552 A JP S5611552A
Authority
JP
Japan
Prior art keywords
register
value
stored
unit time
stage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8665779A
Other languages
Japanese (ja)
Inventor
Noritaka Umeno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8665779A priority Critical patent/JPS5611552A/en
Publication of JPS5611552A publication Critical patent/JPS5611552A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To strictly monitor the number of events produced, by counting the number of events produced with the timing signal generated every unit time, storing the count value to the front stage register, shift register and post-stage register, and outputting the value obtained from addition and subtraction of the stored value.
CONSTITUTION: The timing circuit 14 generates the timing signal 32 every unit time, the value of the counter 10 is stored in the front stage register 15, the value of the register 15 is stored to the most front stage of the shift register 11 of m-bit× (n-1) stages, the register 11 is shifted, and the value in the most post-stage is stored in the post-stage register 12. Next, the value of the register 15 is added to the value of the register 13 by using the addition and subtraction circuit 16, the value of the register 12 is subtracted, and the value sightly delayed 17 than unit time is output 31. Thus, the number of events produced at a given time interval is output every unit time, allowing to strictly monitor whether or not the number of events produced exceeds the upper and lower limit.
COPYRIGHT: (C)1981,JPO&Japio
JP8665779A 1979-07-09 1979-07-09 Measuring unit for number of event produced Pending JPS5611552A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8665779A JPS5611552A (en) 1979-07-09 1979-07-09 Measuring unit for number of event produced

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8665779A JPS5611552A (en) 1979-07-09 1979-07-09 Measuring unit for number of event produced

Publications (1)

Publication Number Publication Date
JPS5611552A true JPS5611552A (en) 1981-02-04

Family

ID=13893099

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8665779A Pending JPS5611552A (en) 1979-07-09 1979-07-09 Measuring unit for number of event produced

Country Status (1)

Country Link
JP (1) JPS5611552A (en)

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