JPS5656645A - Assembling method for semiconductor device - Google Patents

Assembling method for semiconductor device

Info

Publication number
JPS5656645A
JPS5656645A JP13187979A JP13187979A JPS5656645A JP S5656645 A JPS5656645 A JP S5656645A JP 13187979 A JP13187979 A JP 13187979A JP 13187979 A JP13187979 A JP 13187979A JP S5656645 A JPS5656645 A JP S5656645A
Authority
JP
Japan
Prior art keywords
stem
solder
trouble
constitution
cap
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13187979A
Other languages
Japanese (ja)
Inventor
Minoru Suda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13187979A priority Critical patent/JPS5656645A/en
Publication of JPS5656645A publication Critical patent/JPS5656645A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE:To mount the device securely without trouble by a method wherein a relaying insulated post is connected on a stem beforehand by means of a high melting point silver solder, and then a low melting point solder is used for soldering pellet. CONSTITUTION:An Ni film is provided on top and bottom of a ceramic thin plate 3 through W or Mo film, and a Cu lead 2 is junctioned to a Cu stem 1 with Ag solder 6. Next, a semiconductor pellet 4 is fixed on the stem 1 with solder 7 for necessary connection. The lead is bent upward, covered with a cap 9 having a gland bush 8, inserted in the grand brush 8 and canlked, and the cap is welded to the stem, thus completion aassembly. According to this constitution, the device can be mounted securely without trouble, and its reliability is improved accordingly.
JP13187979A 1979-10-15 1979-10-15 Assembling method for semiconductor device Pending JPS5656645A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13187979A JPS5656645A (en) 1979-10-15 1979-10-15 Assembling method for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13187979A JPS5656645A (en) 1979-10-15 1979-10-15 Assembling method for semiconductor device

Publications (1)

Publication Number Publication Date
JPS5656645A true JPS5656645A (en) 1981-05-18

Family

ID=15068270

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13187979A Pending JPS5656645A (en) 1979-10-15 1979-10-15 Assembling method for semiconductor device

Country Status (1)

Country Link
JP (1) JPS5656645A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6461935A (en) * 1987-09-02 1989-03-08 Mitsubishi Electric Corp Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6461935A (en) * 1987-09-02 1989-03-08 Mitsubishi Electric Corp Semiconductor device

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