JPS5671128A - Input/output control device - Google Patents
Input/output control deviceInfo
- Publication number
- JPS5671128A JPS5671128A JP14755079A JP14755079A JPS5671128A JP S5671128 A JPS5671128 A JP S5671128A JP 14755079 A JP14755079 A JP 14755079A JP 14755079 A JP14755079 A JP 14755079A JP S5671128 A JPS5671128 A JP S5671128A
- Authority
- JP
- Japan
- Prior art keywords
- interface
- control device
- wake
- indicate
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Bus Control (AREA)
Abstract
PURPOSE: To operate the I/O control device and the interface rationally, by counting the frequency, where wake-up from the upper device cannot be accepted, previously and by averaging starting operations for the I/O control device on a basis of this count value.
CONSTITUTION: Each interface of the I/O control device to which an upper device is connected is provided with logical operation circuit AND, flip-flop FF, and counter CNT and is controlled by the output of microprogram read control device MPG. When signal A to indicate that the interface is started when another interface is in the connection state (occupation state), signal B to indicate that the interface is started, and signal C to indicate that another inderface is in the connection state are input to the AND circuit, output D is generated, and counter CNT counts this output. For wake-up, the device is so held that wake-up for the interface where the count value is largest may be accepted.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14755079A JPS5930291B2 (en) | 1979-11-14 | 1979-11-14 | input/output control device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14755079A JPS5930291B2 (en) | 1979-11-14 | 1979-11-14 | input/output control device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5671128A true JPS5671128A (en) | 1981-06-13 |
| JPS5930291B2 JPS5930291B2 (en) | 1984-07-26 |
Family
ID=15432852
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14755079A Expired JPS5930291B2 (en) | 1979-11-14 | 1979-11-14 | input/output control device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5930291B2 (en) |
-
1979
- 1979-11-14 JP JP14755079A patent/JPS5930291B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5930291B2 (en) | 1984-07-26 |
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