JPS57199351A - Multiple signal receiver - Google Patents
Multiple signal receiverInfo
- Publication number
- JPS57199351A JPS57199351A JP56084680A JP8468081A JPS57199351A JP S57199351 A JPS57199351 A JP S57199351A JP 56084680 A JP56084680 A JP 56084680A JP 8468081 A JP8468081 A JP 8468081A JP S57199351 A JPS57199351 A JP S57199351A
- Authority
- JP
- Japan
- Prior art keywords
- phase error
- components
- signal
- phi
- carrier wave
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H20/00—Arrangements for broadcast or for distribution combined with broadcast
- H04H20/86—Arrangements characterised by the broadcast information itself
- H04H20/88—Stereophonic broadcast systems
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Stereo-Broadcasting Methods (AREA)
Abstract
PURPOSE:To separate a stereo signal well surely and stably, by extracting pilot signal components from two demodulation signals to correct the phase error of a reproducing carrier wave corresponding to the carrier wave to be modulated in the AM stereo receiver. CONSTITUTION:When pilot components in outputs of multipliers 6 and 7 for a phase error phi are denoted as P1 and P2, P1=-(1/2)Psinphi and P2-(1/2)Pcosphi are true, and these pilot components are extracted by BPFs 10 and 11. These signals P1 and P2 are multiplied in a multiplier 12, and DC components A(phi) having the phase error discrimination characteristics are extracted by an LPF13. This signal A(phi) controls a local oscillator 3. Thus, a carrier wave generator 5 utilizes the fact that the phase difference between an input signal and an output signal is changed by the input signal frequency to correc the phase error.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56084680A JPS57199351A (en) | 1981-06-01 | 1981-06-01 | Multiple signal receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56084680A JPS57199351A (en) | 1981-06-01 | 1981-06-01 | Multiple signal receiver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57199351A true JPS57199351A (en) | 1982-12-07 |
| JPS6248420B2 JPS6248420B2 (en) | 1987-10-14 |
Family
ID=13837402
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56084680A Granted JPS57199351A (en) | 1981-06-01 | 1981-06-01 | Multiple signal receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57199351A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6178206A (en) * | 1984-09-26 | 1986-04-21 | Fujitsu Ten Ltd | Phase locked circuit device |
| JPH05145502A (en) * | 1991-11-18 | 1993-06-11 | Hibiya Eng Ltd | Double side band amplitude modulation phase duplex transmission system |
-
1981
- 1981-06-01 JP JP56084680A patent/JPS57199351A/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6178206A (en) * | 1984-09-26 | 1986-04-21 | Fujitsu Ten Ltd | Phase locked circuit device |
| JPH05145502A (en) * | 1991-11-18 | 1993-06-11 | Hibiya Eng Ltd | Double side band amplitude modulation phase duplex transmission system |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6248420B2 (en) | 1987-10-14 |
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