JPS5721864A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPS5721864A
JPS5721864A JP9574280A JP9574280A JPS5721864A JP S5721864 A JPS5721864 A JP S5721864A JP 9574280 A JP9574280 A JP 9574280A JP 9574280 A JP9574280 A JP 9574280A JP S5721864 A JPS5721864 A JP S5721864A
Authority
JP
Japan
Prior art keywords
type
substrate
source
region
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9574280A
Other languages
Japanese (ja)
Inventor
Kazumichi Sakamoto
Shigetaka Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP9574280A priority Critical patent/JPS5721864A/en
Publication of JPS5721864A publication Critical patent/JPS5721864A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]

Abstract

PURPOSE:To improve the high frequency characteristic of a semiconductor device of an MOSFET by overlapping the same conductive type region as a substrate in contact with source and drain regions. CONSTITUTION:An Mo gate 3 is formed via an SiO2 film 2 on the surface of p<+>p<->Si semiconductor substrate 1, n<+> type diffused region 4 is formed as source and drain on the surface of the Si substrate at the position interposed at both sides of the gate, and a p type diffused region 5 is overlapped on the p<-> type substrate region contacted with the n<+> type source and drain regions 4.
JP9574280A 1980-07-15 1980-07-15 Semiconductor device and manufacture thereof Pending JPS5721864A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9574280A JPS5721864A (en) 1980-07-15 1980-07-15 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9574280A JPS5721864A (en) 1980-07-15 1980-07-15 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS5721864A true JPS5721864A (en) 1982-02-04

Family

ID=14145936

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9574280A Pending JPS5721864A (en) 1980-07-15 1980-07-15 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS5721864A (en)

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