JPS5732162A - Information transmitter - Google Patents

Abstract

PURPOSE:To obtain a clock frequency synchronized with demodulated data from a demodulation output, by performing ternary FSK modulation and by obtaining the clock frequency by detecting change points of a signal or inverting the signal. CONSTITUTION:Binary information 2a is read out from a storing circuit 2 with the clock 1a of an oscillator 1 and inputted to the synthesizing circuit 52 or 51 of a modulator 5. The data inputted to the synthesizing circuit 52 is synthesized together with the output 4a of the 2nd oscillator 4 and the output 1a of the oscillator 1 to obtain a frequency signal which corresponds to the output data 0 of the storing circuit 2. Similarly, a signal corresponding to the output data 1 of the circuit 2 is outputted from rhe synthesizing circuit 51. The output of the circuits 52 and 51 are synthesized by a synthesizing circuit 53; in part of a one-bit time, the resulting signal is sent out corresponding to the data of the storing circuit 2 and in the remaining time, neither frequency signal 51a nor 52a is sent out, thereby outputting a ternary output by demodulating an output 53a. A clock frequency is obtained by detecting change points of a signal or inverting a negative-side signal into positive- side one.