JPS5743412A - Reduced pressure cvd method - Google Patents

Reduced pressure cvd method

Info

Publication number
JPS5743412A
JPS5743412A JP11997180A JP11997180A JPS5743412A JP S5743412 A JPS5743412 A JP S5743412A JP 11997180 A JP11997180 A JP 11997180A JP 11997180 A JP11997180 A JP 11997180A JP S5743412 A JPS5743412 A JP S5743412A
Authority
JP
Japan
Prior art keywords
film
impurity
density
silicon film
polycrystalline silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11997180A
Other languages
Japanese (ja)
Inventor
Hideo Kotani
Hiroji Harada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP11997180A priority Critical patent/JPS5743412A/en
Publication of JPS5743412A publication Critical patent/JPS5743412A/en
Pending legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24Deposition of silicon only

Landscapes

  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)

Abstract

PURPOSE:To arbitrarily vary the density of an impurity contained in a polycrystalline silicon film in a thicknesswise direction by changing the impurity reaction gas flow rate at the time of producing the polycrystalline silicon film. CONSTITUTION:A polycrystalline silicon film 3 is formed on the surface of an insulating film 2 formed on a semiconductor substrate 1. A resist 4 is formed on a part of the film 3, and is then etched with plasma. The density of the impurity in the film 3 can be arbitrarily varied in the thicknesswise direction by controlling the impurity reaction gas flow rate when the film 3 is formed. When the impurity density is varied, the velocity of plasma etching or the like will change. The fabrication can be thereafter facilitated by producing a silicon film wihle controlling the impurity density to meet the state of manufacturing the film 3.
JP11997180A 1980-08-28 1980-08-28 Reduced pressure cvd method Pending JPS5743412A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11997180A JPS5743412A (en) 1980-08-28 1980-08-28 Reduced pressure cvd method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11997180A JPS5743412A (en) 1980-08-28 1980-08-28 Reduced pressure cvd method

Publications (1)

Publication Number Publication Date
JPS5743412A true JPS5743412A (en) 1982-03-11

Family

ID=14774723

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11997180A Pending JPS5743412A (en) 1980-08-28 1980-08-28 Reduced pressure cvd method

Country Status (1)

Country Link
JP (1) JPS5743412A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6049089A (en) * 1993-07-07 2000-04-11 Micron Technology, Inc. Electron emitters and method for forming them
US6174449B1 (en) 1998-05-14 2001-01-16 Micron Technology, Inc. Magnetically patterned etch mask
US6461054B1 (en) 1999-10-25 2002-10-08 The Furukawa Electric Co., Ltd. Adapter having a light-shielding shutter and optical module receptacle having a light-shielding shutter

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53100775A (en) * 1977-02-15 1978-09-02 Nec Corp Production of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53100775A (en) * 1977-02-15 1978-09-02 Nec Corp Production of semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6049089A (en) * 1993-07-07 2000-04-11 Micron Technology, Inc. Electron emitters and method for forming them
US6825596B1 (en) 1993-07-07 2004-11-30 Micron Technology, Inc. Electron emitters with dopant gradient
US7064476B2 (en) 1993-07-07 2006-06-20 Micron Technology, Inc. Emitter
US6174449B1 (en) 1998-05-14 2001-01-16 Micron Technology, Inc. Magnetically patterned etch mask
US6461054B1 (en) 1999-10-25 2002-10-08 The Furukawa Electric Co., Ltd. Adapter having a light-shielding shutter and optical module receptacle having a light-shielding shutter

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