JPS575135A - Information processor - Google Patents

Information processor

Info

Publication number
JPS575135A
JPS575135A JP7970980A JP7970980A JPS575135A JP S575135 A JPS575135 A JP S575135A JP 7970980 A JP7970980 A JP 7970980A JP 7970980 A JP7970980 A JP 7970980A JP S575135 A JPS575135 A JP S575135A
Authority
JP
Japan
Prior art keywords
signal
register
inhibiting
reset
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7970980A
Other languages
Japanese (ja)
Other versions
JPS6019802B2 (en
Inventor
Masamichi Hasegawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55079709A priority Critical patent/JPS6019802B2/en
Publication of JPS575135A publication Critical patent/JPS575135A/en
Publication of JPS6019802B2 publication Critical patent/JPS6019802B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To shorten the interruption time of operation when a fault is occurring, by releasing an inhibiting circuit when the inhibition time of a reset signal exceeds a normal time, in an information processor which is initialized with a reset signal from another device. CONSTITUTION:A reset signal 10 from a different device is held in a register 1 temporarily and unless a resetting inhibiting register 2 is set, the reset signal 15 is made effective with a signal 17 to initialize a device with a signal 13. When the resistor 2 is set, the signal 15 held in the register 1 is inhibited with the signal 17 and a resetting inhibiting timer 3 is started. Normally, a processor finishes processing in a resetting inhibition state and the register 1 and timer 3 are reset. Even if the inhibiting register is not released a certain time later, the inhibiting register 2 is reset by a gate 6 with the time-up signal 14 of the timer, so the signal 13 operates to initialize the device.
JP55079709A 1980-06-13 1980-06-13 information processing equipment Expired JPS6019802B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55079709A JPS6019802B2 (en) 1980-06-13 1980-06-13 information processing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55079709A JPS6019802B2 (en) 1980-06-13 1980-06-13 information processing equipment

Publications (2)

Publication Number Publication Date
JPS575135A true JPS575135A (en) 1982-01-11
JPS6019802B2 JPS6019802B2 (en) 1985-05-18

Family

ID=13697726

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55079709A Expired JPS6019802B2 (en) 1980-06-13 1980-06-13 information processing equipment

Country Status (1)

Country Link
JP (1) JPS6019802B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60201420A (en) * 1984-03-26 1985-10-11 Fujitsu Ltd Processor resetting system
JPS61166617A (en) * 1985-01-19 1986-07-28 Panafacom Ltd Reset control system

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0312602U (en) * 1989-06-22 1991-02-08

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60201420A (en) * 1984-03-26 1985-10-11 Fujitsu Ltd Processor resetting system
JPS61166617A (en) * 1985-01-19 1986-07-28 Panafacom Ltd Reset control system

Also Published As

Publication number Publication date
JPS6019802B2 (en) 1985-05-18

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