JPS6030680U - Dropout compensation circuit - Google Patents
Dropout compensation circuitInfo
- Publication number
- JPS6030680U JPS6030680U JP12340183U JP12340183U JPS6030680U JP S6030680 U JPS6030680 U JP S6030680U JP 12340183 U JP12340183 U JP 12340183U JP 12340183 U JP12340183 U JP 12340183U JP S6030680 U JPS6030680 U JP S6030680U
- Authority
- JP
- Japan
- Prior art keywords
- compensation circuit
- selecting
- switch means
- dropout compensation
- dropout
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Television Signal Processing For Recording (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来のドロップアウト補償回路のブロック図、
第２図は本考案の一実施例におけるドロップアウト補償
回路のブロック図である。
主な図番の説明、２，６・・・第１、第２スイッチ回路
、４・・・ドロップアウト検出回路、５・・・ＩＨ遅延
回路。Figure 1 is a block diagram of a conventional dropout compensation circuit.
FIG. 2 is a block diagram of a dropout compensation circuit in one embodiment of the present invention. Explanation of main figure numbers, 2, 6...first and second switch circuits, 4...dropout detection circuit, 5...IH delay circuit.
Claims (1)
記再生映像信号をＩＨ（１水平開期信号期間）遅−する
手段と、前記ドロップアウト検出手段によるドロップア
ウト検出時、前記再生映像信号に代えて前記ＩＨ遅延手
段出力を選択して出力する第１スイッチ手段と、通常再
生時には前記第１スイッチ手段出力を、特殊再生時には
前記第１スイッチ手段入力を選択して前記ＩＨ遅延手段
に供給する第２スイッチ手段とから成るドロップアウト
補償回路。means for detecting a dropout in the reproduced video signal; means for delaying the reproduced video signal by IH (one horizontal opening signal period); a first switch means for selecting and outputting the output of the IH delay means; and a first switch means for selecting and outputting the output of the IH delay means during normal playback and selecting the input of the first switch means during special playback and supplying it to the IH delay means. A dropout compensation circuit consisting of two switch means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12340183U JPS6030680U (en) | 1983-08-08 | 1983-08-08 | Dropout compensation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12340183U JPS6030680U (en) | 1983-08-08 | 1983-08-08 | Dropout compensation circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6030680U true JPS6030680U (en) | 1985-03-01 |
| JPS6347117Y2 JPS6347117Y2 (en) | 1988-12-06 |
Family
ID=30281701
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12340183U Granted JPS6030680U (en) | 1983-08-08 | 1983-08-08 | Dropout compensation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6030680U (en) |
-
1983
- 1983-08-08 JP JP12340183U patent/JPS6030680U/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6347117Y2 (en) | 1988-12-06 |
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