JPS6119165B2 - - Google Patents
Info
- Publication number
- JPS6119165B2 JPS6119165B2 JP54165974A JP16597479A JPS6119165B2 JP S6119165 B2 JPS6119165 B2 JP S6119165B2 JP 54165974 A JP54165974 A JP 54165974A JP 16597479 A JP16597479 A JP 16597479A JP S6119165 B2 JPS6119165 B2 JP S6119165B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- power supply
- emitter
- circuit
- oscillation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000010355 oscillation Effects 0.000 claims description 31
- 239000003990 capacitor Substances 0.000 claims description 25
- 238000010586 diagram Methods 0.000 description 6
- 230000003071 parasitic effect Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1203—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier being a single transistor
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1231—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier comprising one or more bipolar transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B2200/00—Indexing scheme relating to details of oscillators covered by H03B
- H03B2200/0002—Types of oscillators
- H03B2200/0006—Clapp oscillator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B2200/00—Indexing scheme relating to details of oscillators covered by H03B
- H03B2200/0002—Types of oscillators
- H03B2200/0008—Colpitts oscillator
Landscapes
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
Description
【発明の詳細な説明】
この発明は例えばチユーナの局部発振回路とし
て利用され、特にIC化に適するように改良した
発振回路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an oscillation circuit that is used as a local oscillation circuit in a tuner, for example, and is particularly adapted to be integrated into an IC.
従来、チユーナのフロントエンドにおける局部
発振回路やワイヤレスマイクロホンの高周波発振
回路等として、第１図に示すように発振用トラン
ジスタQ1、いわゆるＣ分割用のコンデンサC1，
C2、タンク回路Ｔ等を用いてなるいわゆるクラ
ツプ形の発振回路がよく使用されている。 Conventionally, as a local oscillation circuit in the front end of a tuner or a high frequency oscillation circuit in a wireless microphone, an oscillation transistor Q1 , a so-called C-dividing capacitor C1 ,
A so-called clap-type oscillation circuit using C 2 , tank circuit T, etc. is often used.
ところで、このような発振回路をIC化する場
合、タンク回路Ｔ等を外部接続用として残して
IC化することになるが、チツプ面積を可及的に
節約するためには分割コンデンサC1，C2として
接合容量を用いることが望ましい。この場合、接
合容量としては一般にトランジスタのベース−エ
ミツタ間容量やベース−コレクタ間容量が用いら
れている。 By the way, when converting such an oscillation circuit into an IC, it is necessary to leave the tank circuit T etc. for external connection.
Although it will be implemented as an IC, it is desirable to use junction capacitors as the dividing capacitors C 1 and C 2 in order to save the chip area as much as possible. In this case, the base-emitter capacitance or base-collector capacitance of a transistor is generally used as the junction capacitance.
第２図は、このようにしてIC化される第１図
の発振回路のうちトランジスタQ1部、分割コン
デンサC1，C2部の実装構造を示している。 FIG. 2 shows the mounting structure of the transistor Q 1 section and the divided capacitors C 1 and C 2 sections of the oscillation circuit of FIG. 1 which is integrated into an IC in this manner.
しかしながら、かかるIC化構造では分割コン
デンサC1，C2をそれぞれ独立して形成する必要
があるのでチツプ面積の点で不利であると共に、
コンデンサC2部のＮ形領域とＰ形基板との間に
付随的に形成される（寄生的な）接合容量によつ
て発振作用が妨げられるという問題があつた。 However, in such an IC structure, it is necessary to form the divided capacitors C 1 and C 2 independently, which is disadvantageous in terms of chip area.
There was a problem in that the oscillation effect was hindered by the (parasitic) junction capacitance incidentally formed between the N-type region of the capacitor C2 portion and the P-type substrate.
第３図は、以上のようにしてIC化を図つた発
振回路全体の等価回路を示すもので、分割コンデ
ンサC1，C2部はそれぞれベース−コレクタ間容
量が用いられている。この場合、コンデンサC2
部に形成される上述した如き寄生容量C2′が問題
となるものである。 FIG. 3 shows an equivalent circuit of the entire oscillation circuit implemented as an IC as described above, and the base-collector capacitance is used for the dividing capacitors C 1 and C 2 . In this case capacitor C 2
The problem is the above-mentioned parasitic capacitance C 2 ' formed in the area.
そこで、この発明は以上のような点に鑑みてな
されたもので、IC化した場合にチツプ面積を可
及的に少なくし得ると共に寄生容量による発振作
用の妨げが生じないようにし得、しかも電源電位
の変動の影響を受けないようにし得る極めて良好
な発振回路を提供することを目的としている。 Therefore, this invention was made in view of the above points, and when integrated into an IC, it is possible to reduce the chip area as much as possible, and also to prevent the oscillation from being hindered by parasitic capacitance. The object of the present invention is to provide an extremely good oscillation circuit that can be unaffected by potential fluctuations.
以下図面を参照してこの発明の実施例につき詳
細に説明する。 Embodiments of the present invention will be described in detail below with reference to the drawings.
すなわち、基本例となる第４図に示すようにト
ランジスタQ11は、コレクタが電源端子Vccに接
続され、エミツタが出力端OUTに接続されると
共に抵抗R11を介して基準電位点に接続され、ベ
ースが抵抗R12を介してバイアス電圧端子VBに接
続される。また、マルチエミツタ形の等価コンデ
ンサ用トランジスタQ12はベース−コレクタ間が
コンデンサC11を形成し且つベース−エミツタ間
がコンデンサC12を形成するもので、ベースおよ
びエミツタがそれぞれ前記トランジスタQ11のエ
ミツタおよびベースに対応して接続され、コレク
タが電源端子Vccに接続される。 That is, as shown in FIG. 4, which is a basic example, the transistor Q11 has its collector connected to the power supply terminal Vcc, its emitter connected to the output terminal OUT, and connected to the reference potential point via the resistor R11 . The base is connected to the bias voltage terminal VB via a resistor R12 . Further, the multi-emitter type equivalent capacitor transistor Q12 has a capacitor C11 between the base and the collector, and a capacitor C12 between the base and the emitter, and the base and emitter are the emitter and the emitter of the transistor Q11 , respectively. The base is connected correspondingly, and the collector is connected to the power supply terminal Vcc.
なお、前記トランジスタQ11のベースは外付け
のコンデンサC13およびタンク回路T11を介して電
源端子Vccに接続されている。 Note that the base of the transistor Q11 is connected to the power supply terminal Vcc via an external capacitor C13 and a tank circuit T11 .
そして、第５図は、このような発振回路の外付
け部を除いてIC化を図つた場合におけるトラン
ジスタQ11部およびコンデンサC11，C12となる等
価トランジスタQ12部の実装構造を示している。
また、第６図は以上のようにしてIC化を図つた
発振回路全体の等価回路を示している。 Figure 5 shows the mounting structure of the equivalent transistor Q 12, which becomes the transistor Q 11 and capacitors C 11 and C 12 , when the oscillation circuit is implemented as an IC without the external parts. There is.
Further, FIG. 6 shows an equivalent circuit of the entire oscillation circuit which has been implemented as an IC as described above.
而して、かかる実装構造および等価回路から明
らかなように、コンデンサC11，C12は等価トラン
ジスタQ12のベース−コレクタ間容量およびベー
ス−エミツタ間容量を利用して形成されているの
で、同一部分に形成し得るから、それだけチツプ
面積を少なくし得る点で有利である。また、コン
デンサC12部のＮ形領域とＰ形基板との間に形成
される寄生容量C12′は、電源Vccラインと基準電
位点となる接地間に介挿されることになるので、
回路の発振動作に何んら悪影響を与えないで済ま
せることができるという利点がある。 As is clear from the mounting structure and equivalent circuit, capacitors C 11 and C 12 are formed using the base-collector capacitance and base-emitter capacitance of the equivalent transistor Q 12 , so they are identical. Since it can be formed in a portion, it is advantageous in that the chip area can be reduced accordingly. In addition, the parasitic capacitance C 12 ' formed between the N-type region of the capacitor C 12 part and the P-type substrate is inserted between the power supply Vcc line and the ground, which is the reference potential point.
This has the advantage of not having any adverse effect on the oscillation operation of the circuit.
加えて、この寄生容量C12′は電源Vccラインに
乗るリツプル分を除去し得るようないわゆるバイ
パスコンデンサとして機能するという利点もあ
る。 In addition, this parasitic capacitance C 12 ' has the advantage of functioning as a so-called bypass capacitor that can remove ripples on the power supply Vcc line.
なお、以上においてバイアス電圧端子VBを例
えば電源端子Vccに接続してトランジスタQ11の
ベース電位を電源電位と同電位とすることによ
り、コンデンサC11，C12は共に約0.7Vの電圧で逆
バイアスされることになる。これによつて、電源
電位変動の影響をあまり受けないで発振周波数の
安定化に寄与することができる。 In addition, in the above, by connecting the bias voltage terminal VB to, for example, the power supply terminal Vcc and making the base potential of the transistor Q 11 the same potential as the power supply potential, the capacitors C 11 and C 12 are both reverse biased with a voltage of about 0.7V. will be done. Thereby, it is possible to contribute to stabilizing the oscillation frequency without being affected much by fluctuations in the power supply potential.
しかしながら、実際には電源電位が変動する
と、特にコンデンサC11側の逆バイアス電圧が変
動してしまい該コンデンサC11の容量が変化さ
れ、結果的に発振周波数のドリフトが増大しがち
である。 However, in reality, when the power supply potential fluctuates, the reverse bias voltage on the capacitor C 11 side in particular fluctuates, causing the capacitance of the capacitor C 11 to change, and as a result, the drift of the oscillation frequency tends to increase.
第７図はこのような点を改良した発振した発振
回路を示すもので、第４図の基本例と異なるのは
前記抵抗R11に代えて定電流回路ISを用いた点で
ある。すなわち、この定電流回路Icは、電源端子
Vccと基準電位点間に直列に接続したダイオード
D11、抵抗R13、ダイオードD12，D13のうち抵抗
R13とダイオードD12との接続点にベースが接続さ
れ、コレクタが前記トランジスタQ11のエミツタ
に接続され、エミツタが抵抗R14を介して基準電
位点に接続されたトランジスタQ13でなるもので
ある。なお、バイアス電圧端子VBは電源端子
Vccに接続して回路全体の動作電流が一定に保た
れるようにすることは前述したと同様である。 FIG. 7 shows an oscillation circuit that is improved in this respect, and differs from the basic example shown in FIG. 4 in that a constant current circuit IS is used in place of the resistor R11 . In other words, this constant current circuit Ic
Diode connected in series between Vcc and reference potential point
Resistor among D 11 , resistor R 13 , diode D 12 , D 13
The transistor Q13 has a base connected to the connection point between R13 and the diode D12 , a collector connected to the emitter of the transistor Q11 , and an emitter connected to the reference potential point via the resistor R14 . be. Note that the bias voltage terminal VB is the power supply terminal.
The connection to Vcc so that the operating current of the entire circuit is kept constant is the same as described above.
而して、このように定電流回路ISを用いた発振
回路は、電源電位が変動したとしてもコンデンサ
C11側の逆バイアス電圧（約0.7V）を一定に保持
することができるので発振周波数のドリフトが増
大することを未然に防止して、可及的に安定性の
向上に寄与し得るものである。 Therefore, in this oscillation circuit using a constant current circuit IS, even if the power supply potential fluctuates, the capacitor
Since the reverse bias voltage (approximately 0.7V) on the C11 side can be held constant, it can prevent the oscillation frequency drift from increasing and contribute to improving stability as much as possible. be.
また、単にそればかりではなく延いてはコンデ
ンサC11，C12の各逆バイアス電圧値を同電位（約
0.7V）に推持し得るので、等価トランジスタQ12
のコレクタ−エミツタ間に電位差が生じるのを防
止してリーク等の不所望な問題が生じるのを未然
に防止し得るという利点もある。特に、これはコ
ンデンサC11，C12の容量を大きくとるために等価
トランジスタQ12部のチツプ面積を大きくする場
合に、リーク等の問題が生じるものであるが、こ
のような場合でも上述した対策によつて何んら問
題が生じないようにすることが可能となる。 Moreover, not only that, but also the reverse bias voltage values of capacitors C 11 and C 12 are set to the same potential (approximately
0.7V), so the equivalent transistor Q12
Another advantage is that it is possible to prevent a potential difference from occurring between the collector and emitter of the device, thereby preventing undesirable problems such as leakage. In particular, problems such as leakage occur when the chip area of the equivalent transistor Q 12 is increased in order to increase the capacitance of capacitors C 11 and C 12 , but even in such cases, the above-mentioned countermeasures can be taken. This makes it possible to prevent any problems from occurring.
従つて、以上詳述したようにこの発明によれ
ば、IC化した場合にチツプ面積を可及的に少な
くし得ると共に寄生容量による発振作用の妨げが
ないようにし得、しかも電源電位の変動の影響を
受けないようにし得る極めて良好な発振回路を提
供することが可能となる。 Therefore, as described in detail above, according to the present invention, when integrated into an IC, the chip area can be reduced as much as possible, and the oscillation action can be prevented from being hindered by parasitic capacitance, and furthermore, fluctuations in the power supply potential can be prevented. It becomes possible to provide an extremely good oscillation circuit that can be prevented from being affected.
第１図は従来の発振回路を示す構成図、第２
図、第３図はそれぞれ第１図の一部IC化実装構
造およびIC化後の等価回路を示す図、第４図は
この発明に係る発振回路の基本例を示す構成図、
第５図、第６図は第４図の一部IC化実装構造お
よびIC化後の等価回路を示す図、第７図は第４
図の基本例を改良した発振回路を示す構成図であ
る。
Q11……（発振用）トランジスタ、Q12……
（等価コンデンサ用）トランジスタ、C11〜C13…
…コンデンサ、T11……タンク回路、R11，R12…
…抵抗、Ic……定電流回路。
Figure 1 is a configuration diagram showing a conventional oscillation circuit;
3 and 3 are diagrams respectively showing a partially IC-implemented mounting structure and an equivalent circuit after IC implementation of FIG. 1, and FIG. 4 is a configuration diagram showing a basic example of an oscillation circuit according to the present invention.
Figures 5 and 6 are diagrams showing the partial IC implementation structure of Figure 4 and the equivalent circuit after IC implementation, and Figure 7 is a diagram showing the partial IC implementation structure of Figure 4.
FIG. 2 is a configuration diagram showing an oscillation circuit that is an improved version of the basic example shown in the figure. Q 11 ... (for oscillation) transistor, Q 12 ...
(For equivalent capacitor) Transistor, C 11 ~ C 13 …
…Capacitor, T 11 …Tank circuit, R 11 , R 12 …
...Resistance, Ic... Constant current circuit.
Claims (1)
に接続されベースがバイアス素子を介して前記電
源に接続された発振用トランジスタと、この発振
用トランジスタのベース−エミツタにエミツタ−
ベースが対応して接続されコレクタが前記電源に
接続された等価コンデンサ用トランジスタと、前
記発振用トランジスタのベースと前記電源間に接
続されたタンク回路と、前記発振用トランジスタ
のエミツタと基準電位点間に接続される定電流源
とを具備してなることを特徴とする発振回路。1 An oscillation transistor whose emitter is connected to the output end, whose collector is connected to a power supply, and whose base is connected to the power supply via a bias element, and an emitter between the base and emitter of this oscillation transistor.
an equivalent capacitor transistor whose bases are connected correspondingly and whose collector is connected to the power supply; a tank circuit connected between the base of the oscillation transistor and the power supply; and between the emitter of the oscillation transistor and a reference potential point. An oscillation circuit comprising: a constant current source connected to the oscillator circuit.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16597479A JPS5689103A (en) | 1979-12-20 | 1979-12-20 | Oscillating circuit |
| US06/212,745 US4386327A (en) | 1979-12-20 | 1980-12-03 | Integrated circuit Clapp oscillator using transistor capacitances |
| GB8039285A GB2066607B (en) | 1979-12-20 | 1980-12-08 | Oscillator |
| DE3047299A DE3047299C2 (en) | 1979-12-20 | 1980-12-16 | Oscillator with an active element formed in a semiconductor substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16597479A JPS5689103A (en) | 1979-12-20 | 1979-12-20 | Oscillating circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5689103A JPS5689103A (en) | 1981-07-20 |
| JPS6119165B2 true JPS6119165B2 (en) | 1986-05-16 |
Family
ID=15822532
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16597479A Granted JPS5689103A (en) | 1979-12-20 | 1979-12-20 | Oscillating circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5689103A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0815244B2 (en) * | 1986-06-27 | 1996-02-14 | ソニー株式会社 | High frequency oscillator |
-
1979
- 1979-12-20 JP JP16597479A patent/JPS5689103A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5689103A (en) | 1981-07-20 |
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