JPS6120179A - Two-dimensional visual recognition device - Google Patents

Abstract

PURPOSE:To recognize rapidly and easily a substance even if an input pattern is positionally shifted by executing positional correction between input and reference patterns on data. CONSTITUTION:A positional shift variables DELTAX and DELTAY are preset in horizontal and vertical counters 9, 10 respectively, and after correcting positional shifts, the accumulated value is cleared. After completing the correcting of the positional shifts, a reference memory 5 is addressed by horizontal and vertical counters 7, 8 and a buffer memory 6 is addressed by the preset horizontal and vertical counters 9, 10. Since the data of both the reference and input patterns are compared under the overlapped state correcting the positional shift when the constitutional picture element data of the reference and input patterns are read out successively, the coincidence/inconsistency of the patterns can be discriminates by counting up the number of dissident picture elements.

Description

[Detailed Description of the Invention] <Technical Field of the Invention> The present invention obtains an input pattern by imaging a stationary or moving object to be recognized, and compares this input pattern with a standard pattern to recognize the object. In particular, the present invention provides a novel positional deviation detection method for detecting at high speed the amount of positional deviation of an input pattern with respect to a standard pattern during pattern matching.

<Background of the Invention> Generally, a two-dimensional visual recognition device recognizes an object by superimposing an input pattern and a standard pattern in an image, detecting the degree of superimposition and coincidence of both patterns. Therefore, when performing pattern matching, it is necessary to accurately align both patterns. Conventionally, an XY stage or the like is used to position the object to be recognized at a predetermined stopping position, and then the object is imaged with a television camera to determine the input pattern. This input pattern is then compared with a standard pattern. However, this type of system requires a mechanism for positioning the object to be recognized, which complicates the overall structure of the apparatus and has many disadvantages, such as the time it takes for pattern matching to correspond to the time required for the positioning operation.

Therefore, the inventor developed a method to align patterns between patterns using data by detecting the positions of corresponding corners of the input pattern and standard pattern using images and calculating the amount of positional deviation. did. However, with this method, if the input pattern contains noise, the noise part may be mistakenly recognized as part of the pattern. There is a risk that recognition may become impossible.

<Objective of the Invention> The present invention enables accurate and high-speed detection of the amount of positional deviation of an input pattern with respect to a standard pattern even if the pattern contains noise, and correction of the position between patterns can be performed on the data. It is an object of the present invention to provide a two-dimensional visual recognition device that can quickly and easily perform object recognition even if an input pattern is misaligned.

<Structure and Effects of the Invention> In order to achieve the above object, the present invention captures a standard pattern and an input pattern into a memory, counts the number of black pixels constituting each pattern for each scanning line, and calculates the number of black pixels in that line. The number of pixels and the memory address are integrated, and finally the sum of the integrated values is divided by the total number of pixels to find the weighted average value of each pattern.Then, the difference between the weighted average values of both patterns is calculated as the input pattern for the standard pattern. It was decided to calculate it as the amount of positional deviation.

According to the present invention, there is no need to position the object to be recognized at a predetermined stop position, and no special positioning mechanism is required.
The entire device can be simplified, the time required for positioning operations can be saved, and the efficiency of object recognition processing can be improved. Furthermore, each s6 turn position can be determined using a simple /S-code configuration such as a counter without resorting to complicated software processing such as image analysis, which further contributes to improving processing efficiency. Furthermore, each pattern position is defined by the weighted average value obtained from the product of the number of black pixels and the memory address, and the amount of positional misalignment between patterns is detected from the difference between the weighted average values of both patterns, so the sheet metal pattern does not contain noise. Even if the object is a part of the pattern, there will be no inconvenience such as it being misidentified as a noise part or a part of the pattern, and the positional deviation of the pattern can be accurately detected and corrected, improving object recognition accuracy. Achieves a remarkable effect of achieving the purpose.

<Description of Embodiments> FIG. 1 shows an example of a circuit configuration of a two-dimensional visual recognition device according to the present invention. In the figure, a television camera 1 images a stationary or moving object 2, for example from above, and sends an image output (shown in FIG. 3(1)) related to interlaced scanning to a synchronization separation circuit 3. The synchronization separation circuit 3 extracts a horizontal synchronization signal I-ID, a vertical synchronization signal Vl), an odd field signal OD (shown in FIG. 3(2)), and a clock signal GK (a third
(shown in FIG. 4), etc., and outputs the video signal VDi to the binarization circuit 4. As shown in FIG. 3 (3), the binarization circuit 4 sets a certain threshold level TH for the video signal VDi, and binarizes the odd fields of the video signal VDi into black and white to form a binarization pattern. Output. The binarization circuit 4 includes a mode changeover switch SW.
1, a reference memory 5 and a buffer memory 6 are connected to each other, and when the mode selector switch SW1 is set to the learning mode side a and a standard model is imaged, the reference memory 5 is connected to the reference memory 5, for example, as shown in FIG. 2 (1). A standard pattern P is stored, and when the mode selector switch SW1 is set to the recognition mode side and an object to be recognized is imaged, the input pattern Pi shown in FIG. 2(2), for example, is stored in the buffer memory 6. In the case of this embodiment, each pattern is stored in a pixel range of 256 bits in the vertical and horizontal directions, and in the example shown in FIG.

In Fig. 1, horizontal counter 7.9 and vertical counter 8
．． Reference numeral 10 specifies addresses of pixel positions in the memory when reading and writing the standard pattern P and the input pattern Pi. Gate circuits 11.12 and 13.14 are controlled to open and close by odd field signal OD and clock signal CK, and send write control signal W and read control signal k to each memory 5.
Supply to 6. Further, gate circuit 15 is controlled to open and close by odd field signal OD, and supplies clock signal CK to horizontal counter 7.9 and vertical counter 8.10 through scanning direction switching circuit 16.17, respectively. The scanning direction switching circuits 16 and 17 are circuits for switching the scanning direction of the memory 5.6 to either horizontal or vertical direction.

The binary pattern output circuits 18 and 19 are connected to the memories 5 and 19 in the binarization circuit 4 via the mode changeover switch SW1, respectively.
6 is connected in parallel.

Each of these output circuits 18 and 19 has an odd field signal OD.
It includes gate circuits 20 and 21 whose opening and closing are controlled by
The respective gate outputs are input to OR circuits 22, 23 together with the read outputs of each memory 5, 6. Each OR circuit 22.23
A black pixel detection circuit 24 is connected to the output side of the black pixel detection circuit 24 via a mode changeover switch S'AI 2 that is interlocked with the switch SWI.
Further, a pixel counter 25 is connected to this black pixel detection circuit 24. The black pixel detection circuit 24 detects the black pixels (shaded areas in FIG. 2) constituting each pattern, and the pixel counter 25 counts the output (number of black pixels) of the black pixel detection circuit 24.

The count data of this pixel counter 25 is calculated as I10 (Input 10output) every horizontal blanking period.
) via the boat 26 (Central P
processing unit) 27, and C
The PU 27 calculates a weighted average value, which will be described later, based on the captured count data, and then calculates the positional deviation amounts ΔX and ΔY of the input pattern with respect to the standard pattern. In the figure, PROM
(Programmable Read Only M
RAM (Random Ac memory) stores a series of programs such as positional deviation detection, etc.
The cess memory 29 has a work area for storing various data and for executing processing. Furthermore, the gate circuits 30 and 31 send an interrupt signal l to the CPU 27.
This is a circuit that generates NTl,2, and the OR circuit 32 is a circuit that resets the pixel counter 25. Furthermore, the display section 33 displays the number of mismatched black pixels of each pattern during pattern matching, and the setting switch 34 sets various threshold values and the like for pattern matching.

4(1) shows the standard pattern P stored in the reference memory 5, and FIG. 4(2) shows the input pattern Pi stored in the buffer memory 6. In the figure, c, , G2
are the weighted average positions (center of gravity positions) of the standard pattern P and the input pattern Pi -X+, Y+.

X2. Y2 is the center of gravity position G1. The center of gravity G2 of the input pattern Pi is shifted from the center of gravity G1 of the standard pattern P by ΔX in the horizontal direction and by ΔY in the vertical direction.

However, when the standard model is imaged by the television camera 1 after setting the mode changeover switches swl and sw2 to the learning mode side λ, the binarization process is executed for the first odd field of the video signal VDi, and the standard pattern P is stored in the reference memory. 5 is written and formed. Then, at the same time timing, the output of the binarization circuit 4 is sent to the black pixel detection circuit 24 via the gate circuit 20 and the OR circuit 22, and the pixel counter 25 detects the output of the black pixel detection circuits 2 and 4 (the number of black pixels). )
At the same time, C is counted for each horizontal blanking period.
An interrupt signal TNT1 is generated to the PU 27, and the count contents of the pixel counter 25 are read each time.

FIG. 5(1) shows such an interrupt control operation. In the figure, ni is the count value of the pixel counter 25, and Yi is the count value of the vertical counter 8 of the reference memory 5 (the reference memory 5
vertical address) respectively.

Assuming that the black pixel counting operation has been completed for the current Yi-th horizontal scanning line (Yi (256)), first
I'U27 is the count value Y of the vertical counter 8 in step 41.
i is read, and in the next step 42 the pixel counter 25
Read the count value nH. Next, in step 43, the cumulative value N1 of the count value ni is calculated, and further in step 44
In this step, the product Yini of the count value Yi of the vertical counter 8 and the count value ni of the pixel counter 25 is calculated to obtain its cumulative value NT. Next, in step 45, it is checked whether the count value Yi of the vertical counter 8 has reached the final horizontal scanning line (256 lines in this embodiment), and if the determination is "No", the interrupt wait time at the start point is The state returns to , and a similar black pixel counting operation is performed for the next horizontal scanning row.

Each of the processes from step 41 to step 44 is repeatedly executed, and when the count value Yi of the vertical counter 8 reaches r256J, the determination in step 45 becomes "YES", and in the next step 46, the cumulative value NT, After dividing the calculated data by the cumulative value N1 and storing the calculated data in a predetermined area Y1 of the RAM 29, the cumulative value NT is cleared in the next step 47.

In each even field, the CPU 27 scans the reference memory 5 in the vertical direction while incrementing the horizontal and vertical counters 7.8 to read out the standard pattern P, and the read pixel data indicates that a black pixel is detected. The pixel counter 25 counts the number of black pixels. Then, an interrupt signal TN is sent to the CPU 27 every horizontal blanking period.
Each time T2 occurs, the count contents of the pixel counter 25 are read.

FIG. 5(2) shows such an interrupt control operation, in which ni' is the count value of the pixel counter 25, and Xi
indicate the prohibited value (horizontal address of the reference memory 5) of the horizontal counter 7 of the reference memory 5, respectively.

Assuming that the black pixel counting operation has been completed for the Xi-th vertical scanning line (Xi<256), first
In step 51, the PU 27 calculates the count value Xi of the horizontal counter 7.
In the next step 52, the count value ni' of the pixel counter 25 is read. Next, in step 53, the product X4ni' of the count value Xi of the horizontal counter 7 and the count values n and I of the pixel counter 25 is calculated to obtain its cumulative value NT. Next, in step 54,
It is checked whether the counted value Xi of the horizontal counter 7 has reached the final horizontal scanning line (256 lines in this embodiment), and if the judgment is "No", the process returns to the state of waiting for an interrupt at the start point, and then A similar black pixel counting operation is performed for each vertical scan row.

When each of the processes in steps 51 to 53 described above is repeatedly executed and the count value Xi of the horizontal counter 7 reaches r256J, the determination in step 54 becomes "YES",
In the next step 55, after dividing the cumulative value NT of the product Xin;' by the cumulative value N1 obtained in FIG. In the next steps 56 and 57, the cumulative values NT, . . . N1 are cleared.

Next, when performing recognition processing for the object to be recognized, after setting the mode changeover switches SWI and SW2 to the recognition mode side, a similar imaging operation is performed. In this case, the input pattern Pi will be stored in the buffer memory 6, and writing of the input pattern Pi will be executed at the odd field time timing as described above. Also, at the same time timing, the black pixel counting operation is executed, and an interrupt signal lNT is sent to the CPU 27 during each horizontal planking period.
1 is generated.

FIG. 6(1) shows such an interrupt control operation, and like the flowchart of FIG. 5(1) above, step 63
Find the cumulative value N2 of the count value nl of the pixel counter 25,
In step 64, the cumulative value NT of the product Yini of the count value ni of the pixel counter 25 and the count value Yi of the vertical counter 10 is
2 and finally stored in the valence region Y2 of the input pattern Pi (step 66).

Next, in the even field, the CPU 27 scans the buffer memory 6 in the vertical direction while incrementing the horizontal and vertical counters 9 and 10, reads out the input pattern Pi, and detects that the read pixel data is a black pixel. The pixel counter 25 counts the number of black pixels. Then, an interrupt signal INT2 is generated to the CPU 27 every horizontal blanking period, and the count contents of the pixel counter 25 are read each time.

FIG. 5(2) shows such an interrupt control operation. Steps 71 to 75 in the same figure are similar to the flowchart in FIG.
The cumulative value NT2 of ni' is calculated, and in step 75, the cumulative value N
T2 and the cumulative value N2 are stored in a predetermined area X2 of the RAM 29 (step 75).

Thus, in step 76, the horizontal positional deviation amount ΔX is calculated from the difference between the data content of area X2 and the data content of area X1, and in the next step 77, the data content of area Y2 and the data content of area Y1 are calculated. The vertical positional deviation amount ΔY is calculated from the difference. Then, in the next step 78.79, the positional deviation amount ΔX is preset in the horizontal counter 9, and the positional deviation amount ΔY is preset in the vertical counter 10 to correct the positional deviation, and then in step 80.81, the cumulative value NT, , , Clear N2.

After completing the above positional deviation correction, the horizontal and vertical counters 7.
Addressing the reference memory 5 at 8 and the buffer memory 6 at preset horizontal and vertical counters 9 and ]0, the standard pattern P and the input pattern P are respectively addressed.
When sequentially reading constituent pixel data of i, both patterns P
.

Pi data will be compared in an overlapping state with positional deviation corrected, and by counting the number of mismatched pixels, it will be determined whether the patterns match or do not match.

FIG. 7 +11 +2+ +3+ shows another embodiment of the processing method described above, in which the weighted average value of the input pattern PiT2 at steps 101-106 of the standard pattern N1 at steps 91-97 of FIG. 7(1) □ From these differences, the vertical positional deviation amount ΔY between the patterns is calculated, and this is preset in the vertical counter 10 (steps 107 and 108).

Thus, for each horizontal scanning line, the difference between the number of black pixels "I+"l' between the standard pattern P and the input pattern Pi is determined and compared with the threshold value TH, in step 121 of FIG. 7(3).
~123), and further calculate the cumulative value NT of the difference (ni"i) and compare it with the threshold value TH2 in step 124~
126), as a result, “NT>TH2” in step 126
If the determination is NO, a match signal is output in step 127.

[Brief explanation of the drawing]

FIG. 1 is a circuit block diagram of a two-dimensional visual recognition device according to the present invention, FIG. 2 is an explanatory diagram showing a standard pattern in the reference memory and a hekabata turn in the buffer memory, and FIG. 3 is similar to FIG. 1. FIG. 4 +11 is an explanatory diagram showing the process of detecting the positional deviation of the input pattern with respect to the standard pattern; FIG. 5 is a flowchart showing the interrupt processing operation in the learning mode; Figure 6 ill +
21 is a flowchart showing the interrupt processing operation in the recognition mode, and FIG. 7 +11 +2) +31 is a flowchart showing another embodiment. 4... Binarization circuit, 5. Reference memory, 6. Buffer memory, 25. Pixel counter, 27. ,, CPU patent applicant Tateishi Electric Co., Ltd. Teq (+) Tear) (Kaya start half 1 included -
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Claims (1)

[Claims] After obtaining an input pattern by converting the image of the object to be recognized into black and white, the apparatus recognizes the object by comparing the input pattern with a standard pattern, which includes a memory for individually capturing the standard pattern and the input pattern. , a means for counting the number of black pixels for each scanning line for each pattern, a means for integrating the memory address of the scanning line containing the black pixel and the number of black pixels in that line, and a means for calculating the sum of the integrated values as the total number of black pixels. A two-dimensional visual recognition device comprising means for calculating a weighted average value of each pattern by dividing the two patterns, and means for calculating a difference between the weighted average values of both patterns as a positional deviation amount of an input pattern with respect to a standard pattern.