JPS6420666A - Power mos transistor structure - Google Patents

Power mos transistor structure

Info

Publication number
JPS6420666A
JPS6420666A JP63152107A JP15210788A JPS6420666A JP S6420666 A JPS6420666 A JP S6420666A JP 63152107 A JP63152107 A JP 63152107A JP 15210788 A JP15210788 A JP 15210788A JP S6420666 A JPS6420666 A JP S6420666A
Authority
JP
Japan
Prior art keywords
source
regions
contact
drain
connection layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP63152107A
Other languages
English (en)
Other versions
JP2842871B2 (ja
Inventor
Toneru Yuujiyunu
Tomasu Jire
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
STMicroelectronics lnc USA
Original Assignee
SGS Thomson Microelectronics SA
SGS Thomson Microelectronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA, SGS Thomson Microelectronics Inc filed Critical SGS Thomson Microelectronics SA
Publication of JPS6420666A publication Critical patent/JPS6420666A/ja
Application granted granted Critical
Publication of JP2842871B2 publication Critical patent/JP2842871B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/601Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/603Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10D30/663Vertical DMOS [VDMOS] FETs having both source contacts and drain contacts on the same surface, i.e. up-drain VDMOS
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251Source or drain electrodes for field-effect devices
    • H10D64/252Source or drain electrodes for field-effect devices for vertical or pseudo-vertical devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172Manufacturing their gate conductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/43Layouts of interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126Top-view geometrical layouts of the regions or the junctions
    • H10D62/127Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • H10D64/516Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP63152107A 1987-06-22 1988-06-20 パワーmosトランジスタ構造 Expired - Lifetime JP2842871B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8709157 1987-06-22
FR8709157A FR2616966B1 (fr) 1987-06-22 1987-06-22 Structure de transistors mos de puissance

Publications (2)

Publication Number Publication Date
JPS6420666A true JPS6420666A (en) 1989-01-24
JP2842871B2 JP2842871B2 (ja) 1999-01-06

Family

ID=9352634

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63152107A Expired - Lifetime JP2842871B2 (ja) 1987-06-22 1988-06-20 パワーmosトランジスタ構造

Country Status (6)

Country Link
US (1) US4890142A (ja)
EP (1) EP0296997B1 (ja)
JP (1) JP2842871B2 (ja)
KR (1) KR890001200A (ja)
DE (1) DE3873839T2 (ja)
FR (1) FR2616966B1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007273689A (ja) * 2006-03-31 2007-10-18 Denso Corp 半導体装置

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4998151A (en) * 1989-04-13 1991-03-05 General Electric Company Power field effect devices having small cell size and low contact resistance
USRE37424E1 (en) * 1989-06-14 2001-10-30 Stmicroelectronics S.R.L. Mixed technology integrated device comprising complementary LDMOS power transistors, CMOS and vertical PNP integrated structures having an enhanced ability to withstand a relatively high supply voltage
US5192989A (en) * 1989-11-28 1993-03-09 Nissan Motor Co., Ltd. Lateral dmos fet device with reduced on resistance
JP2858404B2 (ja) * 1990-06-08 1999-02-17 株式会社デンソー 絶縁ゲート型バイポーラトランジスタおよびその製造方法
IT1252625B (it) * 1991-12-05 1995-06-19 Cons Ric Microelettronica Processo di fabbricazione di transistors a effetto di campo con gate isolato (igfet) a bassa densita' di corto circuiti tra gate e source e dispositivi con esso ottenuti
US5306652A (en) * 1991-12-30 1994-04-26 Texas Instruments Incorporated Lateral double diffused insulated gate field effect transistor fabrication process
JP3158738B2 (ja) * 1992-08-17 2001-04-23 富士電機株式会社 高耐圧mis電界効果トランジスタおよび半導体集積回路
US5283454A (en) * 1992-09-11 1994-02-01 Motorola, Inc. Semiconductor device including very low sheet resistivity buried layer
US5631177A (en) * 1992-12-07 1997-05-20 Sgs-Thomson Microelectronics, S.R.L. Process for manufacturing integrated circuit with power field effect transistors
US5382536A (en) * 1993-03-15 1995-01-17 Texas Instruments Incorporated Method of fabricating lateral DMOS structure
US5369045A (en) * 1993-07-01 1994-11-29 Texas Instruments Incorporated Method for forming a self-aligned lateral DMOS transistor
US5798287A (en) * 1993-12-24 1998-08-25 Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno Method for forming a power MOS device chip
EP0660396B1 (en) * 1993-12-24 1998-11-04 Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno Power MOS device chip and package assembly
DE69321966T2 (de) * 1993-12-24 1999-06-02 Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno, Catania Leistungs-Halbleiterbauelement
JP3136885B2 (ja) * 1994-02-02 2001-02-19 日産自動車株式会社 パワーmosfet
EP0748520B1 (de) * 1994-03-04 1998-12-16 Siemens Aktiengesellschaft Mis-struktur auf siliciumcarbid-basis mit hoher latch-up-festigkeit
JP3355817B2 (ja) * 1994-10-20 2002-12-09 株式会社デンソー 半導体装置
US6150722A (en) * 1994-11-02 2000-11-21 Texas Instruments Incorporated Ldmos transistor with thick copper interconnect
KR100468342B1 (ko) 1996-05-15 2005-06-02 텍사스 인스트루먼츠 인코포레이티드 자기-정렬resurf영역을가진ldmos장치및그제조방법
US6140702A (en) * 1996-05-31 2000-10-31 Texas Instruments Incorporated Plastic encapsulation for integrated circuits having plated copper top surface level interconnect
JP3327135B2 (ja) * 1996-09-09 2002-09-24 日産自動車株式会社 電界効果トランジスタ
US6140150A (en) * 1997-05-28 2000-10-31 Texas Instruments Incorporated Plastic encapsulation for integrated circuits having plated copper top surface level interconnect
JP3395603B2 (ja) * 1997-09-26 2003-04-14 株式会社豊田中央研究所 横型mos素子を含む半導体装置
US6531355B2 (en) 1999-01-25 2003-03-11 Texas Instruments Incorporated LDMOS device with self-aligned RESURF region and method of fabrication
DE10104274C5 (de) * 2000-02-04 2008-05-29 International Rectifier Corp., El Segundo Halbleiterbauteil mit MOS-Gatesteuerung und mit einer Kontaktstruktur sowie Verfahren zu seiner Herstellung
US6653708B2 (en) 2000-08-08 2003-11-25 Intersil Americas Inc. Complementary metal oxide semiconductor with improved single event performance
JP2004079988A (ja) * 2002-06-19 2004-03-11 Toshiba Corp 半導体装置
EP1915783A2 (en) * 2005-08-10 2008-04-30 Nxp B.V. Ldmos transistor
US8169081B1 (en) 2007-12-27 2012-05-01 Volterra Semiconductor Corporation Conductive routings in integrated circuits using under bump metallization
US8084821B2 (en) * 2008-01-30 2011-12-27 Infineon Technologies Ag Integrated circuit including a power MOS transistor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5193878A (ja) * 1975-02-17 1976-08-17
JPS6188553A (ja) * 1984-09-28 1986-05-06 トムソン‐セエスエフ 高ブロツキング電圧性能を有するcmosトランジスタの集積回路構造と該構造の組立て法

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Publication number Priority date Publication date Assignee Title
DE3046749C2 (de) * 1979-12-10 1986-01-16 Sharp K.K., Osaka MOS-Transistor für hohe Betriebsspannungen
JPS57162359A (en) * 1981-03-30 1982-10-06 Toshiba Corp Semiconductor device
GB2098799B (en) * 1981-05-20 1985-08-21 Nippon Electric Co Multi-level interconnection system for integrated circuits
JPS57194567A (en) * 1981-05-27 1982-11-30 Hitachi Ltd Semiconductor memory device
JPS58171861A (ja) * 1982-04-01 1983-10-08 Toshiba Corp 半導体装置
NL8302092A (nl) * 1983-06-13 1985-01-02 Philips Nv Halfgeleiderinrichting bevattende een veldeffekttransistor.
JPS604253A (ja) * 1983-06-23 1985-01-10 Nec Corp 半導体集積回路メモリ

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5193878A (ja) * 1975-02-17 1976-08-17
JPS6188553A (ja) * 1984-09-28 1986-05-06 トムソン‐セエスエフ 高ブロツキング電圧性能を有するcmosトランジスタの集積回路構造と該構造の組立て法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007273689A (ja) * 2006-03-31 2007-10-18 Denso Corp 半導体装置

Also Published As

Publication number Publication date
DE3873839D1 (de) 1992-09-24
KR890001200A (ko) 1989-03-18
EP0296997B1 (fr) 1992-08-19
US4890142A (en) 1989-12-26
JP2842871B2 (ja) 1999-01-06
FR2616966B1 (fr) 1989-10-27
FR2616966A1 (fr) 1988-12-23
DE3873839T2 (de) 1993-05-13
EP0296997A1 (fr) 1988-12-28

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