JPS6431249A - System for managing device address - Google Patents

System for managing device address

Info

Publication number
JPS6431249A
JPS6431249A JP18692187A JP18692187A JPS6431249A JP S6431249 A JPS6431249 A JP S6431249A JP 18692187 A JP18692187 A JP 18692187A JP 18692187 A JP18692187 A JP 18692187A JP S6431249 A JPS6431249 A JP S6431249A
Authority
JP
Japan
Prior art keywords
device address
address table
controlled
operation start
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18692187A
Other languages
Japanese (ja)
Inventor
Ikunori Moriya
Masami Nakamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP18692187A priority Critical patent/JPS6431249A/en
Publication of JPS6431249A publication Critical patent/JPS6431249A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To eliminate the re-preparation of a device address table each time the construction of a device to be controlled is different by automatically prepare the device address table to register only the device address which is given to the device to be controlled to be really exist until the operation start of a system. CONSTITUTION:A device address table preparing means 400 successively designates an arbitrary device address DN before the operation start of the system and tries the transmission of data. When the data transmission is completed, the device address DN is registered to a device address table 300 and when the data transmission is not completed, the device address DN is not registered to the device address table 300. Accordingly, by the time of the operation start of the system, the device address table 300 is automatically prepared to register only the device address DN given to the device 200 to be controlled to be really exist. Thus, a labor to re-prepare the device address table 300 each time the construction of the controlled device is different goes to be reduced.
JP18692187A 1987-07-27 1987-07-27 System for managing device address Pending JPS6431249A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18692187A JPS6431249A (en) 1987-07-27 1987-07-27 System for managing device address

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18692187A JPS6431249A (en) 1987-07-27 1987-07-27 System for managing device address

Publications (1)

Publication Number Publication Date
JPS6431249A true JPS6431249A (en) 1989-02-01

Family

ID=16197033

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18692187A Pending JPS6431249A (en) 1987-07-27 1987-07-27 System for managing device address

Country Status (1)

Country Link
JP (1) JPS6431249A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0325548A (en) * 1989-06-23 1991-02-04 Hitachi Ltd How to set peripheral device control information in a computer system
US7631114B2 (en) 2003-03-28 2009-12-08 Renesas Technology Corp. Serial communication device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0325548A (en) * 1989-06-23 1991-02-04 Hitachi Ltd How to set peripheral device control information in a computer system
US7631114B2 (en) 2003-03-28 2009-12-08 Renesas Technology Corp. Serial communication device

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