TW200710926A - Method for fabricating semiconductor device and semiconductor device - Google Patents

Method for fabricating semiconductor device and semiconductor device

Info

Publication number
TW200710926A
TW200710926A TW095107027A TW95107027A TW200710926A TW 200710926 A TW200710926 A TW 200710926A TW 095107027 A TW095107027 A TW 095107027A TW 95107027 A TW95107027 A TW 95107027A TW 200710926 A TW200710926 A TW 200710926A
Authority
TW
Taiwan
Prior art keywords
thin film
semiconductor device
opening
conductive material
fabricating
Prior art date
Application number
TW095107027A
Other languages
English (en)
Other versions
TWI316731B (en
Inventor
Akihiro Kojima
Original Assignee
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Kk filed Critical Toshiba Kk
Publication of TW200710926A publication Critical patent/TW200710926A/zh
Application granted granted Critical
Publication of TWI316731B publication Critical patent/TWI316731B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/037—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics the barrier, adhesion or liner layers being on top of a main fill metal
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/072—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/075—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers of multilayered thin functional dielectric layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/46—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising air gaps

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW095107027A 2005-03-22 2006-03-02 Method for fabricating semiconductor device and semiconductor device TWI316731B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005082325A JP4679193B2 (ja) 2005-03-22 2005-03-22 半導体装置の製造方法及び半導体装置

Publications (2)

Publication Number Publication Date
TW200710926A true TW200710926A (en) 2007-03-16
TWI316731B TWI316731B (en) 2009-11-01

Family

ID=37035769

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095107027A TWI316731B (en) 2005-03-22 2006-03-02 Method for fabricating semiconductor device and semiconductor device

Country Status (3)

Country Link
US (2) US7439185B2 (zh)
JP (1) JP4679193B2 (zh)
TW (1) TWI316731B (zh)

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CN104465506B (zh) * 2014-12-24 2018-01-26 上海集成电路研发中心有限公司 铜互连中空气隙的形成方法
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US10276428B2 (en) * 2017-08-28 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor package and method of fabricating semiconductor package
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI414002B (zh) * 2009-11-17 2013-11-01 東芝股份有限公司 Semiconductor device manufacturing method

Also Published As

Publication number Publication date
JP2006269537A (ja) 2006-10-05
US7439185B2 (en) 2008-10-21
TWI316731B (en) 2009-11-01
US20090065946A1 (en) 2009-03-12
JP4679193B2 (ja) 2011-04-27
US20060216920A1 (en) 2006-09-28
US7884474B2 (en) 2011-02-08

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees